DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3, 8, 13, 15 and 16 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim (2012/0139959).
Regarding claim 1, Kim teaches a display apparatus, comprising: a display panel (500; Fig 1) including a plurality of unit pixels (PX; Fig 1), each unit pixel including a first subpixel for emitting light of a first color (R; Fig 3) and a second subpixel for emitting light of a second color different from the first color (G; Fig 3; para [0066] a plurality of pixels include a red pixel R having an organic light emitting diode (OLED) configured to emit red light, a green pixel G having an organic light emitting diode (OLED) configured to emit green light, and a blue pixel B having an organic light emitting diode (OLED) configured to emit blue light.); and a power supply (400; Fig 1; para [0046] The power supply unit 400 supplies a first power source voltage ELVDD and a second power source voltage ELVSS to a plurality of pixels PX included in the display unit 500.) configured to supply a first driving voltage (para [0067] Main power lines RL, GL, and BL are disposed at two sides corresponding to one side surface in the pixel area. The main power lines RL, GL, and BL include a red line RL, a green line GL, and a blue line BL in accordance with the light emitting color of the organic light emitting diode (OLED) that each line is coupled to….Further, because the luminous efficiency of the organic light emitting diode (OLED) is different for organic light emitting diodes designed to emit different colors, different power source voltages may be applied. Accordingly, the main power lines RL, GL, and BL are formed corresponding to the light emitting color of the organic light emitting diodes (OLEDs) to which they are coupled, and the red pixels R, the green pixels G, the blue pixels B independently receive different voltages from the power source (or receive power from different power sources)) through a first power line (RL; Fig 3) connected to the first subpixels of the plurality of unit pixels (Fig 3; para [0068] A plurality of red sub-power lines sRL extend from the red line RL on a first side and a second plurality of red sub-power lines sRL extend from the red line RL on a second side along the column of the red pixel R) and to supply a second driving voltage (para [0067] Main power lines RL, GL, and BL are disposed at two sides corresponding to one side surface in the pixel area. The main power lines RL, GL, and BL include a red line RL, a green line GL, and a blue line BL in accordance with the light emitting color of the organic light emitting diode (OLED) that each line is coupled to….Further, because the luminous efficiency of the organic light emitting diode (OLED) is different for organic light emitting diodes designed to emit different colors, different power source voltages may be applied. Accordingly, the main power lines RL, GL, and BL are formed corresponding to the light emitting color of the organic light emitting diodes (OLEDs) to which they are coupled, and the red pixels R, the green pixels G, the blue pixels B independently receive different voltages from the power source (or receive power from different power sources)) through a second power line (GL; Fig 3) connected to the second subpixels of the plurality of unit pixels (Fig 3; para [0069] A plurality of green pixels G are connected to the green line GL through a plurality of green sub-power lines sGL and a plurality of blue pixels B are connected to the blue line BL through a plurality of blue sub-power lines sBL in a manner substantially the same as the manner in which the plurality of red pixels R are connected to the red line RL.), wherein: each of the first power line and the second power line comprises a mesh structure line (Fig 3; para [0071] the voltage drop along the power line, mesh power lines mRL, mGL, and mBL coupled to the plurality of sub-power lines sRL, sGL, and sBL extending from the main power lines RL, GL, and BL may be further provided to provide a mesh structure.); the mesh structure line of one of the first power line and the second power line is electrically disconnected from the mesh structure line of another one of the first power line and the second power line (Fig 3; para [0071] Here, the red mesh power line mRL is only connected to a plurality of red sub-power lines extending from one side among a plurality of red sub-power lines extended from the red line of the first side and a plurality of red sub-power lines extended from the red line of the second side. para [0072] A plurality of green sub-power lines sRL and a plurality of green mesh power lines mGL are connected together and a plurality of blue sub-power lines sBL and a plurality of blue mesh power lines mBL are connected together in a manner substantially the same as the manner in which the plurality of red sub-power lines sRL and a plurality of red mesh power lines mRL are connected together.); and the first driving voltage has a level different from a level of the second driving voltage (para [0067] Accordingly, the main power lines RL, GL, and BL are formed corresponding to the light emitting color of the organic light emitting diodes (OLEDs) to which they are coupled, and the red pixels R, the green pixels G, the blue pixels B independently receive different voltages from the power source (or receive power from different power sources)).
Regarding claim 2, Kim teaches the display apparatus of claim 1, wherein: the mesh structure line of the first power line is connected to the first subpixels and comprises a plurality of first horizontal lines (mRL; Fig 3 ; para [0071] the plurality of red mesh power lines mRL extending in a row direction.) parallel to a horizontal direction of the display panel and a plurality of first vertical lines (sRL; Fig 3) parallel to a vertical direction of the display panel (para [0071] , a plurality of red sub-power lines sRL extending from the red line R in a column direction); and the mesh structure line of the second power line is connected to the second subpixels and comprises a plurality of second horizontal lines (mGL; Fig 3) parallel to the horizontal direction of the display panel and a plurality of second vertical lines (sGL; Fig 3) parallel to the vertical direction of the display panel (Fig 3; para [0073]).
Regarding claim 3, Kim teaches the display apparatus of claim 2, wherein: the plurality of first horizontal lines and the plurality of first vertical lines of the first power line are electrically connected to each other (Fig 3; para [0071] For example, a plurality of red sub-power lines sRL extending from the red line R in a column direction are connected to the plurality of red mesh power lines mRL extending in a row direction.); the plurality of second horizontal lines and the plurality of second vertical lines of the second power line are electrically connected to each other (para [0072] A plurality of green sub-power lines sRL and a plurality of green mesh power lines mGL are connected together and a plurality of blue sub-power lines sBL and a plurality of blue mesh power lines mBL are connected together in a manner substantially the same as the manner in which the plurality of red sub-power lines sRL and a plurality of red mesh power lines mRL are connected together.); and each of the plurality of first horizontal lines and the plurality of first vertical lines is insulated from each of the plurality of second horizontal lines and the plurality of second vertical lines (Fig 3; para [0071] Here, the red mesh power line mRL is only connected to a plurality of red sub-power lines extending from one side among a plurality of red sub-power lines extended from the red line of the first side and a plurality of red sub-power lines extended from the red line of the second side. para [0072] A plurality of green sub-power lines sRL and a plurality of green mesh power lines mGL are connected together and a plurality of blue sub-power lines sBL and a plurality of blue mesh power lines mBL are connected together in a manner substantially the same as the manner in which the plurality of red sub-power lines sRL and a plurality of red mesh power lines mRL are connected together. Here, the point where the sub-power lines sRL, sGL, and sBL and the mesh power lines mRL, mGL, and mBL are connected is represented as a white circle.).
Regarding claim 8, Kim teaches the display apparatus of claim 2, wherein: each of the plurality of unit pixels comprises a first contact point (Fig 3; para [0072] the point where the sub-power lines sRL, sGL, and sBL and the mesh power lines mRL, mGL, and mBL are connected is represented as a white circle.) and a second contact point (Fig 3; para [0072] the point where the sub-power lines sRL, sGL, and sBL and the mesh power lines mRL, mGL, and mBL are connected is represented as a white circle.); at each first contact point, a corresponding one of the plurality of first horizontal lines and a corresponding one of the plurality of first vertical lines cross each other and are electrically connected to each other (Fig 3; para [0072] the point where the sub-power lines sRL, sGL, and sBL and the mesh power lines mRL, mGL, and mBL are connected is represented as a white circle.); and at each second contact point, a corresponding one of the plurality of second horizontal lines and a corresponding one of the plurality of the second vertical lines cross each other and are electrically connected to each other (Fig 3; para [0072] the point where the sub-power lines sRL, sGL, and sBL and the mesh power lines mRL, mGL, and mBL are connected is represented as a white circle.).
Regarding claim 13, Kim teaches the display apparatus of claim 2, wherein: each of the plurality of unit pixels comprises a third subpixel (B; Fig 3); each of the third subpixels of the plurality of unit pixels includes a light emitting device for emitting light of a third color different from the first and second colors (Blue vs red and green; Fig 3); the power supply is further configured to supply a third driving voltage (para [0078] a blue line BL supplying the voltage of the power source to a plurality of blue pixels B), having a level different from the level of each of the first and second driving voltages (para [0067] Accordingly, the main power lines RL, GL, and BL are formed corresponding to the light emitting color of the organic light emitting diodes (OLEDs) to which they are coupled, and the red pixels R, the green pixels G, the blue pixels B independently receive different voltages from the power source (or receive power from different power sources).), to the light emitting devices of the third subpixels through a third power line (BL; Fig 3); and the third power line comprises a mesh structure line electrically disconnected from the first and second power lines (Fig 3; para [0072] A plurality of green sub-power lines sRL and a plurality of green mesh power lines mGL are connected together and a plurality of blue sub-power lines sBL and a plurality of blue mesh power lines mBL are connected together in a manner substantially the same as the manner in which the plurality of red sub-power lines sRL and a plurality of red mesh power lines mRL are connected together).
Regarding claim 15, Kim teaches the display apparatus of claim 13, wherein the mesh structure line of the third power line is connected to the third subpixels and comprises a plurality of third horizontal lines (mBL; Fig 3) parallel to the horizontal direction of the display panel and a plurality of third vertical lines (sBL; Fig 3) parallel to the vertical direction of the display panel (Fig 3; para [0072]).
Regarding claim 16, Kim teaches the display apparatus of claim 15, wherein: the plurality of third horizontal lines and the plurality of third vertical lines of the third power line are electrically connected to each other (Fig 3; para [0072] Here, the point where the sub-power lines sRL, sGL, and sBL and the mesh power lines mRL, mGL, and mBL are connected is represented as a white circle.); the plurality of third horizontal lines are insulated from the plurality of first horizontal lines and the plurality of second horizontal lines (Fig 3; para [0071] Here, the red mesh power line mRL is only connected to a plurality of red sub-power lines extending from one side among a plurality of red sub-power lines extended from the red line of the first side and a plurality of red sub-power lines extended from the red line of the second side. para [0072] A plurality of green sub-power lines sRL and a plurality of green mesh power lines mGL are connected together and a plurality of blue sub-power lines sBL and a plurality of blue mesh power lines mBL are connected together in a manner substantially the same as the manner in which the plurality of red sub-power lines sRL and a plurality of red mesh power lines mRL are connected together.); and the plurality of third vertical lines are insulated from the plurality of first vertical lines and the plurality of second vertical lines (Fig 3).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 4, 5 and 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim (2012/0139959) in view of Cha et al. (2023/0142777).
Regarding claim 4, Kim teaches the display apparatus as explained for claim 2 above.
Kim fails to teach, wherein: the plurality of first horizontal lines are disposed on a layer that is different from a layer on which the plurality of first vertical lines are disposed; and the plurality of second horizontal lines are disposed on a layer that is different from a layer on which the plurality of second vertical lines are disposed; as claimed.
Cha teaches a display apparatus comprising: a plurality of first horizontal lines (VL3; Fig 2) are disposed on a layer that is different from a layer on which a plurality of first vertical lines (VL1; Fig 2) are disposed; and a plurality of second horizontal lines (VL4; Fig 2) are disposed on a layer that is different from a layer on which a plurality of second vertical lines are disposed (VL2; Fig 2; para [0106] The first voltage line VL1 and the second voltage line VL2 may be disposed to extend in the first direction DR1, and each of them may be disposed across the plurality of pixels PX arranged along the first direction DR1. The first voltage line VL1 may be disposed to the right side of the plurality of lower metal layers BML1, BML2, and BML3, and the second voltage line VL2 may be disposed between the first data line DTL1 and the second scan line SL2. Each of the first voltage line VL1 and the second voltage line VL2 may be connected to the plurality of sub-pixels SPXn belonging to one pixel PX. The first voltage line VL1 may be electrically connected to the first electrode RME1 of each sub-pixel SPXn through the first transistor T1 (see FIG. 4), and the second voltage line VL2 may be electrically connected to the second electrode RME2 through the fourth voltage line VL4 disposed in a different conductive layer. Para [0128]).
It would have been obvious to one of ordinary skill in the art before the filing date of present application to have modified the display apparatus of Kim with the teachings of Cha, because this will prevent an increase in contact resistance that may occur when the connection electrode is brought into contact with the electrode. In addition, the electrodes may be formed in a state where the voltage lines are not exposed to protect the voltage lines, and as the bridge electrode is disposed on the electrode, damage to a material between the bridge electrode and the electrode may be prevented (Cha: para [0028]).
Regarding claim 5, Kim teaches the display apparatus as explained for claim 2 above.
Kim fails to teach, wherein one of the plurality of first vertical lines and one of the plurality of second vertical lines are disposed on a same layer in a unit pixel and are spaced apart from each other in the horizontal direction; as claimed.
Cha teaches a display apparatus comprising one of a plurality of first vertical lines and one of a plurality of second vertical lines are disposed on a same layer in a unit pixel and are spaced apart from each other in the horizontal direction (para [0071] As will be described later, the first voltage line VL1 and the second voltage line VL2 may be formed of the first conductive layer, para [0106] The first voltage line VL1 and the second voltage line VL2 may be disposed to extend in the first direction DR1, and each of them may be disposed across the plurality of pixels PX arranged along the first direction DR1. The first voltage line VL1 may be disposed to the right side of the plurality of lower metal layers BML1, BML2, and BML3, and the second voltage line VL2 may be disposed between the first data line DTL1 and the second scan line SL2. Each of the first voltage line VL1 and the second voltage line VL2 may be connected to the plurality of sub-pixels SPXn belonging to one pixel PX.).
It would have been obvious to one of ordinary skill in the art before the filing date of present application to have modified the display apparatus of Kim with the teachings of Cha, because this will prevent an increase in contact resistance that may occur when the connection electrode is brought into contact with the electrode. In addition, the electrodes may be formed in a state where the voltage lines are not exposed to protect the voltage lines, and as the bridge electrode is disposed on the electrode, damage to a material between the bridge electrode and the electrode may be prevented (Cha: para [0028]).
Regarding claim 6, Kim teaches the display apparatus as explained for claim 2 above.
Kim fails to teach, wherein one of the plurality of first horizontal lines and one of the plurality of second horizontal lines are disposed on a same layer in a unit pixel and are spaced apart from each other in the vertical direction; as claimed.
Cha teaches a display apparatus comprising wherein one of a plurality of first horizontal lines and one of a plurality of second horizontal lines are disposed on a same layer in a unit pixel and are spaced apart from each other in the vertical direction (para [0071] and the third voltage line VL3 and the fourth voltage line VL4 may be formed of the third conductive layer disposed on a layer different from the first conductive layer, para [0127] The third voltage line VL3 and the fourth voltage line VL4 extend in the second direction DR2 and are disposed over the plurality of pixels PX arranged along the second direction DR2. Fig 7).
It would have been obvious to one of ordinary skill in the art before the filing date of present application to have modified the display apparatus of Kim with the teachings of Cha, because this will prevent an increase in contact resistance that may occur when the connection electrode is brought into contact with the electrode. In addition, the electrodes may be formed in a state where the voltage lines are not exposed to protect the voltage lines, and as the bridge electrode is disposed on the electrode, damage to a material between the bridge electrode and the electrode may be prevented (Cha: para [0028]).
Claim(s) 12 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim (2012/0139959) in view of Jung et al. (2021/0043616).
Regarding claim 12, Kim teaches the display apparatus of claim 1, wherein: each first subpixel comprises a light emitting device for emitting red light (R; Fig 3), and each second subpixel comprises a light emitting device for emitting green light (G; Fig 3); the power supply is configured to supply the first driving voltage to the light emitting devices of the first subpixels (Fig 3; para [0067] Accordingly, the main power lines RL, GL, and BL are formed corresponding to the light emitting color of the organic light emitting diodes (OLEDs) to which they are coupled, and the red pixels R, the green pixels G, the blue pixels B independently receive different voltages from the power source (or receive power from different power sources).), and supply the second driving voltage to the light emitting devices of the second subpixels (Fig 3; para [0067] Accordingly, the main power lines RL, GL, and BL are formed corresponding to the light emitting color of the organic light emitting diodes (OLEDs) to which they are coupled, and the red pixels R, the green pixels G, the blue pixels B independently receive different voltages from the power source (or receive power from different power sources).).
Kim fails to teach; and the level of the first driving voltage is lower than the level of the second driving voltage; as claimed.
Jung teaches a display apparatus comprising: a light emitting device for emitting red light (R; Fig 2), and a light emitting device for emitting green light (G; Fig 2); a level of the first driving voltage is lower than a level of the second driving voltage (para [0153] An operating voltage of the LED may be determined by the color emitted by a corresponding LED. In general, an operating voltage of the red LED is the lowest, an operating voltage of the yellow LED and the green LED are slightly higher than the operating voltage of the red LED, and an operating voltage of the blue LED is the highest.)
It would have been obvious to one of ordinary skill in the art before the filing date of present application to have modified the apparatus of Kim with the teachings of Jung, because each of the light emitting device requires different operating voltages, thus it would be obvious to apply different levels of driving voltages in order to yield predictable results.
Regarding claim 20, Kim teaches the display apparatus of claim 13, wherein: the light of the third color is blue light (B; Fig 3).
Kim fails to teach; and the level of the third driving voltage is higher than the level of each of the first and second driving voltages; as claimed.
Jung teaches a display apparatus comprising: a light emitting device for emitting red light (R; Fig 2), a light emitting device for emitting green light (G; Fig 2) and a light emitting device for emitting blue light (B; Fig 2); and a level of the third driving voltage is higher than the level of each of the first and second driving voltages (para [0153] An operating voltage of the LED may be determined by the color emitted by a corresponding LED. In general, an operating voltage of the red LED is the lowest, an operating voltage of the yellow LED and the green LED are slightly higher than the operating voltage of the red LED, and an operating voltage of the blue LED is the highest.).
It would have been obvious to one of ordinary skill in the art before the filing date of present application to have modified the apparatus of Kim with the teachings of Jung, because each of the light emitting device requires different operating voltages, thus it would be obvious to apply different levels of driving voltages in order to yield predictable results.
Allowable Subject Matter
Claims 7, 9-11, 14 and 17-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 7, prior art of record fails to teach the following claim limitations of “wherein: one of the plurality of first vertical lines and one of the plurality of second vertical lines are disposed apart from each other on a first planarization layer covering a plurality of transistors included in a unit pixel; and one of the plurality of first horizontal lines and one of the plurality of second horizontal lines are disposed apart from each other on a second planarization layer covering the one of the plurality of first vertical lines, the one of the plurality of second vertical lines, and the first planarization layer.”; in combination with all other claim limitations. Regarding claim 9, prior art of record fails to teach the following claim limitations of “wherein each of the first and second contact points overlaps a bank defining an emission region of a corresponding one of the first and second subpixels.”; in combination with all other claim limitations. Regarding claim 10, prior art of record fails to teach the following claim limitations of “wherein: at each first contact point, the corresponding one of the plurality of first horizontal lines and the corresponding one of the plurality of first vertical lines are electrically connected to each other through a second planarization layer; and at each second contact point, the corresponding one of the plurality of second horizontal lines and the corresponding one of the plurality of the second vertical lines are electrically connected to each other through the second planarization layer.”; in combination with all other claim limitations. Regarding claim 11, prior art of record fails to teach the following claim limitations of “wherein: a respective one of the plurality of first horizontal lines is insulated from a respective one the plurality of second vertical lines at an intersection point therebetween in each of the plurality of unit pixels; and a respective one of the plurality of second horizontal lines is insulated from a respective one of the plurality of first vertical lines at an intersection point therebetween in each of the plurality of unit pixels.”; in combination with all other claim limitations. Regarding claim 14, prior art of record fails to teach the following claim limitations of “wherein: the level of each of the first, second and third driving voltages is set based on a saturation voltage of a driving transistor included in a corresponding one of the first, second and third subpixels; the first driving voltage is higher than or equal to the saturation voltage of the driving transistor of the corresponding one of the first subpixels; the second driving voltage is higher than or equal to the saturation voltage of the driving transistor of the corresponding one of the second subpixels; and the third driving voltage is higher than or equal to the saturation voltage of the driving transistor of the corresponding one of the third subpixels.”; in combination with all other claim limitations. Regarding claim 17, prior art of record fails to teach the following claim limitations of “wherein: the plurality of third horizontal lines are disposed on a layer that is different from a layer on which the plurality of third vertical lines are disposed; the plurality of third horizontal lines are disposed on a same layer as the plurality of first horizontal lines and the plurality of second horizontal lines; the plurality of third horizontal lines are spaced apart from one another in the vertical direction; the plurality of third horizontal lines are disposed apart from the plurality of first horizontal lines and the plurality of second horizontal lines in the vertical direction; and the plurality of third horizontal lines are disposed on a second planarization layer covering the plurality of first, second and third vertical lines and a first planarization layer covering a plurality of transistors included in a unit pixel.”; in combination with all other claim limitations. Regarding claim 18, prior art of record fails to teach the following claim limitations of “wherein: the plurality of third vertical lines are disposed on a same layer as the plurality of first and second vertical lines in the plurality of unit pixels; the plurality of third vertical lines are spaced apart from one another in the horizontal direction; and the plurality of third vertical lines are disposed apart from the plurality of first and second vertical lines on a first planarization layer covering a plurality of transistors included in the plurality of unit pixels.”; in combination with all other claim limitations. Regarding claim 19, prior art of record fails to teach the following claim limitations of “…each third contact point overlaps a bank defining an emission region of a corresponding one of the third subpixels; at each third contact point, the corresponding one of the plurality of third horizontal lines and the corresponding one of the plurality of third vertical lines are electrically connected to each other through a second planarization; and a respective one of the plurality of third horizontal lines is insulated from a respective one of the plurality of first vertical lines at a point intersecting the respective one of the plurality of first vertical lines and insulated from a respective one of the plurality of second vertical lines at a point intersecting the respective one of the plurality of second vertical lines, in each of the plurality of unit pixels.”; in combination with all other claim limitations.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kim et al. (2026/0096313) teaches a display panel includes a substrate; a pixel circuit including a first sub-pixel circuit, a second sub-pixel circuit, and a third sub-pixel circuit; a first insulating layer disposed on the pixel circuit; a first conductive layer disposed on the first insulating layer and including a first data line, a second data line, and a third data line; a second insulating layer disposed on the first conductive layer; and a second conductive layer disposed on the second insulating layer and including a first pixel electrode, a second pixel electrode, a third pixel electrode, and a shielding pattern. The shielding pattern includes a first portion overlapping the first data line, a second portion overlapping the second data line, and a first connection portion connecting the first portion and the second portion to each other.
Yoon et al. (2023/0240103) teaches a display panel comprises a first data line, a second data line electrically insulated from the first data line, and a first data connection line electrically connected to the first data line and disposed closer to the second data line than to the first data line in a first direction. The first data line, the second data line, and the first data connection line each comprise a line member extending in a second direction different from the first direction and comprise a first protrusion and a second protrusion both protruding from the line member and being wider than the line member in the first direction.
Zhong (2025/0118256) teaches a voltage regulation method, a terminal device, a chip, and a storage medium, relates to the field of display technologies, and can alleviate a problem of high power consumption of a display driver circuit in the terminal device. The voltage regulation method includes: obtaining highest gray scales of color channels of a to-be-displayed image; determining lowest working voltages required for the display driver circuit to display the highest gray scales of the color channels, to regulate a working voltages of a display circuit based on displayed content; and determining a maximum value of the lowest working voltages required for the display driver circuit to display the highest gray scales of the color channels as a target working voltage of the display driver circuit.
Bang et al. (2024/0040867) teaches A display device includes a circuit array layer including a plurality of pixel drivers, data lines, and demux circuits disposed in a demux area of the non-display area, where the demux area is disposed adjacent to the subsidiary area, and a display driver circuit which supplies data driving signals associated with the data lines. A second data input line, which is electrically connected to a second demux circuit disposed in a second demux area of the demux area being a side area of the demux area in a first direction, includes a main input line; a demux detour line disposed in the display area and electrically connected to the main input line; and a detour additional line electrically connected between the demux detour line and an input terminal of the second demux circuit.
Hong et al. (2022/0384490) teaches a display device comprises first scan line and a second scan line that extend in a first direction, a third scan line extending in a second direction intersecting the first direction, the third scan line intersecting the first scan line and the second scan line, and an insulating layer including a scan contact hole disposed between the first scan line and the third scan line, and a recess pattern disposed between the second scan line and the third scan line.
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/PREMAL R PATEL/Primary Examiner, Art Unit 2624
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