DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 4-5, 9-10, and 16 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by [Jeon; Joo-Hee et al., US 20210319747 A1].
Regarding claim 1:
Jeon discloses:
1. A light emitting display apparatus [Jeon: Fig.1: display device 100], comprising:
a light emitting device (ED) [Jeon: Fig.2: organic light emitting diode OLED] configured to emit light [Jeon: ¶ 0089: “the organic light emitting diode OLED may generate light”];
and a pixel driving circuit (PDC) [Jeon: Fig.2: pixel circuit PC] configured to drive the light emitting device (ED) [Jeon: Fig.2: organic light emitting diode OLED; ¶ 0089: “a driving current corresponding to the data voltage Vdata may flow through the organic light emitting diode OLED”],
wherein the pixel driving circuit (PDC) [Jeon: Fig.2: pixel circuit PC] comprises:
a first circuit part (1CU) [Jeon: Fig.2; Examiner: The group T1-T5, CL and CST is construed as the claimed “first circuit part.”] including a driving transistor (Tdr) [Jeon: Fig.2: first transistor T1], the first circuit part (1CU) [Jeon: Fig.2; Examiner: The group T1-T5, CL and CST is construed as the claimed “first circuit part.”] connected to a data line (DL) [Jeon: Fig.2: data line DLm; ¶ 0061: “The second transistor T2 … a first electrode connected to the m.sup.th data line DLm”] and connected to a first driving voltage line (1DVL) [Jeon: Fig.2: first initialization voltage line IVL1; ¶ 0070: “The fourth-second transistor T4-2… a second electrode a … connected to the first initialization voltage line IVL1”] to which a first driving voltage (Va) [Jeon: Fig.2: first initialization voltage Vinit1] is for being supplied [Jeon: ¶ 0064: “ The first initialization voltage line IVL1 may transmit a first initialization voltage Vinit1”];
a second circuit part (2CU) [Jeon: Fig.2: T7; Examiner: T7 is construed as the claimed “second circuit part.”] connected to the light emitting device (ED) [Jeon: Fig.2: organic light emitting diode OLED; ¶ 0075: “The seventh transistor T7 … a second electrode connected to the anode electrode of the organic light emitting diode OLED”] and connected to a second driving voltage line (2DVL) [Jeon: Fig.2: second initialization voltage line IVL2; ¶ 0075: “The seventh transistor T7 … a first electrode connected to the second initialization voltage line IVL2”] to which a second driving voltage (Vb) [Jeon: Fig.2: Vinit2] is for being supplied [Jeon: ¶ 0075: “The second initialization voltage line IVL2 may transmit a second initialization voltage Vinit2”];
and an emission transistor (T6) [Jeon: Fig.2: sixth transistor T6] connected between the first circuit part (1CU) [Jeon: Fig.2; Examiner: The group T1-T5, CL and CST is construed as the claimed “first circuit part.”] and the second circuit part (2CU) [Jeon: Fig.2: T7; Examiner: T7 is construed as the claimed “second circuit part.”; Examiner: As shown in Fig.2, T6 is between the T1-5, CL and Cst group and T7].
Regarding claim 4:
Jeon discloses:
4. The light emitting display apparatus [Jeon: Fig.1: display device 100] of claim 1,
wherein, during a threshold voltage sensing period (B) [Jeon: ¶ 0084: “As described above, during the second interval b of the frame, the threshold voltage Vth of the first transistor T1 may be compensated”], the first circuit part (1CU) [Jeon: Fig.2; Examiner: The group T1-T5, CL and CST is construed as the claimed “first circuit part.”] and the second circuit part (2CU) [Jeon: Fig.2: T7; Examiner: T7 is construed as the claimed “second circuit part.”] are electrically separated by the emission transistor (T6) [Jeon: Fig.2: sixth transistor T6; ¶ 0081: “During a second interval b … the second transistor T2, and the third-first transistor T3-1 and the third-second transistor T3-2 having the dual connection structure may be turned on, and the remaining transistors T1, T4, T5, T6, and T7 may be turned off”; Examiner: With emission transistor T6 off, the first circuit part is electrically isolated from the second circuit part.], and a threshold voltage of the driving transistor (Tdr) [Jeon: Fig.2: first transistor T1] is stored in the first circuit part (1CU) [Jeon: Fig.2; Examiner: The group T1-T5, CL and CST is construed as the claimed “first circuit part.”; ¶ 0082: “, the first transistor T1 may be diode-connected. A difference value in voltage between a voltage applied to the second node N2 and corresponding to the data voltage Vdata applied to the m.sup.th data line DLm and a threshold voltage Vth of the first transistor T1 may be applied to the first node N1. Accordingly, a difference value in voltage between absolute values of the voltage corresponding to the data voltage Vdata and the threshold voltage Vth may be applied to the first node N1 to compensate for the threshold voltage of the first transistor T1”; ¶ 0083: “ the first capacitor CST may be charged with the voltage corresponding to the data voltage Vdata applied to the m.sup.th data line DLm”; Examiner: The diode-connection stores a Vth-incorporating voltage on storage capacitor Cst, which lies within the first circuit part].
Regarding claim 5:
Jeon discloses:
5. The light emitting display apparatus [Jeon: Fig.1: display device 100] of claim 1,
wherein, during a data writing period (C) [Jeon: ¶ 0083: “the first capacitor CST may be charged with the voltage corresponding to the data voltage Vdata applied to the m.sup.th data line DLm”; Examiner: Jeon’s second interval b, during which the data voltage is written into CST, is the data writing period under BRI.], the first circuit part (1CU) [Jeon: Fig.2; Examiner: The group T1-T5, CL and CST is construed as the claimed “first circuit part.”] and the second circuit part (2CU) [Jeon: Fig.2: T7; Examiner: T7 is construed as the claimed “second circuit part.”] are electrically separated by the emission transistor (T6) [Jeon: Fig.2: sixth transistor T6; ¶ 0081: “During a second interval b … the second transistor T2, and the third-first transistor T3-1 and the third-second transistor T3-2 having the dual connection structure may be turned on, and the remaining transistors T1, T4, T5, T6, and T7 may be turned off”; Examiner: With emission transistor T6 off, the first circuit part is electrically isolated from the second circuit part.], and a data voltage supplied through the data line (DL) [Jeon: Fig.2: data line DLm] is stored in the first circuit part (1CU) [Jeon: Fig.2: mth data line DLm via second transistor, first capacitor CST; ¶ 0061: “ a first electrode connected to the m.sup.th data line DLm, and a second electrode connected to the second node N2. The m.sup.th data line DLm may transmit a data voltage Vdata corresponding to the pixel P”; ¶ 0083: “the first capacitor CST may be charged with the voltage corresponding to the data voltage Vdata applied to the m.sup.th data line DLm” T2; Examiner: The data voltage from DLm is stored on the storage capacitor CST within the first circuit part.].
Regarding claim 9:
Jeon discloses:
9. The light emitting display apparatus [Jeon: Fig.1: display device 100] of claim 1,
wherein, during a light emission period (E) [Jeon: ¶ 0088: “During a fourth interval d of the frame, when a low-level n.sup.th emission-on voltage is applied to the n.sup.th emission control line ELn”; Examiner: Jeon’s fourth interval d, the emission-on interval, is the light emission period under BRI], the first circuit part (1CU) [Jeon: Fig.2; Examiner: The group T1-T5, CL and CST is construed as the claimed “first circuit part.”] and the second circuit part (2CU) [Jeon: Fig.2: T7; Examiner: T7 is construed as the claimed “second circuit part.”] are electrically connected by the emission transistor (T6) [Jeon: Fig.2: sixth transistor T6; ¶ 0088: “the fifth and sixth transistors T5 and T6 may be turned on”; Examiner: With T6 on, the first and second circuit part are electrically connected together.], and light is emitted from the light emitting device (ED) [Jeon: Fig.2: organic light emitting diode OLED] by a current supplied from the driving transistor (Tdr) [Jeon: Fig.2: first transistor T1] through the emission transistor (T6) [Jeon: Fig.2: first transistor T1, sixth transistor T6 and OLED; ¶ 0089: “the first transistor T1 may be turned on by the voltage stored in the first capacitor CST and corresponding to the data voltage Vdata, and a driving current corresponding to the data voltage Vdata may flow through the organic light emitting diode OLED. As a result, the organic light emitting diode OLED may generate light having a gray scale corresponding to an image”; Examiner: The driving current generated by the driving transistor T1 reaches the OLED through the sixth transistor T6.].
Regarding claim 10:
Jeon discloses:
10. The light emitting display apparatus [Jeon: Fig.1: display device 100] of claim 1,
wherein the pixel driving circuit (PDC) [Jeon: Fig.2: pixel circuit PC] further comprises an auxiliary emission transistor (T7) [Jeon: Fig.2: fifth transistor T5] connected between a first voltage supply line (PLA) [Jeon: Fig.2: power supply voltage line PVL] supplied with a first voltage (ELVDD) [Jeon: Fig.2: ELVDD] and the driving transistor (Tdr) [Jeon: Fig.2: first transistor T1; ¶ 0126: “a first electrode connected to the power supply voltage line PVL, and a second electrode connected to the second node N2”; ¶ 0059: “The first transistor T1 … a first electrode connected to a second node N2”].
Regarding claim 16:
Jeon discloses:
16. The light emitting display apparatus [Jeon: Fig.1: display device 100] of claim 1,
wherein the second circuit part (2CU) [Jeon: Fig.2: T7; Examiner: T7 is construed as the claimed “second circuit part.”] comprises: a fifth transistor (T5) [Jeon: Fog.2: seventh transistor T7] connected between the second driving voltage line (2DVL) [Jeon: Fig.2: second initialization voltage line IVL2] and a first terminal of the light emitting device (ED) [Jeon: Fig.2: organic light emitting diode OLED; ¶ 0128: “ The seventh transistor T7 … a first electrode connected to the second initialization voltage line IVL2, and a second electrode connected to the anode electrode of the organic light emitting diode OLED”];
and a third capacitor (Coled) connected between the first terminal of the light emitting device (ED) [Jeon: Fig.2: organic light emitting diode OLED] and a second terminal of the light emitting device (ED) [Jeon: Fig.2: organic light emitting diode OLED; Examiner: An OLED necessarily exhibits an intrinsic capacitance between its anode (first terminal) and cathode (second terminal), which is an inherent parallel capacitance that is necessarily present.],
wherein the emission transistor (T6) [Jeon: Fig.2: sixth transistor T6] is connected between the first circuit part (1CU) [Jeon: Fig.2; Examiner: The group T1-T5, CL and CST is construed as the claimed “first circuit part.”] and the first terminal of the light emitting device (ED) [Jeon: Fig.2: organic light emitting diode OLED; Examiner T6 connects the first circuit part to the anode (first terminal) of the OLED.].
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over [Jeon; Joo-Hee et al., US 20210319747 A1] in view of [Hong; Soonhwan et al., US 20200152130 A1].
Regarding claim 12:
Jeon discloses:
12. The light emitting display apparatus [Jeon: Fig.1: display device 100] of claim 1.
However, Jeon does not expressly disclose:
wherein the second driving voltage (Vb) is lower than an anode voltage that causes the light emitting device (ED) to emit light.
Hong discloses:
wherein the second driving voltage (Vb) is lower than an anode voltage that causes the light emitting device (ED) to emit light [Hong: Fig.4: first initialization transistor T6 applying Vini to the OLED anode; ¶ 0054: “The initialization voltage Vini is selected within a voltage range sufficiently lower than the operation voltage of the OLED and can be set to be equal to or lower than the low potential voltage ELVSS”].
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to set the second driving voltage (Vinit2) of Jeon lower than the anode voltage that causes the OLED to emit, as taught by Hong [¶ 0054], in order to ensure the OLED does not emit during Jeon’s interval c and to fully reset the anode to non-emitting level for accurate low-gray-level black rendering. The modification applies Hong’s known anode-reset technique to the anode-initialization operation Jeon already performs, yielding the predictable result of a properly reset, non-emitting anode. Jeon and Hong are analogous art, both OLED pixel driving circuits, and the change is merely selecting the voltage level for an existing operation, with a reasonable expectation of success.
Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over [Jeon; Joo-Hee et al., US 20210319747 A1].
Regarding claim 13:
Jeon discloses:
13. The light emitting display apparatus [Jeon: Fig.1: display device 100] of claim 5.
However, Jeon does not expressly disclose:
wherein the data voltage (Vdata) [Jeon: Fig.4: Vdata] supplied through the data line (DL) [Jeon: Fig.2: data line DLm] is greater than 0.
It is well known and conventional in OLED display data drivers to generate data voltages from a positive gamma-voltage range, i.e., data voltages greater than 0, referenced to a ground or low-potential supply. The Examiner takes Official Notice that supplying a data voltage greater than 0 was conventional and well known before the effective filing date.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to implement Jeon’s grayscale data voltage Vdata as a positive (>0) data voltage, because positive gamma-referenced data voltages are the conventional implementation of a data driver, and doing so permits a single-polarity data driver output, the same benefit the application itself acknowledges, namely driving “using only data voltages having positive values” so there is “no need to manufacture a data driver for outputting data voltages of various levels” [App: ¶ 0199]. This is at most the selection of a conventional, workable voltage range/reference, yielding the predictable result of normal grayscale driving. Jeon’s gate-stored compensation operates without modification under a positive data voltage, so there is a reasonable expectation of success and no change to its principle of operation.
Documentary Evidence: [Cho; Kyung-Hyun et al., US 20210166637 A1: ¶ 0086: “a very high data voltage (a voltage greater than 0V) is supplied through the data line DL”]
Allowable Subject Matter
Claims 2-3, 6-8, 11, and 14-15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 2:
The prior art does not teach or suggest either singularly or in combination the at least claimed “wherein a current flowing through the light emitting device (ED) is controlled by a data voltage (Vdata) and the first driving voltage (Va)”, in combination with the other recited claim features.
Regarding claim 3:
The prior art does not teach or suggest either singularly or in combination the at least claimed “wherein, during an initialization period, the first circuit part (1CU) and the second circuit part (2CU) are electrically connected by the emission transistor (T6), and the driving transistor (Tdr) and the light emitting device (ED) are initialized by the second driving voltage (Vb)”, in combination with the other recited claim features.
Regarding claim 6:
The prior art does not teach or suggest either singularly or in combination the at least claimed “wherein, during the data writing period (C), the light emitting device (ED) is initialized by the second circuit part (2CU)”, in combination with the other recited claim features.
Regarding claim 7:
The prior art does not teach or suggest either singularly or in combination the at least claimed “wherein, during a reset period (D), the first circuit part (1CU) and the second circuit part (2CU) are electrically connected by the emission transistor (T6), and the driving transistor (Tdr) and the light emitting device (ED) are initialized by the second circuit part (2CU)”, in combination with the other recited claim features.
Regarding claim 8:
Claim 8 depends on claim 7 and is found allowable for at least the same reason as discussed above.
Regarding claim 11:
The prior art does not teach or suggest either singularly or in combination the at least claimed “wherein the auxiliary emission transistor (T7) is turned off during an initialization period (A) in which the driving transistor (Tdr) and the light emitting device (ED) are initialized by the second driving voltage (Vb)”, in combination with the other recited claim features.
Regarding claim 14:
The prior art does not teach or suggest either singularly or in combination the at least claimed “wherein the light emitting device (ED) is initialized by the second circuit part (2CU) during an initialization period (A) in which the driving transistor (Tdr) is initialized, during a threshold voltage sensing period (B) in which a threshold voltage of the driving transistor (Tdr) is sensed, during a data writing period (C) in which a data voltage is supplied through the data line (DL), and during a reset period (D) between the data writing period (C) and a light emission period (E) in which light is emitted”, in combination with the other recited claim features.
Regarding claim 15:
The prior art does not teach or suggest either singularly or in combination the at least claimed “wherein the first circuit part (1CU) comprises: the driving transistor (Tdr) including a first terminal connected to a first voltage supply line;
a first transistor (T1) including a first terminal connected to the data line (DL);
a first capacitor (C1) connected between a gate of the driving transistor (Tdr) and a second terminal of the first transistor (T1);
a second transistor (T2) connected between a reference voltage supply line (RVL) and the gate of the driving transistor (Tdr);
a third transistor (T3) connected between the second terminal of the first transistor (T1) and a second terminal of the driving transistor (Tdr);
a second capacitor (C2) connected between the second terminal of the first transistor (T1) and the second terminal of the driving transistor (Tdr);
and a fourth transistor (T4) connected between the first driving voltage line (1DVL) and the second terminal of the driving transistor (Tdr),
wherein the emission transistor (T6) is connected between the second terminal of the driving transistor (Tdr) and the second circuit part (2CU)”, in combination with the other recited claim features.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
[Choi; Jae Hyuk et al., US 20250225932 A1] discloses:
“A display device having high integration density and high resolution includes a pixel circuit and a light-emitting element connected between a second node of the pixel circuit and a common voltage line, wherein the pixel circuit includes a first transistor, which is connected between a driving voltage line and the second node, where the first transistor includes a gate electrode, which is connected to a first node, and a counter gate electrode, which is connected to an emission line,” as recited in the abstract.
Inquiry
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Koosha Sharifi-Tafreshi whose telephone number is (571)270-5897. The examiner can normally be reached Mon - Fri 8AM to 5PM EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Nitin Patel can be reached at (571) 272-7677. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KOOSHA SHARIFI-TAFRESHI/Primary Examiner, Art Unit 2628
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