DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 11-13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 11:
It recites a fourth transistor that includes “a fourth source,” “a fourth drain,” and “a fourth gate.”
It also recites a fifth transistor, and says “wherein the fifth transistor includes the fourth drain.”
How can the fifth transistor include the fourth drain if the fourth transistor includes the fourth drain? It cannot be part of both transistors.
Additionally, this claim recites that the fourth transistor includes “a fourth drain connected to a fifth source of the fifth transistor.” But the fifth transistor is recited as “configured for initializing.” In the specification, the transistor for initializing is, e.g., Fig. 5: 560. The source of this transistor is not directly connected to anything except the Vint line. This language needs to be clarified so that it can be understood what it means when it says these elements are connected: is it just saying they are all part of the same circuit and so connected in some distant way?
Overall this claim is confusing and needs to be clarified so it can be understood what the fourth drain is a part of, and what it is connected to. At this point it is impossible to understand what would or wouldn’t meet this claim language.
Regarding claims 12-13:
They are dependent on claim 11.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Uetake (US 2015/0145906) in view of Lee et al. (US 2021/0390902) and further in view of Watsuda (US 10,803,789)
Regarding claim 1:
Uetake discloses some but not every element of the claim as follows:
Claim 1
Uetake
1. An electronic device comprising:
a display panel including a plurality of sub-pixels;
Fig. 1
a processor comprising processing circuitry;
Fig. 1
and display driver circuitry,
Fig. 1
wherein each of the plurality of the sub-pixels includes:
a first light-emitting element configured to emit light in a first mode for low power and second light-emitting elements configured to emit light in a second mode different from the first mode, each of said light-emitting elements comprising an electrode;
Fig. 2: small light emitting area SR and large light emitting area LR, where, e.g., paragraph 58 discusses that the low tone element (SR) is lower power; Uetake only has a single light emitting element for each mode for each sub-pixel.
a driving transistor configured to provide a current to the first light-emitting element and the second light-emitting elements;
Fig. 3: DR
a switch between at least a drain of the driving transistor and the first light-emitting element and the second light-emitting elements,
Uetake has a switch Fig. 3: RS, and possibly a second switch for the first light-emitting element as per paragraph 41, but not a single switch in this position
wherein the display driver circuitry is configured to:
receive, from the processor, a signal instructing a mode in which the display driver circuitry drives,
Fig. 3: control line WL
in the first mode identified based on the signal, control the first light-emitting element to emit light via a first path, which is formed based on the switch, connecting the first light-emitting element to the driving transistor, and
Paragraph 40: “whether the current is allowed to flow into the large light emitting element LL, or not,” where as per paragraph 41 whether it flows into the small light emitting element EL may also be controlled
in the second mode identified based on the signal, control the second light-emitting elements to emit light via a second path, which is formed based on the switch, connecting the second light-emitting elements to the driving transistor, wherein the second path is different than the first path.
Paragraph 40: “whether the current is allowed to flow into the large light emitting element LL, or not,
Therefore Uetake does not disclose:
(A) “second light-emitting elements” (Uetake only has a second light-emitting element);
(B) “a switch between at least a drain of the driving transistor and the first light-emitting element and the second light-emitting elements,”
Regarding (A):
Lee discloses:
second light-emitting elements (Fig. 5: LSU2)
It would have been obvious to one of ordinary skill in the art at the time the application was filed to include in Uetake the elements taught by Lee.
The rationale is as follows:
Uetake and Lee are directed to the same field of art. Lee discloses a light emitting element may be a combination of multiple light emitting elements (e.g., paragraph 69). This is used in the same environment, for the same purpose, and achieves the same result. One of ordinary skill in the art could have substituted this with predictable results.
Regarding (B):
Watsuda discloses:
a switch between at least a drain of the driving transistor and the first light-emitting element and the second light-emitting elements (Fig. 7; where the driving unit is 10, and the switch is 12)
It would have been obvious to one of ordinary skill in the art at the time the application was filed to include in Uetake in view of Lee the elements taught by Watsuda.
The rationale is as follows:
Uetake, Lee, and Watsuda are directed to the same field of art.
Uetake discloses (e.g., paragraphs 40-41) that there could be a first switch for the first light-emitting element and a second switch for the second. Watsuda discloses there could instead be a single switch controlled by a single line. This could, e.g., simplify manufacturing. This is a known improvement that one of ordinary skill in the art could have included with predictable results.
Regarding claim 2:
Uetake, etc., discloses:
wherein the display driver circuitry is configured to: in response to identifying that the mode instructed by the signal is the first mode, provide a voltage of a first value to the switch of each of the plurality of the sub-pixels, and in response to identifying that the mode instructed by the signal is the second mode, provide a voltage of a second value different from the first value to the switch of each of the plurality of the sub-pixels (follows from Watsuda column 4, line 60 to column 5, line 15: one line is used to control both switches, and because they are n and p type, respectively, one value turns on one and turns off the other).
Regarding claim 3:
Uetake, etc., discloses:
wherein the switch includes a first transistor and a second transistor of a different type from the first transistor, wherein the switch is configured to form the first path using the first transistor based on a voltage of the first value, and wherein the switch is configured to form the second path using the second transistor based on a voltage of the second value (follows from the circuit of Watsuda Fig. 7).
Regarding claim 4:
Uetake, etc., discloses:
wherein the first transistor includes an N-type metal oxide semiconductor (NMOS) transistor, wherein the second transistor includes a P-type metal oxide semiconductor (PMOS) transistor, and wherein the switch is connected to an anode of the first light-emitting element and an anode of each of the second light-emitting elements (shown in Watsuda Fig. 7).
Regarding claim 5:
Uetake, etc., discloses:
wherein the display driver circuitry is configured to: obtain an image from the processor, in the first mode, based on performing a first scan in accordance with a first time interval based on a data voltage for displaying the image and/or a second scan in accordance with a second time interval shorter than the first time interval based on a bias voltage for the driving transistor, control the first light-emitting element to emit light (Uetake scans at intervals per frame as per, e.g., paragraph 42 – there is no bias voltage discussion here but as this says “and/or” just performing the first scan is required to meet this language).
Regarding claim 6:
Uetake, etc., discloses:
wherein the display driver circuitry is configured to: obtain an image from the processor, in the second mode, based on performing a first scan in accordance with a first time interval based on a data voltage for displaying the image, control the second light-emitting elements to emit light (it scans as per Uetake paragraph 42, where it might control the second as already discussed).
Regarding claim 7:
Uetake, etc., discloses:
wherein the switch is connected to an anode of the first light-emitting element and an anode of each of the second light-emitting elements (follows from Lee Fig. 5, where in the figure some elements are connected the wrong way, but these do not emit light and so are not light-emitting elements).
Claim(s) 8-10 and 14-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liu (US 2023/0073465) in view of Lee et al. (US 2021/0390902).
Regarding claim 8:
Liu discloses:
Claim 8
Liu
8. A display panel comprising:
a sub-pixel of the display panel including:
Fig. 4
a first light-emitting element comprising an electrode;
Fig. 4: LED2
second light-emitting elements comprising an electrode;
Fig. 4: LED1, but there is just one second light-emitting element
a driving transistor configured to provide a current to the first light-emitting element and the second light-emitting elements;
Fig. 4: T3
an emitting control transistor connected to a drain of the driving transistor; and
Fig. 4: T6
a switch including a first transistor and a second transistor,
Fig. 4: T7 and T9
wherein the first transistor includes a first source connected to a drain of the emitting control transistor, a first drain connected to an anode of the first light-emitting element, and a first gate,
As seen in Fig. 4
wherein the second transistor includes a second source connected to the drain of the emitting control transistor, a second drain connected to an anode of each of the second light-emitting elements, and a second gate connected to the first gate, and
As seen in Fig. 4
wherein the display panel is configured so that a control signal for driving the switch is applied to the first gate and the second gate.
Shown in, e.g., Figs. 5-6, where the control signal at the gates of T7 and T9 determines which path is lit
Therefore Liu does not disclose:
“second light-emitting elements” (Lee only has a second light-emitting element);
Lee discloses:
second light-emitting elements (Fig. 5: LSU2)
It would have been obvious to one of ordinary skill in the art at the time the application was filed to include in Liu the elements taught by Lee.
The rationale is as follows:
Liu and Lee are directed to the same field of art. Lee discloses a light emitting element may be a combination of multiple light emitting elements (e.g., paragraph 69). This is used in the same environment, for the same purpose, and achieves the same result. One of ordinary skill in the art could have substituted this with predictable results.
Regarding claim 9:
Liu, etc., discloses:
wherein the display panel is configured so that: a path connecting the first transistor based on the driving of the switch to the first light-emitting element is formed in response to the control signal, having a voltage of a first value, applied to the first gate and the second gate, and a path connecting the second transistor based on the driving of the switch to the second light-emitting elements is formed in response to the control signal, having a voltage of a second value different from the first value, applied to the first gate and the second gate (Liu Figs. 6 and 8).
Regarding claim 10:
Liu, etc., discloses:
wherein the sub-pixel further includes a third transistor configured to compensate for a voltage, wherein the third transistor includes a third source connected to the drain of the driving transistor, a third drain connected to a gate of the driving transistor, and a third gate to which a first scan signal is applied (Liu Fig. 4: T5).
Regarding claim 14:
Liu, etc., discloses:
wherein the switch further includes a selecting transistor (Fig. 4: T8), wherein the selecting transistor includes a source connected to the second drain, a drain connected to the first drain, and a gate to which the controlling signal is to be applied, wherein the source of the selecting transistor is connected to an anode of each of the second light-emitting elements, and wherein the drain of the selecting transistor is connected to an anode of the first light-emitting element (as seen in Fig. 4).
Regarding claim 15:
Liu, etc., discloses:
wherein the display panel is configured so that: a path connecting the first transistor based on the driving of the switch to the first light-emitting element is formed in response to the control signal, having a voltage of a first value, applied to the first gate, the second gate, and the gate of the selecting transistor, and a path connecting the second transistor based on the driving of the switch to the first light-emitting element and the second light-emitting elements is formed in response to the control signal, having a voltage of a second value different from the first value, applied to the first gate, the second gate, and the gate of the selecting transistor (Liu Figs. 6 and 8).
Regarding claim 16:
Liu, etc., discloses:
wherein the first transistor includes an N-type metal oxide semiconductor (NMOS) transistor, wherein the second transistor includes a P-type metal oxide semiconductor (PMOS) transistor, and wherein the selecting transistor includes a PMOS transistor (Liu paragraph 123).
Claim(s) 18-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liu in view of Lee, and further in view of Akimoto et al. (US 2012/0050252)
Regarding claim 18:
Liu in view of Lee discloses a display panel as discussed above.
Liu in view of Lee does not disclose:
“wherein the sub-pixel further includes a compensation capacitor, and wherein the compensation capacitor connects a gate of the driving transistor to the drain of the driving transistor.”
Akimoto discloses:
wherein the sub-pixel further includes a compensation capacitor (Fig. 3: 306), and wherein the compensation capacitor connects a gate of the driving transistor to the drain of the driving transistor (as shown in Fig. 3, where 303 is the driving transistor, and it is connected to the drain through emission control transistor 302).
It would have been obvious to one of ordinary skill in the art at the time the application was filed to include in Liu in view of Lee the elements taught by Akimoto.
The rationale is as follows:
Liu, Lee, and Akimoto are directed to the same field of art.
Akimoto discloses that this holding capacitor allows it to pre-charge the voltage and account for the threshold voltage (e.g., paragraph 86). This is a known improvement that one of ordinary skill in the art could have included with predictable results.
Regarding claim 19:
Liu, etc., discloses:
wherein the sub-pixel further includes a compensating capacitor, wherein the compensating capacitor connects a gate of the driving transistor to the drain of the emitting control transistor (Akimoto Fig. 3 as just discussed).
Allowable Subject Matter
Claims 17-18 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 17:
The closest prior art of record, Liu in view of Lee, does not teach or suggest wherein the sub-pixel further includes a third emitting control transistor and a compensation capacitor, wherein the third emitting control transistor includes a source connected to a gate of the driving transistor, a drain connected to the compensation capacitor, and a gate to which an emission signal is to be applied, and wherein the compensation capacitor is connected to the drain of the third emitting control transistor, the anode of the first light-emitting element, and an anode of each of the second light-emitting elements. Note that a compensation capacitor in and of itself is taught by, e.g., Akimoto, as discussed in the rejection of claim 18 above, but this in combination with a third emitting control transistor with the claimed connections to other elements is not taught by the prior art. This limitation in combination with the other limitations of the claim render it allowable over the prior art of record.
Regarding claim 20:
It is dependent on claim 17.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kwak et al. (US 2006/0022909).
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/CHRISTOPHER R LAMB/Primary Examiner, Art Unit 2622
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