Prosecution Insights
Last updated: August 17, 2026
Application No. 19/397,685

INTEGRATION OF LITHIUM NIOBATE PHOTONICS DEVICES

Final Rejection §103
Filed
Nov 21, 2025
Priority
Nov 25, 2024 — provisional 63/724,843
Examiner
MANHEIM, MARC ETIENNE
Art Unit
2874
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Hyperlight Corporation
OA Round
2 (Final)
85%
Grant Probability
Favorable
3-4
OA Rounds
2y 3m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
33 granted / 39 resolved
+16.6% vs TC avg
Strong +18% interview lift
Without
With
+18.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
21 currently pending
Career history
72
Total Applications
across all art units

Statute-Specific Performance

§103
53.9%
+13.9% vs TC avg
§102
22.0%
-18.0% vs TC avg
§112
24.1%
-15.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 39 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The prior art documents submitted by applicant in the Information Disclosure Statements filed 11/21/2025 and 05/05/2026 have all been considered and made of record. Joint Inventors This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Response to Amendments Applicant’s amendment filed 06/17/2026 has been considered and entered. The objections to the drawings and specification set forth in the office action received 03/17/2026 are withdrawn in view of the applicant’s amendments. The rejections under 35 USC 112 set forth in the in the office action received 03/17/2026 are withdrawn in view of applicant’s amendments and remarks. Response to Arguments The applicant’s arguments filed 06/17/2026 and pertaining to claims 1 and 17 have been fully considered but are not persuasive. With regards to claims 1 and 17, applicant has argued that claims 1 and 17 have “…been amended to incorporate limitations analogous to allowable claim 19, reciting that the via(s) provide electrical connection between the additional IC and the TFLC PIC and that the via(s) are formed after mechanical coupling of the additional IC and the TFLC PIC…”. However, allowable claim 19 as presented in the claims received 11/21/2025 was a method claim, whereas claims 1 and 17 are both device claims. The limitation “…the via(s) are formed after mechanical coupling of the additional IC and the TFLC PIC…” now contributes to the allowability of the fabrication of method claim 18 (See the Allowable Subject Matter section of this office action), but the limitation only defines the claimed package devices of claims 1 and 17 in terms of the order in which constituent elements of said packages are formed and the patentability of a product does not depend on its method of production (See MPEP 2113). Claims 1 and 17 are rejected under 35 USC 103 in over Baudot in view of Hung since Baudot and Hung together still disclose the device limitations of the claimed packages (See the 35 USC 103 section of this office action). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-2, 4-11, 13-17 are rejected under 35 U.S.C. 103 as being unpatentable over Baudot (US 20250102751 A1) in view of Hung (US 20250390001 A1). With regards to claim 1, Baudot discloses a photonics device package, comprising: a thin film lithium-containing (TFLC) photonics integrated circuit (PIC) (Baudot/Figs1a&1d/TFLC PIC 100a&d), the TFLC PIC including a plurality of TFLC optical structures (Figs1a&2a/Optical structures 106) and a plurality of electrodes (Figs1a&2a/Electrodes 109), the plurality of TFLC optical structures including at least one TFLC electro-optic material (Paragraph 62/Lines 1-4), the TFLC PIC having a footprint (Fig1a/Footprint of element 100a), the plurality of TFLC optical structures occupying not more than fifty percent of the footprint (Fig1a), the plurality of TFLC structures being encapsulated in the TFLC PIC (Figs1a&1d/Encapsulant 115); an additional integrated circuit (IC) mechanically coupled with the TFLC PIC (Fig2a/Additional IC 204) after formation of the plurality of TFLC structures; and at least one via extending through at least a portion of the TFLC PIC in a particular region of the footprint not occupied by the plurality of TFLC optical structures (Baudot/Fig2a/Via [Tallest instance of element 109]), the at least one via being at least partially filled with a conductive material such that the additional IC is electrically coupled with the TFLC PIC through at least one via (“…metallization layers…”), the at least one via being formed through the at least the portion of the TFLC PIC after the additional IC is mechanically coupled with the TFLC PIC. Baudot does not disclose the at least one via being formed through the at least the portion of the TFLC PIC after the additional IC is mechanically coupled with the TFLC PIC. However, the above limitation only defines the claimed photonics device package in terms of the order in which constituent elements of said package are formed and the patentability of a product does not depend on its method of production (See MPEP 2113). Baudot does not disclose the at least one via extending through at least a portion of the additional IC in the embodiment relied upon above, but does disclose the at least one via extending through at least a portion of the additional IC in the similar embodiment relating to fig. 3a (Baudot/Figs3a&3c/Via 109 [A portion extends beyond element 314 as indicated below]), wherein a portion of the TFLC PIC is located within a cavity of the additional IC. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the photonics device of Baudot in the above fashion as suggested by Baudot since doing so would facilitate alignment when attaching the TFLC PIC to the additional IC. PNG media_image1.png 335 531 media_image1.png Greyscale Baudot is silent regarding at least one TFLC optical structure of the plurality of TFLC optical structures including a ridge and a slab and having a width not exceeding one micrometer. However, the practices of configuring a TFLC optical structure to include a ridge and a slab and configuring a TFLC optical structure to have a width not exceeding one micrometer exist in the art as exemplified by Hung. Baudot and Hung are considered to be analogous in the field of TFLC photonic integrated circuits. Bardot discloses a TFLC PIC comprising a plurality of TFLC optical structures. Hung teaches at least one TFLC optical structure of the plurality of TFLC optical structures including a ridge and a slab (Hung/Fig8/Ridge 825a and slab [Portion of element 820 indicated below]) and having a width not exceeding one micrometer (Hung/Paragraph 106/Lines 7-9). PNG media_image2.png 152 222 media_image2.png Greyscale It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure at least one TFLC optical structure of the plurality of TFLC optical structures of Baudot to include a ridge and a slab and have a width not exceeding one micrometer as suggested by Hung since doing so would facilitate single mode operation within the photonics device package. With regards to claim 2, Baudot and Hung together disclose the photonics device package of claim 1, wherein the plurality of TFLC optical structures occupies not more than ten percent of the footprint and at least one percent of the footprint (Bardot/Fig1a). With regards to claim 4, Baudot and Hung disclose the photonics device package of claim 1, wherein the one of the TFLC PIC and the additional IC is flip-chip mounted on the other of the additional IC and the TFLC PIC (Baudot/Paragraph 71/Lines 1-6). With regards to claim 5, Baudot and Hung disclose the photonics device package of claim 4, wherein the additional IC is selected from an electronic IC and a photonics IC (Baudot/Fig2a; Paragraph 72/Lines 12-14). With regards to claim 6, Baudot and Hung together disclose the photonics device package of claim 5, wherein the additional IC is the electronic IC electrically coupled with the TFLC PIC (Fig2a/Electrical coupling [By way of element 210]), and wherein the photonics device package further includes: the photonics IC, the photonics IC being optically and mechanically coupled with the TFLC PIC and the electronic IC (Paragraph 72/Lines 12-14/ “…other companion chips…”). With regards to claim 7, Baudot and Hung together the photonics device package of claim 1. Baudot and Hung are silent regarding whether or not the photonics device package has an average microwave dielectric index excluding metal areas for a 100 GHz microwave signal for a region at a distance of not more than twenty micrometers centered at the ridge of the at least one TFLC optical structure of less than 10. However, it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the photonics device package of Baudot and Hung such that an average microwave dielectric index excluding metal areas for a 100 GHz microwave signal for a region at a distance of not more than twenty micrometers centered at the ridge of the at least one TFLC optical structure of less than 10, since doing so would yield lower dielectric loss and reduced crosstalk between tightly spaced features. With regards to claim 8, Baudot and Hung together disclose the photonics device package of claim 7, wherein the region includes a portion of the TFLC PIC and a portion of the additional IC (Baudot/Fig2a). With regards to claim 9, Baudot and Hung together disclose the photonics device package of claim 1, wherein at least a portion of the plurality of electrodes is formed after the TFLC PIC and the additional IC are mechanically coupled (Baudot/Fig2a). With regards to claim 10, Baudot and Hung together disclose the photonics device package of claim 1, wherein the TFLC PIC further includes: at least one waveguiding structure optically coupled with the at least one TFLC optical structure (Baudot/Fig2a/At least one waveguide structure 104). With regards to claim 11, Baudot and Hung together disclose the photonics device package of claim 10, wherein the at least one waveguiding structure surrounds at least a portion of the at least one TFLC optical structure (Baudot/Fig1a); and wherein the at least one waveguiding structure excludes lithium as-fabricated (Paragraph 67/Lines 1-5). With regards to claim 13, Baudot and Hung together disclose the photonics device package of claim 1, wherein the additional IC is a photonics IC having a waveguide optically coupled with the at least one TFLC optical structure (Baudot/Fig2a/Waveguide 206); and wherein a portion of the waveguide is adjacent to at least a portion of the slab of the at least one TFLC optical structure (Baudot/Fig2a). With regards to claim 14, Baudot and Hung together disclose the photonics device package of claim 13, wherein the photonics IC has a cavity therein, at least a portion of the TFLC PIC being in the cavity (Paragraph 76/Lines 1-3). With regards to claim 15, Baudot and Hung together disclose the photonics device package of claim 1, a portion of the at least one TFLC optical structure is between a first electrode and a second electrode of the plurality of electrodes (Fig1a). Baudot and Hung together do not disclose the first electrode as being closer to the additional IC than the portion of the at least one TFLC optical structure is and the second electrode being further from the additional IC than the portion of the at least one TFLC optical structure is in the embodiment of Baudot relied upon for claim 1, but do disclose the first electrode as being closer to the additional IC than the portion of the at least one TFLC optical structure is and the second electrode being further from the additional IC than the portion of the at least one TFLC optical structure is in the similar embodiment relating to fig. 3a of Baudot (Baudot/Fig3a/First electrode, portion, and second electrode as indicated below), wherein the TFLC PIC is located within a cavity of the additional IC. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the photonics device of Baudot and Hung in the above fashion as suggested by Baudot since doing so would facilitate alignment when attaching the TFLC PIC to the additional IC. PNG media_image3.png 487 689 media_image3.png Greyscale With regards to claim 16, Baudot and Hung together disclose the photonics device package of claim 1, wherein the at least one TFLC optical structure is between a first electrode and a second electrode, the first electrode and the second electrode forming a differential electrode pair (Hung/Fig1/First electrode 121a and second electrode 121b). With regards to claim 17, Baudot discloses a photonics device package, comprising: a thin film lithium-containing (TFLC) photonics integrated circuit (PIC) (Baudot/Figs1a&1d/TFLC PIC 100a&d), the TFLC PIC including a plurality of TFLC optical structures (Figs1a&1d/Optical structures 106), a plurality of electrodes (Figs1a&1d/Electrodes 109), and an additional waveguiding structure (Figs1a&1d/Additional waveguiding structure 104), the plurality of TFLC optical structures including at least one TFLC electro-optic material (Paragraph 62/Lines 1-4), at least one TFLC optical structure of the plurality of TFLC structures, the TFLC PIC having a footprint (Fig1a/Footprint of element 100a), the plurality of TFLC structures occupying not more than fifty percent of the footprint (Fig1a), the additional waveguiding structure consisting of a material selected from at least one optical material excluding lithium (Paragraph 67/Lines 1-5), the plurality of TFLC structures being encapsulated in the TFLC PIC (Figs1a&1d/Encapsulant 115); an additional PIC optically and mechanically coupled with the TFLC PIC (Fig2a/Additional PIC 204) after formation of the plurality of TFLC optical structures, the additional PIC including a waveguide (Fig2a/Waveguide 206), the additional waveguiding structure being configured to optically couple the at least one TFLC optical structure with the waveguide (Fig2a; Paragraph 72/Lines 4-6); wherein the additional PIC is electrically coupled with the TFLC PIC through at least one via (Baudot/Fig2a/Via [Tallest instance of element 109]), the at least one via extending through at least a portion of the TFLC PIC in a region of the footprint not occupied by the plurality of TFLC structures, the at least one via being at least partially filled by a conductive material (“…metallization layers…”). Baudot does not disclose the at least one via being formed through the at least the portion of the TFLC PIC after the additional IC is mechanically coupled with the TFLC PIC. However, the above limitation only defines the claimed photonics device package in terms of the order in which constituent elements of said package are formed and the patentability of a product does not depend on its method of production (See MPEP 2113). Baudot does not disclose the at least one via extending through at least a portion of the additional PIC in the embodiment relied upon above, but does disclose the at least one via extending through at least a portion of an additional PIC in the similar embodiment relating to fig. 3a (Baudot/Figs3a&3c/Via 109 [A portion extends beyond element 314 as indicated below]), wherein a portion of the TFLC PIC is located within a cavity of the additional PIC. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the photonics device of Baudot in the above fashion as suggested by Baudot since doing so would facilitate alignment when attaching the TFLC PIC to the additional PIC. PNG media_image1.png 335 531 media_image1.png Greyscale Baudot is silent regarding at least one TFLC structure of the plurality of TFLC structures including a ridge and a slab and having a width not exceeding one micrometer. However, the practices of configuring a TFLC structure to include a ridge and a slab and configuring a TFLC structure to have a width not exceeding one micrometer exist in the art as exemplified by Hung. Baudot and Hung are considered to be analogous in the field of TFLC photonic integrated circuits. Bardot discloses a TFLC PIC comprising a plurality of TFLC structures. Hung teaches at least one TFLC structure of the plurality of TFLC structures including a ridge and a slab (Hung/Fig8/Ridge 825a and slab [Portion of element 820 indicated below]) and having a width not exceeding one micrometer (Hung/Paragraph 106/Lines 7-9). PNG media_image2.png 152 222 media_image2.png Greyscale It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure at least one TFLC structure of the plurality of TFLC structures of Baudot to include a ridge and a slab and have a width not exceeding one micrometer as suggested by Hung since doing so would facilitate single mode operation within the photonics device package. Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Baudot (US 20250102751 A1) and Hung (US 20250390001 A1) as applied to claim 1 above, in further view of Aimone (US 20240377665 A1). With regards to claim 12, Baudot and Hung together disclose the photonics device package of claim 1. Baudot and Hung are silent regarding the at least one TFLC optical structure including an intermediate portion between the ridge and the slab, the ridge having a first height, the intermediate portion having a second height less than the first height, the slab having a third height less than the second height. However the practice of incorporating the above features into TFLC PIC exist in the art as exemplified by Aimone. Baudot and Hung disclose a TFLC structure with a ridge and a slab. Aimone teaches a TFLC structure including an intermediate portion between the ridge and the slab, the intermediate portion having a second height less than the first height, the slab having a third height less than the second height (Aimone/Fig2/Ridge, intermediate portion, and slab [Regions indicated below from top to bottom]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include an intermediate portion between the ridge and slab of the device of Baudot and Hung as suggested by Aimone since doing so would provide an additional physical feature through which to influence a respective optical mode in the TFLC PIC. PNG media_image4.png 335 497 media_image4.png Greyscale Allowable Subject Matter Claims 18 and 20-21 are allowed. With regards to claim 18, the prior art of record fails to disclose or reasonably suggest a method for forming a photonics device package, comprising: providing a thin film lithium-containing (TFLC) photonics integrated circuit (PIC), the TFLC PIC including a plurality of TFLC optical structures and a plurality of electrodes, the plurality of TFLC optical structures including at least one TFLC electro-optic material, at least one TFLC optical structure of the plurality of TFLC optical structures including a ridge and a slab and having a width not exceeding one micrometer, the TFLC PIC having a footprint, the plurality of TFLC optical structures occupying not more than fifty percent of the footprint, the plurality of TFLC optical structures being encapsulated in the TFLC PIC; mechanically coupling an additional integrated circuit (IC) with the TFLC PIC after formation of the plurality of TFLC optical structures; forming, after the mechanically coupling, at least one via extending through at least a portion of the TFLC PIC and at least a portion of the additional IC in a particular region of the footprint not occupied by the plurality of TFLC optical structures; and at least partially filling the at least one via with a conductive material such that the additional IC is electrically coupled with the TFLC PIC through at least one via. The closest prior art was relied upon in the rejection set forth in the office action received 03/17/2026. Claims 20-21 inherit the allowability of claim 18 on which they depend. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Marc E Manheim whose telephone number is (703)756-1873. The examiner can normally be reached 6:30am - 5pm E.T., Monday - Tuesday and Thursday - Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thomas A Hollweg can be reached at (571) 270-1739. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MARC E MANHEIM/Examiner, Art Unit 2874 /THOMAS A HOLLWEG/Supervisory Patent Examiner, Art Unit 2874
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Prosecution Timeline

Nov 21, 2025
Application Filed
Mar 17, 2026
Non-Final Rejection mailed — §103
Jun 17, 2026
Response Filed
Jul 10, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
85%
Grant Probability
99%
With Interview (+18.2%)
3y 0m (~2y 3m remaining)
Median Time to Grant
Moderate
PTA Risk
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