CTNF 19/399,610 CTNF 83013 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Double Patenting 08-30 AIA A rejection based on double patenting of the “same invention” type finds its support in the language of 35 U.S.C. 101 which states that “whoever invents or discovers any new and useful process... may obtain a patent therefor...” (Emphasis added). Thus, the term “same invention,” in this context, means an invention drawn to identical subject matter. See Miller v. Eagle Mfg. Co. , 151 U.S. 186 (1894); In re Vogel , 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Ockert , 245 F.2d 467, 114 USPQ 330 (CCPA 1957). A statutory type (35 U.S.C. 101) double patenting rejection can be overcome by canceling or amending the claims that are directed to the same invention so they are no longer coextensive in scope. The filing of a terminal disclaimer cannot overcome a double patenting rejection based upon 35 U.S.C. 101. 08-31 AIA Claim 1 is rejected under 35 U.S.C. 101 as claiming the same invention as that of claim 1 of prior U.S. Patent No. 12,482,420 . This is a statutory double patenting rejection. Instant Application U.S. Patent No. 12,482,420 1. A display device comprising: a plurality of pixels each including a light emitting element and a pixel driving circuit connected with the light emitting element and configured to drive the light emitting element; and a plurality of sensors each including a light sensing element and a sensor driving circuit connected with the light sensing element and configured to output a sensing signal corresponding to a light, wherein the pixel driving circuit includes: a first transistor connected between a first driving voltage line configured to receive a first driving voltage and the light emitting element; a second transistor connected between a data line and a first electrode of the first transistor; and a third transistor connected between a second electrode of the first transistor and a first node, wherein the sensor driving circuit includes: a reset transistor configured to apply a reset signal to a first sensing node in response to a reset control signal; an amplification transistor configured to apply a sensing driving voltage to a second sensing node in response to a potential of the first sensing node; and an output transistor configured to connect the second sensing node and a sensing line in response to an output control signal, wherein at least one of the first to third transistor is an oxide semiconductor transistor, and at least one of the reset transistor, the amplification transistor or the output transistor is the oxide semiconductor transistor. 1. A display device comprising: a plurality of pixels each including a light emitting element and a pixel driving circuit connected with the light emitting element and configured to drive the light emitting element; and a plurality of sensors each including a light sensing element and a sensor driving circuit connected with the light sensing element and configured to output a sensing signal corresponding to a light, wherein the pixel driving circuit includes: a first transistor connected between a first driving voltage line configured to receive a first driving voltage and the light emitting element; a second transistor connected between a data line and a first electrode of the first transistor; and a third transistor connected between a second electrode of the first transistor and a first node, wherein the sensor driving circuit includes: a reset transistor configured to apply a reset signal to a first sensing node in response to a reset control signal; an amplification transistor configured to apply a sensing driving voltage to a second sensing node in response to a potential of the first sensing node; and an output transistor configured to connect the second sensing node and a sensing line in response to an output control signal, wherein at least one of the first to third transistor is an oxide semiconductor transistor, and at least one of the reset transistor, the amplification transistor or the output transistor is the oxide semiconductor transistor. 08-33 AIA The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg , 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman , 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi , 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum , 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel , 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington , 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA/25, or PTO/AIA/26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. 08-34 AIA Claim 1 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1-2 of U.S. Patent No. 11,955,078 . Although the claims at issue are not identical, they are not patentably distinct from each other because Instant Application U.S. Patent No. 11,955,078 1. A display device comprising: a plurality of pixels each including a light emitting element and a pixel driving circuit connected with the light emitting element and configured to drive the light emitting element; and a plurality of sensors each including a light sensing element and a sensor driving circuit connected with the light sensing element and configured to output a sensing signal corresponding to a light, wherein the pixel driving circuit includes: a first transistor connected between a first driving voltage line configured to receive a first driving voltage and the light emitting element; a second transistor connected between a data line and a first electrode of the first transistor; and a third transistor connected between a second electrode of the first transistor and a first node, wherein the sensor driving circuit includes: a reset transistor configured to apply a reset signal to a first sensing node in response to a reset control signal; an amplification transistor configured to apply a sensing driving voltage to a second sensing node in response to a potential of the first sensing node; and an output transistor configured to connect the second sensing node and a sensing line in response to an output control signal, wherein at least one of the first to third transistor is an oxide semiconductor transistor , and at least one of the reset transistor, the amplification transistor or the output transistor is the oxide semiconductor transistor. 1. A display device comprising: a plurality of pixels each including a light emitting element and a pixel driving circuit connected with the light emitting element and configured to drive the light emitting element; and a plurality of sensors each including a light sensing element and a sensor driving circuit connected with the light sensing element and configured to output a sensing signal corresponding to a light, wherein the sensor driving circuit includes: a reset transistor including a first electrode configured to receive a reset signal, a second electrode connected with a first sensing node, and a third electrode configured to receive a reset control signal; an amplification transistor including a first electrode configured to receive a sensing driving voltage, a second electrode connected with a second sensing node, and a third electrode connected with the first sensing node; and an output transistor including a first electrode connected with the second sensing node, a second electrode connected with a sensing line, and a third electrode configured to receive an output control signal, wherein the reset transistor is an oxide semiconductor transistor. 2. The display device of claim 1, wherein the pixel driving circuit includes: a first transistor connected between a first driving voltage line configured to receive a first driving voltage and the light emitting element; a second transistor connected between a data line and a first electrode of the first transistor; and a third transistor connected between a second electrode of the first transistor and a first node, and wherein the third transistor is an oxide semiconductor transistor . The instant Application claim is broader in every aspect than the patent claim and is therefore an obvious variant thereof. Although the conflicting claims are not identical, they are not patentability distinct from each other because the instant Application claim is generic to all that is recited in the above patent claim. The more specific anticipates the broader (see In re Goodman – 29 USPQ2d 2010), also see Eli Lilly and Co. v. Barr Laboratories Inc., 58 USPQ2d, 189 and Miller v. Eagle Mfg. Co., 151 U.S. 186 1894). Therefore, the instant claim is anticipated by the above patent claim. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to AFROZA Y CHOWDHURY whose telephone number is (571)270-1543. The examiner can normally be reached M-F 9am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Nitin Patel can be reached at (571)272-7677. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /AFROZA CHOWDHURY/Primary Examiner, Art Unit 2628 Application/Control Number: 19/399,610 Page 2 Art Unit: 2628
