Prosecution Insights
Last updated: August 17, 2026
Application No. 19/406,116

METHODS, APPARATUS, AND ARTICLES OF MANUFACTURE TO CONTROL A MICRO-LED DISPLAY

Non-Final OA §DP
Filed
Dec 02, 2025
Priority
Apr 01, 2022 — continuation of 12/518,675
Examiner
PATEL, PREMAL R
Art Unit
2624
Tech Center
2600 — Communications
Assignee
Intel Corporation
OA Round
1 (Non-Final)
78%
Grant Probability
Favorable
1-2
OA Rounds
1y 9m
Est. Remaining
84%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allowance Rate
755 granted / 968 resolved
+16.0% vs TC avg
Moderate +6% lift
Without
With
+6.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
20 currently pending
Career history
993
Total Applications
across all art units

Statute-Specific Performance

§101
3.2%
-36.8% vs TC avg
§103
53.1%
+13.1% vs TC avg
§102
16.0%
-24.0% vs TC avg
§112
20.4%
-19.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 968 resolved cases

Office Action

§DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claim comparison table Claims of application# 19/406,116 Claims of U.S. Patent# 12,518,675 1. An apparatus for a micro-light emitting diode (LED) display, the apparatus comprising: pixel driver circuits electrically coupled to corresponding micro-LEDs of a micro-LED matrix, the pixel driver circuits to drive the micro-LEDs based on (a) a select signal and (b) a pulse width modulation (PWM) signal; a current driver circuit electrically coupled to the pixel driver circuits to generate a fixed level current to be provided to the micro-LEDs; and a PWM data driver circuit to generate gray level bit data for respective columns of the pixel driver circuits. 1. An apparatus for a micro-light emitting diode (LED) display, the apparatus including: a micro-LED matrix; pixel driver circuits electrically coupled to corresponding micro-LEDs of the micro-LED matrix, the pixel driver circuits to drive the micro-LEDs based on (a) a scan signal and (b) a pulse width modulation (PWM) signal; a current driver circuit to generate current data for the pixel driver circuits, the current data to indicate a fixed amplitude of current to be provided to the micro-LEDs; and a PWM data driver circuit to generate gray level bit data for respective columns of the pixel driver circuits. 2. The apparatus of claim 1, including a controller to provide a control signal to at least one of the current driver circuit or the PWM data driver circuit, the gray level bit data based on the control signal, the control signal representative of an image to be displayed by the micro-LED display. 2. The apparatus of claim 1, including a controller to provide a control signal to at least one of the current driver circuit or the PWM data driver circuit, the current data and the gray level bit data based on the control signal, the control signal representative of an image to be displayed by the micro-LED display. 3. The apparatus of claim 1, including: a scan shift register circuit to provide the select signal to a selected row of the pixel driver circuits; a PWM and scan driver circuit to provide the select signal to the scan shift register circuit; and a PWM active circuit to: receive the PWM signal from the PWM and scan driver circuit; receive the select signal from the scan shift register circuit; provide, based on the select signal and the gray level bit data, the PWM signal to the selected row of the pixel driver circuits; and provide bit pulse source signals to the pixel driver circuits, the bit pulse source signals corresponding to different bits of the gray level bit data. 3. The apparatus of claim 1, including: a scan shift register circuit to provide the scan signal to a selected row of the pixel driver circuits; a PWM and scan driver circuit to provide the scan signal to the scan shift register circuit; and a PWM active circuit to: receive the PWM signal from the PWM and scan driver circuit; receive the scan signal from the scan shift register circuit; provide, based on the scan signal and the gray level bit data, the PWM signal to the selected row of the pixel driver circuits; and provide bit pulse source signals to the pixel driver circuits, the bit pulse source signals corresponding to different bits of the gray level bit data. 4. The apparatus of claim 3, wherein the pixel driver circuits include: memory to store the gray level bit data; and a multiplexer to: operate a first switch corresponding to a selected bit of the gray level bit data; and in response to the first switch being in an active state, operate a second switch based on a value of the selected bit. 4. The apparatus of claim 3, wherein the pixel driver circuits include: memory to store the gray level bit data; and a multiplexer to: operate a first switch corresponding to a selected bit of the gray level bit data; and in response to the first switch being in an active state, operate a second switch based on a value of the selected bit. 5. The apparatus of claim 4, wherein the multiplexer is to, in response to the first switch and the second switch being in the active state, provide one of the bit pulse source signals corresponding to the selected bit to a current bit switch to cause the current bit switch to switch to the active state, the current bit switch in the active state to enable flow of current to a corresponding one of the micro-LEDs. 5. The apparatus of claim 4, wherein the multiplexer is to, in response to the first switch and the second switch being in the active state, provide one of the bit pulse source signals corresponding to the selected bit to a current bit switch to cause the current bit switch to switch to the active state, the current bit switch in the active state to enable flow of current to a corresponding one of the micro-LEDs. 6. The apparatus of claim 5, including a current source generator to generate the current based on the bit pulse source signals. 6. The apparatus of claim 5, including a current source generator to generate the current based on the one of the bit pulse source signals and the current data. 7. The apparatus of claim 1, including a substrate to carry the micro-LED matrix and the pixel driver circuits, the micro-LED matrix on a first surface of the substrate, the pixel driver circuits on a second surface of the substrate opposite the first surface. 7. The apparatus of claim 1, including a substrate to carry the micro-LED matrix and the pixel driver circuits, the micro-LED matrix on a first surface of the substrate, the pixel driver circuits on a second surface of the substrate opposite the first surface. 8. A non-transitory computer readable medium comprising instructions, in response to being executed by one or more processors, cause the one or more processors to perform operations including: causing pixel driver circuits to drive corresponding micro-LEDs of a micro-LED matrix of a micro-LED display based on (a) a select signal and (b) a pulse width modulation (PWM) signal; causing a current driver circuit electrically coupled to the pixel driver circuits to generate a fixed level current to be provided to the micro-LEDs; and causing a PWM data driver circuit to generate gray level bit data for respective columns of the pixel driver circuits. 18. A non-transitory computer readable medium comprising instructions to cause processor circuitry to at least: cause, based on a pulse width modulation (PWM) signal and a scan signal from a driver circuit, operation of first switches corresponding to different bits of gray level bit data; in response to the first switches being in an active state, cause operation of second switches based on values of the different bits of the gray level bit data; and in response to the second switches being in the active state, cause current to be provided to micro-LEDs of a micro-LED array. 1. An apparatus for a micro-light emitting diode (LED) display, the apparatus including: a micro-LED matrix; pixel driver circuits electrically coupled to corresponding micro-LEDs of the micro-LED matrix, the pixel driver circuits to drive the micro-LEDs based on (a) a scan signal and (b) a pulse width modulation (PWM) signal; a current driver circuit to generate current data for the pixel driver circuits, the current data to indicate a fixed amplitude of current to be provided to the micro-LEDs; and a PWM data driver circuit to generate gray level bit data for respective columns of the pixel driver circuits. 9. The non-transitory computer readable medium of claim 8, wherein the operations further include providing a control signal to at least one of the current driver circuit or the PWM data driver circuit, the gray level bit data based on the control signal, the control signal representative of an image to be displayed by the micro-LED display. 2. The apparatus of claim 1, including a controller to provide a control signal to at least one of the current driver circuit or the PWM data driver circuit, the current data and the gray level bit data based on the control signal, the control signal representative of an image to be displayed by the micro-LED display. 10. The non-transitory computer readable medium of claim 8, wherein the operations include: causing a scan shift register circuit to provide the select signal to a selected row of the pixel driver circuits; causing a PWM and scan driver circuit to provide the select signal to the scan shift register circuit; and causing a PWM active circuit to: receive the PWM signal from the PWM and scan driver circuit; receive the select signal from the scan shift register circuit; provide, based on the select signal and the gray level bit data, the PWM signal to the selected row of the pixel driver circuits; and provide bit pulse source signals to the pixel driver circuits, the bit pulse source signals corresponding to different bits of the gray level bit data. 3. The apparatus of claim 1, including: a scan shift register circuit to provide the scan signal to a selected row of the pixel driver circuits; a PWM and scan driver circuit to provide the scan signal to the scan shift register circuit; and a PWM active circuit to: receive the PWM signal from the PWM and scan driver circuit; receive the scan signal from the scan shift register circuit; provide, based on the scan signal and the gray level bit data, the PWM signal to the selected row of the pixel driver circuits; and provide bit pulse source signals to the pixel driver circuits, the bit pulse source signals corresponding to different bits of the gray level bit data. 11. The non-transitory computer readable medium of claim 10, wherein the operations include: causing operation of a first switch corresponding to a selected bit of the gray level bit data; and causing operation of a second switch based on a value of the selected bit, in response to the first switch being in an active state. 4. The apparatus of claim 3, wherein the pixel driver circuits include: memory to store the gray level bit data; and a multiplexer to: operate a first switch corresponding to a selected bit of the gray level bit data; and in response to the first switch being in an active state, operate a second switch based on a value of the selected bit. 12. The non-transitory computer readable medium of claim 11, wherein the operations include: in response to the first switch and the second switch being in the active state, providing one of the bit pulse source signals corresponding to the selected bit to a current bit switch to cause the current bit switch to switch to the active state, the current bit switch in the active state to enable flow of current to a corresponding one of the micro-LEDs. 5. The apparatus of claim 4, wherein the multiplexer is to, in response to the first switch and the second switch being in the active state, provide one of the bit pulse source signals corresponding to the selected bit to a current bit switch to cause the current bit switch to switch to the active state, the current bit switch in the active state to enable flow of current to a corresponding one of the micro-LEDs. 13. The non-transitory computer readable medium of claim 12, wherein the operations include: causing a current source generator to generate the current based on the bit pulse source signals. 6. The apparatus of claim 5, including a current source generator to generate the current based on the one of the bit pulse source signals and the current data. 14. A system comprising: a micro-light emitting diode (LED) display including a micro-LED matrix; an apparatus to drive the micro-LED matrix, the apparatus including: pixel driver circuits electrically coupled to corresponding micro-LEDs of the micro-LED matrix, the pixel driver circuits to drive the micro-LEDs based on (a) a select signal and (b) a pulse width modulation (PWM) signal; a current driver circuit electrically coupled to the pixel driver circuits to generate a fixed level current to be provided to the micro-LEDs; and a PWM data driver circuit to generate gray level bit data for respective columns of the pixel driver circuits. 1. An apparatus for a micro-light emitting diode (LED) display, the apparatus including: a micro-LED matrix; pixel driver circuits electrically coupled to corresponding micro-LEDs of the micro-LED matrix, the pixel driver circuits to drive the micro-LEDs based on (a) a scan signal and (b) a pulse width modulation (PWM) signal; a current driver circuit to generate current data for the pixel driver circuits, the current data to indicate a fixed amplitude of current to be provided to the micro-LEDs; and a PWM data driver circuit to generate gray level bit data for respective columns of the pixel driver circuits. 15. The system of claim 14, including a controller to provide a control signal to at least one of the current driver circuit or the PWM data driver circuit, the gray level bit data based on the control signal, the control signal representative of an image to be displayed by the micro-LED display. 2. The apparatus of claim 1, including a controller to provide a control signal to at least one of the current driver circuit or the PWM data driver circuit, the current data and the gray level bit data based on the control signal, the control signal representative of an image to be displayed by the micro-LED display. 16. The system of claim 14, including: a scan shift register circuit to provide the select signal to a selected row of the pixel driver circuits; a PWM and scan driver circuit to provide the select signal to the scan shift register circuit; and a PWM active circuit to: receive the PWM signal from the PWM and scan driver circuit; receive the select signal from the scan shift register circuit; provide, based on the select signal and the gray level bit data, the PWM signal to the selected row of the pixel driver circuits; and provide bit pulse source signals to the pixel driver circuits, the bit pulse source signals corresponding to different bits of the gray level bit data. 3. The apparatus of claim 1, including: a scan shift register circuit to provide the scan signal to a selected row of the pixel driver circuits; a PWM and scan driver circuit to provide the scan signal to the scan shift register circuit; and a PWM active circuit to: receive the PWM signal from the PWM and scan driver circuit; receive the scan signal from the scan shift register circuit; provide, based on the scan signal and the gray level bit data, the PWM signal to the selected row of the pixel driver circuits; and provide bit pulse source signals to the pixel driver circuits, the bit pulse source signals corresponding to different bits of the gray level bit data. 17. The system of claim 16, wherein the pixel driver circuits include: memory to store the gray level bit data; and a multiplexer to: operate a first switch corresponding to a selected bit of the gray level bit data; and in response to the first switch being in an active state, operate a second switch based on a value of the selected bit. 4. The apparatus of claim 3, wherein the pixel driver circuits include: memory to store the gray level bit data; and a multiplexer to: operate a first switch corresponding to a selected bit of the gray level bit data; and in response to the first switch being in an active state, operate a second switch based on a value of the selected bit. 18. The system of claim 17, wherein the multiplexer is to, in response to the first switch and the second switch being in the active state, provide one of the bit pulse source signals corresponding to the selected bit to a current bit switch to cause the current bit switch to switch to the active state, the current bit switch in the active state to enable flow of current to a corresponding one of the micro-LEDs. 5. The apparatus of claim 4, wherein the multiplexer is to, in response to the first switch and the second switch being in the active state, provide one of the bit pulse source signals corresponding to the selected bit to a current bit switch to cause the current bit switch to switch to the active state, the current bit switch in the active state to enable flow of current to a corresponding one of the micro-LEDs. 19. The system of claim 18, including a current source generator to generate the current based on the bit pulse source signals. 6. The apparatus of claim 5, including a current source generator to generate the current based on the one of the bit pulse source signals and the current data. 20. The system of claim 14, including a substrate to carry the micro-LED matrix and the pixel driver circuits, the micro-LED matrix on a first surface of the substrate, the pixel driver circuits on a second surface of the substrate opposite the first surface. 7. The apparatus of claim 1, including a substrate to carry the micro-LED matrix and the pixel driver circuits, the micro-LED matrix on a first surface of the substrate, the pixel driver circuits on a second surface of the substrate opposite the first surface. Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-7 and 18 of U.S. Patent No. 12,518,675. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 1 of instant application is similar in scope to claim 1 of U.S. Patent# 12,518,675; as shown in the claim comparison table above. Regarding claim 2 of instant application is similar in scope to claim 2 of U.S. Patent# 12,518,675; as shown in the claim comparison table above. Regarding claim 3 of instant application is similar in scope to claim 3 of U.S. Patent# 12,518,675; as shown in the claim comparison table above. Regarding claim 4 of instant application is similar in scope to claim 4 of U.S. Patent# 12,518,675; as shown in the claim comparison table above. Regarding claim 5 of instant application is similar in scope to claim 5 of U.S. Patent# 12,518,675; as shown in the claim comparison table above. Regarding claim 6 of instant application is similar in scope to claim 6 of U.S. Patent# 12,518,675; as shown in the claim comparison table above. Regarding claim 7 of instant application is similar in scope to claim 7 of U.S. Patent# 12,518,675; as shown in the claim comparison table above. Regarding claim 8 of instant application is similar in scope to claims 18 and 1 of U.S. Patent# 12,518,675; as shown in the claim comparison table above. Regarding claim 9 of instant application is similar in scope to claims 18 and 2 of U.S. Patent# 12,518,675; as shown in the claim comparison table above. Regarding claim 10 of instant application is similar in scope to claims 18 and 3 of U.S. Patent# 12,518,675; as shown in the claim comparison table above. Regarding claim 11 of instant application is similar in scope to claims 18 and 4 of U.S. Patent# 12,518,675; as shown in the claim comparison table above. Regarding claim 12 of instant application is similar in scope to claims 18 and 5 of U.S. Patent# 12,518,675; as shown in the claim comparison table above. Regarding claim 13 of instant application is similar in scope to claims 18 and 6 of U.S. Patent# 12,518,675; as shown in the claim comparison table above. Regarding claim 14 of instant application is similar in scope to claims 1 of U.S. Patent# 12,518,675; as shown in the claim comparison table above. Regarding claim 15 of instant application is similar in scope to claim 2 of U.S. Patent# 12,518,675; as shown in the claim comparison table above. Regarding claim 16 of instant application is similar in scope to claim 3 of U.S. Patent# 12,518,675; as shown in the claim comparison table above. Regarding claim 17 of instant application is similar in scope to claim 4 of U.S. Patent# 12,518,675; as shown in the claim comparison table above. Regarding claim 18 of instant application is similar in scope to claim 5 of U.S. Patent# 12,518,675; as shown in the claim comparison table above. Regarding claim 19 of instant application is similar in scope to claim 6 of U.S. Patent# 12,518,675; as shown in the claim comparison table above. Regarding claim 20 of instant application is similar in scope to claim 7 of U.S. Patent# 12,518,675; as shown in the claim comparison table above. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Boeker et al. (2023/0215342) teaches A display device includes a display substrate and a backplane substrate. The display substrate includes an array of micro-LEDs forming individual pixels. The backplane substrate includes a plurality of pixel logic hardware modules. Each pixel logic hardware module includes a local memory element configured to store a multi-bit pixel intensity value of a corresponding micro-LED for an image frame. Lau et al. (2015/0332635) teaches A passive-matrix light-emitting diodes on silicon (LEDoS) micro-display is presented herein. The LEDoS micro-display comprises a passive-matrix micro-light-emitting diode (LED) array comprising passive-matrix micro-light-emitting diodes (LEDs), and a display driver configured to apply column signals to columns of LED pixels of the passive-matrix micro-LED array and scan signals to rows of the LED pixels, wherein the passive-matrix micro-LED array is flip-chip bonded to the display driver based on solder bumps located at peripheral areas of the passive-matrix micro-LED array. Any inquiry concerning this communication or earlier communications from the examiner should be directed to PREMAL PATEL whose telephone number is (571)270-5892. The examiner can normally be reached Mon-Fri 8-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MATTHEW EASON can be reached at 571-270-7230. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PREMAL R PATEL/Primary Examiner, Art Unit 2624
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Prosecution Timeline

Dec 02, 2025
Application Filed
Aug 05, 2026
Non-Final Rejection mailed — §DP (current)

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