CTNF 19/411,582 CTNF 87246 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 112 07-30-02 AIA The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 07-34-01 Claim 11 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. As to claim 11, it is unclear what is meant by the term “LTPS TFT” recited in the claim. Applicant’s specification as originally filed does not disclose what “LTPS TFT” stands for. It is unclear what is meant by “LTPS TFT” recited in claim 11. For purposes of further examination, due to the above rejection under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, the following art rejection(s) for the above rejected claim is based as best understood by the Examiner. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15-aia AIA Claim(s) 1-10, and 14-16 is/are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Park et al. (US 2017/0092200 A1) . As to claim 1, Park et al. teaches a display device ([0003]: display), comprising: a display panel (100 in Fig. 2) on which a plurality of subpixels are disposed ([0033]: display panel 100 includes pixels P ), wherein each of the plurality of subpixels (Fig. 4; [0033]: pixels) includes: a light emitting device (OLED in Fig. 4;[0003]: organic light emitting diode (OLED); [0049]); a second transistor (transistor DT in Fig. 4;[0049]) including a gate electrode (a gate electrode of transistor DT in Fig. 4;[0050], a first electrode (a drain electrode of transistor DT in Fig. 4;[0050]), and a second electrode (source electrode of transistor DT in Fig. 4;[0050]) electrically connected to the light emitting device (OLED in Fig. 4); a first transistor (transistor T3 in Fig. 4) electrically connected between a data line (Data line in Fig. 4) and the second electrode of the second transistor (source electrode of transistor DT in Fig. 4;[0050]); a sixth transistor (transistor T2 in Fig. 4) electrically connected between a first voltage line (Vini line in Fig. 4) and the gate electrode of the second transistor (transistor DT in Fig. 4;[0049]); and a capacitor (capacitor Cst in Fig. 4) including a first electrode electrically connected to the gate electrode of the second transistor (transistor DT in Fig. 4;[0049]), wherein the second transistor (transistor DT in Fig. 4;[0049]), the first transistor (transistor T3 in Fig. 4), and the sixth transistor (transistor T2 in Fig. 4) each includes an oxide semiconductor material ([0035]: oxide semiconductor layer). As to claim 2, Park et al. teaches the display device of claim 1, wherein the first voltage line (Vini line in Fig. 4) connected to receive an initialization voltage ([0052]: initialization voltage). As to claim 3, Park et al. teaches the display device of claim 1, wherein the capacitor (capacitor Cst in Fig. 4) further includes a second electrode electrically connected to the sixth transistor (transistor T2 in Fig. 4). As to claim 4, Park et al. teaches the display device of claim 3, wherein the second electrode of the capacitor (capacitor Cst in Fig. 4) is electrically connected to the light emitting device (OLED in Fig. 4;[0003]: organic light emitting diode (OLED); [0049]). As to claim 5, Park et al. teaches the display device of claim 1, wherein the first electrode of the capacitor (capacitor Cst in Fig. 4) is further electrically connected to the first electrode of the second transistor (transistor DT in Fig. 4). As to claim 6, Park et al. teaches the display device of claim 5, wherein each of the plurality of subpixels further comprises: a third transistor (transistor T1 in Fig. 4) electrically connected between the first electrode of the capacitor (capacitor Cst in Fig. 4) and the first electrode of the second transistor (transistor DT in Fig. 4;[0049]), wherein the third transistor (transistor T1 in Fig. 4) includes the oxide semiconductor material ([0035]: oxide semiconductor layer). As to claim 7, Park et al. teaches the display device of claim 1, wherein the second transistor (transistor DT in Fig. 4; [0049]), the first transistor (transistor T3 in Fig. 4), and the sixth transistor (transistor T2 in Fig. 4) are N-type transistors (see Fig. 4,[0030]: N-type transistors). As to claim 8, Park et al. teaches the display device of claim 1, wherein each of the plurality of subpixels further comprises: a fifth transistor (transistor T4 in Fig. 4) electrically connected between a driving voltage line (VDD line in Fig. 4) and the first electrode of the second transistor (transistor DT in Fig. 4), wherein the fifth transistor (transistor T4 in Fig. 4) includes the oxide semiconductor material ([0035]: oxide semiconductor layer). As to claim 9, Park et al. teaches the display device of claim 1, wherein each of the plurality of subpixels further comprises: a fourth transistor (transistor T5 in Fig. 4) electrically connected between the second electrode of the second transistor (transistor DT in Fig. 4;[0049]) and the light emitting device (OLED in Fig. 4;[0003]: organic light emitting diode (OLED)), wherein the fourth transistor (transistor T5 in Fig. 4) includes the oxide semiconductor material ([0035]: oxide semiconductor layer). As to claim 10, Park et al. teaches the display device of claim 9, wherein the fourth transistor (transistor T5 in Fig. 4) includes a semiconductor material ([0035]: the semiconductor layer formed of an amorphous silicon semiconductor) different from the oxide semiconductor material ([0035]: oxide semiconductor layer). As to claim 14, Park et al. teaches the display device of claim 1, further comprising: a gate driving circuit ([0032]: gate driver) configured to output a first scan signal and a second scan signal ([0039]: output scan signals), wherein the sixth transistor (T2 in Fig. 4) is configured to be turned on or turned off in response to the first scan signal (Scan1(j) in Figs. 4-5;[0052]), and wherein the first transistor (T3 in Fig. 4) is configured to be turned on or turned off in response to the second scan signal (Scan2(j) in Figs. 4-5;[0053]). As to claim 15, Park et al. teaches the display device of claim 14, wherein an ON-pulse width of the first scan signal (Scan1(j) in Figs. 5) is greater than an ON-pulse width of the second scan signal (Scan2(j) in Fig. 5;[0062-0063]). As to claim 16, Park et al. teaches the display device of claim 15, wherein a timing at which the first scan signal transitions from an ON level to an OFF level (Scan1(j) transitions from an ON level (i.e. high level) to an OFF level (i.e. low level) in Fig. 5) is later than a timing at which the second scan signal transitions from an ON level to an OFF level (Scan2(j) transitions from an ON level (i.e. high level) to an OFF level (i.e. low level) in Fig. 5) . Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim (s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park et al. (US 2017/0092200 A1) in view of Qian et al. (US 10490128 B1) . As to claim 11, Park et al. teaches the display device of claim 9, but does not explicitly disclose wherein the fourth transistor is an LTPS TFT. However, Qian et al. teaches wherein the fourth transistor is an LTPS TFT (col. 6, lines 32-36: low temperature polysilicon LTPS transistor). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Park et al. such that the fourth transistor is an LTPS TFT as taught by Qian et al. because low temperature polysilicon transistor has advantages of high switching speed, high carrier mobility and low power . 07-21-aia AIA Claim (s) 12-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park et al. (US 2017/0092200 A1) in view of Heganovic et al. (US 11189225 B1) . As to claim 12, Park et al. teaches the display device of claim 1, but does not explicitly disclose wherein each of the plurality of subpixels further comprises: a compensation capacitor including a first electrode electrically connected to the second electrode of the second transistor. However, Heganovic et al. teaches wherein each of the plurality of subpixels further comprises: a compensation capacitor (capacitor CC2 in Fig. 1) including a first electrode electrically connected to the second electrode of the second transistor (transistor TD in Fig. 1). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Park et al. such that each of the plurality of subpixels further comprises a compensation capacitor including a first electrode electrically connected to the second electrode of the second transistor as taught by Heganovic et al in order to increase reliability and picture uniformity. As to claim 13, Park et al. teaches the display device as discussed above, but does not explicitly disclose wherein the compensation capacitor further includes: a second electrode electrically connected to the first voltage line or a driving voltage line. However, Heganovic et al. teaches w wherein the compensation capacitor (capacitor CC2 in Fig. 1) further includes: a second electrode (second electrode of capacitor CC2 in Fig. 1) electrically connected to the first voltage line (VINI line in Fig. 1) or a driving voltage line (ELVDD line in Fig. 1). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Park et al. such that the compensation capacitor further includes: a second electrode electrically connected to the first voltage line or a driving voltage line as taught by Heganovic et al in order to increase reliability and picture uniformity. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to STACY KHOO whose telephone number is (571)270-3698. The examiner can normally be reached Mon-Fri 8:00 am-5:00 pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Eason can be reached at 571-270-7230. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /STACY KHOO/Primary Examiner, Art Unit 2624 Application/Control Number: 19/411,582 Page 2 Art Unit: 2624 Application/Control Number: 19/411,582 Page 3 Art Unit: 2624 Application/Control Number: 19/411,582 Page 4 Art Unit: 2624 Application/Control Number: 19/411,582 Page 5 Art Unit: 2624 Application/Control Number: 19/411,582 Page 6 Art Unit: 2624 Application/Control Number: 19/411,582 Page 7 Art Unit: 2624 Application/Control Number: 19/411,582 Page 8 Art Unit: 2624 Application/Control Number: 19/411,582 Page 9 Art Unit: 2624
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