DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This is in reply to an application filed on December 16, 2025 regarding Application No. 19/421,795. Claims 1-20 are pending.
Priority
The instant application is a continuation of Application No. 18/349,966, filed on July 11, 2023, now Patent No. US 12,533,949.
Claim Objections
Claims 1-18 are objected to for the reasons discussed below.
Claims 1 and 9: “the circuit bard” (2nd to the last line of each claim) should be changed to “the circuit board”.
Claims 2-8 and 10-18: these claims depend from an objected to claim.
Appropriate correction is required.
Double Patenting
The non-statutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A non-statutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on non-statutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a non-statutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-20 are rejected on the ground of non-statutory double patenting as being unpatentable over U.S. Patent No. 12,533,949 (hereinafter US 12,533,949) in view of Narayanasamy et al. in US 2012/0217982 A1 (hereinafter Narayanasamy), in further view of Braeunlich et al. in EP 2 595 461 A1 (hereinafter Braeunlich; an original copy and full machine translation was provided in parent Application No. 18/349,966 - May 9, 2025 Office action).
* See table below
Regarding claim 1, US 12,533,949 (claims 1-2 and 9-10)* teaches:
A denoising circuit, arranged on a circuit board, configured to be coupled to a load, which is configured to be touched, the denoising circuit comprising:
a first resistor, configured to be coupled between a first signal source and a first node;
a first capacitor, connected between the first node and ground;
a second resistor, configured to be coupled between a second signal source and a second node;
a second capacitor, connected between the first node and the second node; a third resistor, connected to the second node;
a third capacitor, connected between the third resistor and a driving trace; and
a shielding metal, arranged on the circuit bard surrounding the driving trace.
However, it is noted that US 12,533,949 does not explicitly teach:
the load, which is configured to be untouched,
but which is suggested by US 12,533,949 as the load is configured to be touched and untouched after touching or not touched.
However, it is noted that US 12,533,949 does not teach:
the circuit board having a contact configured to be coupled to the load;
wherein the driving trace is configured to be connected to the contact.
Narayanasamy teaches:
a circuit board having a contact (driving trace-load contact) configured to be coupled to a load (corresponding to, e.g., 502(1)) (Narayanasamy: see FIGURE 4, “[0068] FIG. 4 illustrates an embodiment of a capacitive button system 500 including a capacitance sensor controller 503 configured to measure capacitances from a set of capacitive touch-sensing buttons....”, “[0069]... [A]n integrated package containing the controller 503....”, and “[0070] For a capacitive button system such as system 500, the separate components, such as the... sensor electrode 502... may occupy space on a PCB layout in addition to the space occupied by controller 503....”, see also FIGUREs 1-3, 5-7B, 9A, and 10A-B);
wherein a driving trace (e.g., 502(1)-503 driving trace) is configured to be connected to the contact (Narayanasamy: see FIGURE 4, [0068]-[0070], see also FIGUREs 1-3, 5-7B, 9A, and 10A-B).
Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to include: the features taught by Narayanasamy, such that US 12,533,949 as modified teaches: A denoising circuit, arranged on a circuit board having a contact configured to be coupled to a load, which is configured to be touched or untouched, the denoising circuit comprising (denoising circuit, circuit board, and load of and suggested by US 12,533,949 combined with the circuit board, contact, and load of Narayanasamy): a third capacitor, connected between the third resistor and a driving trace, wherein the driving trace is configured to be connected to the contact (third capacitor, third resistor, and driving trace of US 12,533,949 combined with the driving trace and contact of Narayanasamy), to provide touch sensing.
However, it is noted that US 12,533,949 as modified by Narayanasamy does not teach:
the shielding metal extending to the contact without extending out of the circuit board.
Braeunlich teaches:
a shielding metal (7 and 8 in FIG. 2) extending to a contact (lower side 1-2 contact in FIG. 1) without extending out of a circuit board (1) (Braeunlich: see FIGs. 1-2, “[0016]... Arranged on this printed circuit board 1 is a connection element 4 provided with a lower and an upper part 2, 3.... The lower part 2 of the connection element 4 is fastened to the multilayer printed circuit board 1....”, “[0017]... [A] two-part metallic shielding means of the connection element 4....”, and “[0019]... [T]he metallic shielding element, comprising two parts 7, 8....”, see also FIG. 3 and [0002]).
Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to include: the features taught by Braeunlich, such that US 12,533,949 as modified teaches: a shielding metal, arranged on the circuit bard surrounding the driving trace, and extending to the contact without extending out of the circuit board (shielding method, circuit board, and driving trace of US 12,533,949 as modified combined with the shielding metal, contact, and circuit board of Braeunlich), to achieve “good interference immunity... and [minimize] [p]otential interference emissions....” (Braeunlich: [0020]).
Regarding claim 2, US 12,533,949 as modified by Narayanasamy and Braeunlich teaches:
The denoising circuit as claimed in claim 1, wherein the shielding metal is arranged in different layers of the circuit board, and surrounding the driving trace in a length direction of the driving trace to the contact (US 12,533,949: claim 2; Braeunlich: the shielding metal surrounding a signal trace 5 in a length direction of the signal trace to the contact; FIGs. 1-2, “[0016]... [C]ommunication lines 5 of a communication cable, wherein the communication lines 5 are enclosed by a cable shield 6 of the communication cable 22....”, and “[0019) The design and symmetrical structure of the metallic shielding element, comprising two parts 7, 8, and the shielded outer layer of the multilayer printed circuit board 1 form a "cage" around the signal lines....”, see also FIG. 3 and [0002]).
Regarding claims 3-8, US 12,533,949 as modified by Narayanasamy and Braeunlich teaches: the features of these claims (claims 3-8 of US 12,533,949).
Regarding claim 9, U.S. Patent No. US 12,533,949 (claims 9-10 and 15)* teaches:
A touch detection circuit, configured to detect an impedance variation of a load, which is configured to be touched, the touch detection circuit comprising:
a chip; and
a denoising circuit, arranged on the circuit board, and comprising:
a first resistor, configured to be coupled between a first signal source of the chip and a first node;
a first capacitor, connected between the first node and ground;
a second resistor, configured to be coupled between a second signal source of the chip and a second node;
a second capacitor, connected between the first node and the second node; a third resistor, connected to the second node;
a third capacitor, connected between the third resistor and a driving trace; and
a shielding metal, arranged on the circuit bard surrounding the driving trace.
However, it is noted that US 12,533,949 does not explicitly teach:
the load, which is configured to be untouched,
but which is suggested by US 12,533,949, such that US 12,533,949 as modified teaches and suggests: A touch detection circuit, configured to detect an impedance variation of a load, which is configured to be touched or untouched, the touch detection circuit comprising: (touch detection circuit, impedance variation of a load, and touched of US 12,533,949 combined with the load and untouched as suggested by US 12,533,9494), as the load is configured to be touched and untouched after touching or not touched.
However, it is noted that US 12,533,949 does not teach:
the chip, arranged on a circuit board having a contact configured to be coupled to the load; and
the denoising circuit, arranged on the circuit board between the chip and the contact, and comprising:
wherein the driving trace is configured to be connected to the contact.
Narayanasamy teaches:
a chip (503 in FIGURE 4), arranged on a circuit board having a contact (driving trace-load contact) configured to be coupled to a load (corresponding to, e.g., 502(1)) (Narayanasamy: see FIGURE 4, “[0068] FIG. 4 illustrates an embodiment of a capacitive button system 500 including a capacitance sensor controller 503 configured to measure capacitances from a set of capacitive touch-sensing buttons....”, “[0069]... [A]n integrated package containing the controller 503....”, and “[0070] For a capacitive button system such as system 500, the separate components, such as the... sensor electrode 502... may occupy space on a PCB layout in addition to the space occupied by controller 503....”, see also FIGUREs 1-3, 5-7B, 9A, and 10A-B); and
wherein a driving trace (e.g., 502(1)-503 driving trace) is configured to be connected to the contact (Narayanasamy: see FIGURE 4 and [0068]-[0070], see also FIGUREs 1-3, 5-7B, 9A, and 10A-B).
Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to include: the features taught by Narayanasamy, such that US 12,533,944 as modified teaches: a chip, arranged on a circuit board having a contact configured to be coupled to the load (chip, circuit board, and load of and suggested by US 12,533,944 combined with the chip, circuit board, contact, and load of Narayanasamy; see also claim 1 above (circuit board having a contact configured to be coupled to the load)); a third capacitor, connected between the third resistor and a driving trace, wherein the driving trace is configured to be connected to the contact (third capacitor, third resistor, and driving trace of US 12,533,944 and driving trace of US 12,533,944 combined with the driving trace and contact of Narayanasamy), to provide touch sensing.
However, it is noted that US 12,533,944 as modified by Narayanasamy does not teach:
the denoising circuit, arranged on the circuit board between the chip and the contact,
but which would have been obvious to include, such that US 12,533,944 as modified teaches: a denoising circuit, arranged on the circuit board between the chip and the contact, and comprising: (denoising circuit, circuit board, chip, and contact of US 12,533,944 as modified modified as discussed), since it would have been within the general skill of one of ordinary skill in the art to select features on the basis of their suitability for the intended use to reduce or eliminate noise.
However, it is noted that US 12,533,944 as modified by Narayanasamy does not teach:
the shielding metal extending to the contact without extending out of the circuit board.
Braeunlich teaches:
a shielding metal (7 and 8 in FIG. 2) extending to a contact (lower side 1-2 contact in FIG. 1) without extending out of a circuit board (1) (Braeunlich: see FIGs. 1-2, “[0016]... Arranged on this printed circuit board 1 is a connection element 4 provided with a lower and an upper part 2, 3.... The lower part 2 of the connection element 4 is fastened to the multilayer printed circuit board 1....”, “[0017]... [A] two-part metallic shielding means of the connection element 4....”, and “[0019]... [T]he metallic shielding element, comprising two parts 7, 8....”, see also FIG. 3 and [0002]).
Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to include: the features taught by Braeunlich, such that US 12,533,949 as modified teaches: a shielding metal, arranged on the circuit bard surrounding the driving trace, and extending to the contact without extending out of the circuit board (shielding metal, circuit board, driving trace, and contact of US 12,533,949 as modified combined with the shielding metal, contact, and circuit board of Braeunlich), to achieve “good interference immunity... and [minimize] [p]otential interference emissions....” (Braeunlich: [0020]).
Regarding claims 10-11, US 12,533,949 as modified by Narayanasamy and Braeunlich teaches: the features of these claims (claims 9-11 of US 12,533,949).
Regarding claim 12, US 12,533,949 as modified by Narayanasamy and Braeunlich teaches:
The touch detection circuit as claimed in claim 9, wherein the shielding metal is arranged in different layers of the circuit board, and surrounding the driving trace in a length direction of the driving trace to the contact (US 12,533,949: claim 15; Braeunlich: the shielding metal surrounding the signal trace 5 in a length direction of the signal trace to the contact; FIGs. 1-2, “[0016]... [C]ommunication lines 5 of a communication cable, wherein the communication lines 5 are enclosed by a cable shield 6 of the communication cable 22....”, and “[0019) The design and symmetrical structure of the metallic shielding element, comprising two parts 7, 8, and the shielded outer layer of the multilayer printed circuit board 1 form a "cage" around the signal lines....”, see also FIG. 3 and [0002]).
Regarding claims 13-18, US 12,533,949 as modified by Narayanasamy and Braeunlich teaches: the features of these claims (claims 12-14 and 16-18 of US 12,533,949).
Regarding claim 19, US 12,533,949 (claims 9 and 19)* teaches:
A touch detection circuit, configured to detect an impedance variation of a load, which is configured to be touched, the touch detection circuit comprising:
a chip comprising a first pin and a second pin respectively configured to output a sinusoidal signal;
a shielding metal;
a shielding branch, connected between the first pin, a ground voltage and the shielding metal, and configured to direct noises to the ground voltage;
a driving branch comprising a driving trace, wherein the shielding metal surrounds the driving trace; and
an intermediate capacitor, connected between the shielding branch and the driving branch.
However, it is noted that US 12,533,949 does not explicitly teach:
the load, which is configured to be untouched,
but which is suggested by US 12,533,949, such that US 12,533,949 teaches and suggests: A touch detection circuit, configured to detect an impedance variation of a load, which is configured to be touched or untouched, the touch detection circuit comprising: (touch detection circuit, impedance variation of a load, and touch of US 12,533,949 combined with the load and untouched as suggested by US 12,533,949), as the load is configured to be touched and untouched after touching or not touched.
However, it is noted that US 12,533,949 does not teach:
the chip, arranged on a circuit board having a contact configured to be coupled to the load; and
the driving branch, connected between the second pin and the contact, and comprising the driving trace extended on the circuit board and connected to the contact.
Narayanasamy teaches:
a chip (503 in FIGURE 4), arranged on a circuit board having a contact (driving trace-load contact) configured to be coupled to a load (corresponding to, e.g., 502(1)) (Narayanasamy: see FIGURE 4, “[0068] FIG. 4 illustrates an embodiment of a capacitive button system 500 including a capacitance sensor controller 503 configured to measure capacitances from a set of capacitive touch-sensing buttons....”, “[0069]... [A]n integrated package containing the controller 503....”, and “[0070] For a capacitive button system such as system 500, the separate components, such as the... sensor electrode 502... may occupy space on a PCB layout in addition to the space occupied by controller 503....”, see also FIGUREs 1-3, 5-7B, 9A, and 10A-B); and
a driving branch, connected between a second pin (of 503) and the contact, and comprising a driving trace (e.g., 502(1)-503 driving trace) extended on the circuit board and connected to the contact (Narayanasamy: see FIGURE 4 and [0068]-[0070], see also FIGUREs 1-3, 5-7B, 9A, and 10A-B).
Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to include: the features taught by Narayanasamy, such that US 12,533,944 as modified teaches: a chip, arranged on a circuit board having a contact configured to be coupled to the load, and comprising a first pin and a second pin respectively configured to output a sinusoidal signal (chip, load, first and second pins, and sinusoidal signal of and suggested by US 12,533,944 combined with the chip, circuit board, contact, and load of Narayanasamy; see also claim 1 above (circuit board having a contact configured to be coupled to the load)), to provide touch sensing.
However, it is noted that US 12,533,944 as modified by Narayanasamy does not teach:
wherein the shielding metal surrounds the driving trace but does not extend out of the circuit board.
Braeunlich teaches:
wherein a shielding metal (7 and 8 in FIG. 2) surrounds a signal trace (5 in FIG. 1) but does not extend out of a circuit board (1) (Braeunlich: see FIGs. 1-2, “[0016)... [C]ommunication lines 5 of a communication cable, wherein the communication lines 5 are enclosed by a cable shield 6 of the communication cable 22....”, “[0017]... [A] two-part metallic shielding means of the connection element 4....”, and “[0019) The design and symmetrical structure of the metallic shielding element, comprising two parts 7, 8, and the shielded outer layer of the multilayer printed circuit board 1 form a "cage" around the signal lines....”, see also FIG. 3 and [0002]).
Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to include: the features taught by Braeunlich, such that US 12,533,949 as modified teaches: a driving branch, connected between the second pin and the contact, and comprising a driving trace extended on the circuit board and connected to the contact, wherein the shielding metal surrounds the driving trace but does not extend out of the circuit board (driving branch, second pin, driving trace, and shielding metal of US 12,533,949 combined with the driving branch, second pin, contact, driving trace, and circuit board of Narayanasamy and the shielding metal, signal trace, and circuit board of Braeunlich), to achieve “good interference immunity... and [minimize] [p]otential interference emissions....” (Braeunlich: [0020]).
Regarding claim 20, US 12,533,949 as modified by Narayanasamy and Braeunlich teaches: the features of this claim (claim 20 of US 12,533,949).
Instant Application
US 12,533,949
1. A denoising circuit, arranged on a circuit board having a contact configured to be coupled to a load, which is configured to be touched or untouched, the denoising circuit comprising:
a first resistor, configured to be coupled between a first signal source and a first node;
a first capacitor, connected between the first node and ground;
a second resistor, configured to be coupled between a second signal source and a second node;
a second capacitor, connected between the first node and the second node;
a third resistor, connected to the second node;
a third capacitor, connected between the third resistor and a driving trace, wherein the driving trace is configured to be connected to the contact; and
a shielding metal, arranged on the circuit bard surrounding the driving trace, and extending to the contact without extending out of the circuit board.
1. A denoising circuit, connecting between two pins of a chip and a load, the denoising circuit comprising:
a first resistor, connected between a first pin of the chip and a first node;
a first capacitor, connected between the first node and a ground voltage;
a second resistor, connected between a second pin of the chip and a second node;
a second capacitor, connected between the first node and the second node;
a third resistor, connected to the second node;
a third capacitor, connected between the third resistor and a driving trace, wherein the driving trace is configured to be connected to the load, which is configured to be touched by a user; and
a shielding metal, surrounding the driving trace but not surrounding the load.
2. The denoising circuit as claimed in claim 1, wherein the denoising circuit and the driving trace are arranged on a circuit board, and
the shielding metal is arranged in different layers of the circuit board, and surrounding the driving trace in a length direction of the driving trace to the load.
9. A touch detection circuit, connecting to a load and configured to detect an impedance variation of the load, the touch detection circuit comprising:
a chip, comprising a first pin and a second pin; and
a denoising circuit, connected between the chip and the load....
10. The touch detection circuit as claimed in claim 9, wherein the chip further comprises:
a first signal source, configured to output a first signal via the first pin; and
a second signal source, configured to output a second signal via the second pin.
2. The denoising circuit as claimed in claim 1, wherein
the shielding metal is arranged in different layers of the circuit board, and surrounding the driving trace in a length direction of the driving trace to the contact.
2. The denoising circuit as claimed in claim 1, wherein the denoising circuit and the driving trace are arranged on a circuit board, and
the shielding metal is arranged in different layers of the circuit board, and surrounding the driving trace in a length direction of the driving trace to the load.
3. The denoising circuit as claimed in claim 2, wherein one end of the shielding metal is connected to the first node.
3. The denoising circuit as claimed in claim 2, wherein one end of the shielding metal is connected to the first node.
4. The denoising circuit as claimed in claim 2 wherein the shielding metal arranged in the different layers of the circuit board respectively has a rectangular cross section.
4. The denoising circuit as claimed in claim 2 wherein the shielding metal arranged in the different layers of the circuit board respectively has a rectangular cross section.
5. The denoising circuit as claimed in claim 1, wherein the load is an electrode of a vehicle steering wheel or a capacitive touch pad of a computer.
5. The denoising circuit as claimed in claim 1, wherein the load is an electrode of a vehicle steering wheel or a capacitive touch pad of a computer.
6. The denoising circuit as claimed in claim 1, wherein
the third resistor has a resistance of R,
the third capacitor has a capacitance of C,
the first resistor has a resistance of (α+1)R/β,
the first capacitor and the second capacitor respectively has a capacitance of βC,
the second resistor has a resistance of αR, and
the α and the β are positive values.
6. The denoising circuit as claimed in claim 1, wherein
the third resistor has a resistance of R,
the third capacitor has a capacitance of C,
the first resistor has a resistance of (α+1)R/β,
the first capacitor and the second capacitor respectively has a capacitance of βC,
the second resistor has a resistance of αR, and
the α and the β are positive values.
7. The denoising circuit as claimed in claim 6, wherein the R, C, α, and β are determined according to a system frequency of the denoising circuit and noise frequencies.
7. The denoising circuit as claimed in claim 6, wherein the R, C, α, and β are determined according to a system frequency of the denoising circuit and noise frequencies.
8. The denoising circuit as claimed in claim 7, wherein the R, C, α, and β are further determined according to a load capacitor of the load.
8. The denoising circuit as claimed in claim 7, wherein the R, C, α, and β are further determined according to a load capacitor of the load.
9. A touch detection circuit, configured to detect an impedance variation of a load, which is configured to be touched or untouched, the touch detection circuit comprising:
a chip, arranged on a circuit board having a contact configured to be coupled to the load; and
a denoising circuit, arranged on the circuit board between the chip and the contact, and comprising:
a first resistor, configured to be coupled between a first signal source of the chip and a first node;
a first capacitor, connected between the first node and ground;
a second resistor, configured to be coupled between a second signal source of the chip and a second node;
a second capacitor, connected between the first node and the second node;
a third resistor, connected to the second node;
a third capacitor, connected between the third resistor and a driving trace, wherein the driving trace is configured to be connected to the contact; and
a shielding metal, arranged on the circuit bard surrounding the driving trace, and extending to the contact without extending out of the circuit board.
9. A touch detection circuit, connecting to a load and configured to detect an impedance variation of the load, the touch detection circuit comprising:
a chip, comprising a first pin and a second pin; and
a denoising circuit, connected between the chip and the load, and comprising:
a first resistor, connected between the first pin of the chip and a first node;
a first capacitor, connected between the first node and a ground voltage;
a second resistor, connected between the second pin of the chip and a second node;
a second capacitor, connected between the first node and the second node;
a third resistor, connected to the second node;
a third capacitor, connected between the third resistor and a driving trace, wherein the driving trace is configured to be connected to the load, which is configured to be touched by a user; and
a shielding metal, surrounding the driving trace but not surrounding the load.
10. The touch detection circuit as claimed in claim 9, wherein the chip further comprises:
a first signal source, configured to output a first signal via the first pin; and
a second signal source, configured to output a second signal via the second pin.
15. The touch detection circuit as claimed in claim 9, wherein
the denoising circuit and the driving trace are arranged on a circuit board, and
the shielding metal is arranged in different layers of the circuit board, and surrounding the driving trace in a length direction of the driving trace to the load.
10. The touch detection circuit as claimed in claim 9, wherein
the first signal source is configured to output a first signal via a first pin of the chip; and
the second signal source is configured to output a second signal via a second pin of the chip.
10. The touch detection circuit as claimed in claim 9, wherein the chip further comprises:
a first signal source, configured to output a first signal via the first pin; and
a second signal source, configured to output a second signal via the second pin.
11. The touch detection circuit as claimed in claim 10, wherein the first signal and the second signal are identical sinusoidal signals.
11. The touch detection circuit as claimed in claim 10, wherein the first signal and the second signal are identical sinusoidal signals.
12. The touch detection circuit as claimed in claim 9, wherein
the shielding metal is arranged in different layers of the circuit board, and surrounding the driving trace in a length direction of the driving trace to the contact.
15. The touch detection circuit as claimed in claim 9, wherein
the denoising circuit and the driving trace are arranged on a circuit board, and
the shielding metal is arranged in different layers of the circuit board, and surrounding the driving trace in a length direction of the driving trace to the load.
13. The touch detection circuit as claimed in claim 12, wherein one end of the shielding metal is connected to the first node.
16. The touch detection circuit as claimed in claim 15, wherein one end of the shielding metal is connected to the first node.
14. The touch detection circuit as claimed in claim 12, wherein the shielding metal arranged in the different layers of the circuit board respectively has a rectangular cross section.
17. The touch detection circuit as claimed in claim 15, wherein the shielding metal arranged in the different layers of the circuit board respectively has a rectangular cross section.
15. The touch detection circuit as claimed in claim 9, wherein the load is an electrode of a vehicle steering wheel or a capacitive touch pad of a computer.
18. The touch detection circuit as claimed in claim 9, wherein the load is an electrode of a vehicle steering wheel or a capacitive touch pad of a computer.
16. The touch detection circuit as claimed in claim 11, wherein
the third resistor has a resistance of R,
the third capacitor has a capacitance of C,
the first resistor has a resistance of (α+1)R/β,
the first capacitor and the second capacitor respectively has a capacitance of βC,
the second resistor has a resistance of αR, and
the α and the β are positive values.
12. The touch detection circuit as claimed in claim 11, wherein
the third resistor has a resistance of R,
the third capacitor has a capacitance of C,
the first resistor has a resistance of (α+1)R/β,
the first capacitor and the second capacitor respectively has a capacitance of βC,
the second resistor has a resistance of αR, and
the α and the β are positive values.
17. The touch detection circuit as claimed in claim 16, wherein the R, C, α, and β are determined according to a frequency of the sinusoidal signals and noise frequencies.
13. The touch detection circuit as claimed in claim 12, wherein the R, C, α, and β are determined according to a frequency of the sinusoidal signals and noise frequencies.
18. The touch detection circuit as claimed in claim 17, wherein the R, C, α, and β are further determined according to a load capacitor of the load.
14. The touch detection circuit as claimed in claim 13, wherein the R, C, α, and β are further determined according to a load capacitor of the load.
19. A touch detection circuit, configured to detect an impedance variation of a load, which is configured to be touched or untouched, the touch detection circuit comprising:
a chip, arranged on a circuit board having a contact configured to be coupled to the load, and comprising a first pin and a second pin respectively configured to output a sinusoidal signal;
a shielding metal;
a shielding branch, connected between the first pin, a ground voltage and the shielding metal, and configured to direct noises to the ground voltage;
a driving branch, connected between the second pin and the contact, and comprising a driving trace extended on the circuit board and connected to the contact, wherein the shielding metal surrounds the driving trace but does not extend out of the circuit board; and
an intermediate capacitor, connected between the shielding branch and the driving branch.
19. A touch detection circuit, connecting to a load and configured to detect an impedance variation of the load, the touch detection circuit comprising:
a chip, comprising a first pin and a second pin respectively configured to output a sinusoidal signal;
a shielding metal;
a shielding branch, connected between the first pin, a ground voltage and the shielding metal, comprising a first resistor connected between the first pin and a first node, and a first capacitor connected between the first node and the ground voltage, and configured to direct noises to the ground voltage;
a driving branch, connected between the second pin and the load, and comprising a second resistor connected between the second pin and a second node, an intermediate capacitor, a third resistor connected to the second node, and a third capacitor connected between the third resistor and a driving trace, wherein the driving trace is connected to the load, wherein the shielding metal surrounds the driving trace but does not surround the load; and
wherein the intermediate capacitor is connected between the first node of the shielding branch and the second node of the driving branch.
9. A touch detection circuit, connecting to a load and configured to detect an impedance variation of the load, the touch detection circuit comprising:
...
a third capacitor, connected between the third resistor and a driving trace, wherein the driving trace is configured to be connected to the load, which is configured to be touched by a user....
20. The touch detection circuit as claimed in claim 19, wherein the load is an electrode of a vehicle steering wheel or a capacitive touch pad of a computer.
20. The touch detection circuit as claimed in claim 19, wherein the load is an electrode of a vehicle steering wheel or a capacitive touch pad of a computer.
Conclusion
The prior art made of record and not relied upon is considered pertinent to Applicants’ disclosure. Please take note of references listed in the attached PTO-892 form. An original copy and corresponding machine translation of each foreign patent document was provided in parent Application No. 18/349,966 - May 9, 2025 Office action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to K. Kiyabu whose telephone number is (571) 270-7836. The examiner can normally be reached Monday to Thursday 9:00 A.M. - 5:00 P.M. ET.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Temesghen Ghebretinsae, can be reached at (571) 272-3017. The fax number for the organization where this application or proceeding is assigned is (571) 273-8300.
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/K. K./
Examiner, Art Unit 2626
/TEMESGHEN GHEBRETINSAE/Supervisory Patent Examiner, Art Unit 2626 7/27/26
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