DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 12/18/2025 has been placed in record and considered by the examiner.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2 are rejected under 35 U.S.C. 103 as being unpatentable over Cui (US 11,972,734 hereinafter Cui) in view of Kwon Hoi Yong (EP 4060750 A1 hereinafter Yong).
Referring to claim 1, Cui discloses a display apparatus (Col. 3 lines 10-23; The present application further provides a display panel, including a plurality of sub-pixels arranged in an array and a voltage conversion module. Each of the sub-pixels includes a light emitting device and a pixel driving circuit. The pixel driving circuit includes a driving transistor, a data transistor, a first capacitor, and a second capacitor. An anode of the light emitting device is electrically connected to one of a source and a drain of the driving transistor, a cathode of the light emitting device is electrically connected to a common node, another one of the source and the drain of the driving transistor is electrically connected to a first voltage terminal, a source and a drain of the data transistor are electrically connected between corresponding one of data lines and a gate of the driving transistor, the first capacitor is connected between the first voltage terminal and the anode of the light emitting device, and the second capacitor is connected between the gate of the driving transistor and the anode of the light emitting device.), comprising:
a first subpixel (Fig. 1A-1B; ) including a first light emitting element configured to emit light, a first driving transistor configured to drive the first light emitting element (Col. 10 lines 3-12; Each of the plurality of sub-pixels Pi is electrically connected to corresponding one of the data lines DL, corresponding one of the first scanning lines ScL, corresponding one of the second scanning lines SgL, and corresponding one of the light-emitting control lines EML so that the sub-pixel Pi is displayed according to the first scanning signal, the second scanning signal, and the light-emitting control signal.
Alternatively, each of the sub-pixels Pi includes a light emitting device D and a pixel driving circuit Pd.), and a first capacitor (Fig. 1A-1B; C1) disposed between a drain electrode and a source electrode of the first driving transistor (Fig. 1A-1B; a capacitor C1 disposed between source and drain of the driving transistor T1); and
a second subpixel including a second light emitting element configured to emit light, a second driving transistor configured to drive the second light emitting element (Col. 10 lines 3-12; Each of the plurality of sub-pixels Pi is electrically connected to corresponding one of the data lines DL, corresponding one of the first scanning lines ScL, corresponding one of the second scanning lines SgL, and corresponding one of the light-emitting control lines EML so that the sub-pixel Pi is displayed according to the first scanning signal, the second scanning signal, and the light-emitting control signal.
Alternatively, each of the sub-pixels Pi includes a light emitting device D and a pixel driving circuit Pd.), and a second capacitor (Fig. 1A-1B; C1) disposed between a drain electrode and a source electrode of the second driving transistor (Fig. 1A-1B; a capacitor C1 disposed between source and drain of the driving transistor T1).
However, Cui is silent on a first subpixel to emit light of a first color; a second subpixel to emit light of a second color; and
wherein a capacitance of the first capacitor is different from a capacitance of the second capacitor.
Cui discloses (Col. 10 lines 3-12; Each of the plurality of sub-pixels Pi is electrically connected to corresponding one of the data lines DL, corresponding one of the first scanning lines ScL, corresponding one of the second scanning lines SgL, and corresponding one of the light-emitting control lines EML so that the sub-pixel Pi is displayed according to the first scanning signal, the second scanning signal, and the light-emitting control signal.
Alternatively, each of the sub-pixels Pi includes a light emitting device D and a pixel driving circuit Pd…. and Fig. 1A-1B; a capacitor C1 disposed between source and drain of the driving transistor T1.). Thus, reads on limitation “wherein a capacitance of the first capacitor is different from a capacitance of the second capacitor”. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was made to include that “wherein a capacitance of the first capacitor is different from a capacitance of the second capacitor” in order to reduce the size of the pixel driving circuit, and reduce the manufacturing cost of the display panel.
However, Cui is silent on a first subpixel to emit light of a first color; and a second subpixel to emit light of a second color.
In an analogous art, Yong discloses a first subpixel to emit light of a first color; and a second subpixel to emit light of a second color (Fig. 1; pixel circuit comprises sub-pixels with red, green, blue, and white).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to apply the technique of Yong to the system of Cui in order to reduce the manufacturing time and cost of the display.
Referring to claim 2, Cui discloses further comprising:
a third subpixel including a third light emitting element configured to emit light, a third driving transistor configured to drive the third light emitting element (Col. 10 lines 3-12; Each of the plurality of sub-pixels Pi is electrically connected to corresponding one of the data lines DL, corresponding one of the first scanning lines ScL, corresponding one of the second scanning lines SgL, and corresponding one of the light-emitting control lines EML so that the sub-pixel Pi is displayed according to the first scanning signal, the second scanning signal, and the light-emitting control signal.
Alternatively, each of the sub-pixels Pi includes a light emitting device D and a pixel driving circuit Pd.), and a third capacitor (Fig. 1A-1B; C1) disposed between a drain electrode and a source electrode of the third driving transistor (Fig. 1A-1B; a capacitor C1 disposed between source and drain of the driving transistor T1),
However, Cui is silent on a third subpixel to emit light of a third color; and
wherein a capacitance of the third capacitor is different from the capacitance of at least one of the first and second capacitors.
Cui discloses (Col. 10 lines 3-12; Each of the plurality of sub-pixels Pi is electrically
connected to corresponding one of the data lines DL, corresponding one of the first scanning lines ScL, corresponding one of the second scanning lines SgL, and corresponding one of the light-emitting control lines EML so that the sub-pixel Pi is displayed according to the first scanning signal, the second scanning signal, and the light-emitting control signal.
Alternatively, each of the sub-pixels Pi includes a light emitting device D and a pixel driving circuit Pd). Thus, reads on limitation “wherein a capacitance of the third capacitor is different from the capacitance of at least one of the first and second capacitors”. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was made to include that “wherein a capacitance of the third capacitor is different from the capacitance of at least one of the first and second capacitors” in order to reduce the size of the pixel driving circuit, and reduce the manufacturing cost of the display panel.
However, Cui is silent on a third subpixel to emit light of a third color.
In an analogous art, Yong discloses a third subpixel to emit light of a third color (Fig. 1; pixel circuit comprises sub-pixels with red, green, blue, and white).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to apply the technique of Yong to the system of Cui in order to reduce the manufacturing time and cost of the display.
Claim Objections
Claims 3-12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Referring to claim 3, the following is a statement of reasons for the indication of allowable subject matter: the prior art fail to suggest limitation “wherein:
the first light emitting element is configured to emit a red light;
the second light emitting element is configured to emit a green light;
the third light emitting element is configured to emit a blue light;
among the first, second and third light emitting elements, an emission area of the first light emitting element is the smallest; and
the capacitances of the second and third capacitors are greater than the capacitance of the first capacitor”.
Referring to claim 11 is objected upon dependent on the claim 3.
Referring to claim 4, the following is a statement of reasons for the indication of allowable subject matter: the prior art fail to suggest limitation “wherein:
the first subpixel includes a first pixel circuit configured to drive the first light emitting element;
the second subpixel includes a second pixel circuit configured to drive the second light emitting element;
the third subpixel includes a third pixel circuit configured to drive the third light emitting element;
each of the first, second, and third pixel circuits includes a polysilicon transistor and an oxide transistor; and
each of the first, second, and third driving transistors includes the oxide transistor”.
Referring to claims 5-10 and 12 are objected upon dependent on the claim 4.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SCOTT D AU whose telephone number is (571)272-5948. The examiner can normally be reached M-F. General 8am-5pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Eason can be reached at 571-270-7230. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/SCOTT D AU/Examiner, Art Unit 2624
Prosecution Insights