DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-20 are present for examination.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 03/18/2026 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claims 1-12 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-10 of U.S. Patent No. 12,536,954. Although the claims at issue are not identical, they are not patentably distinct from each other because both sets of claims are claiming a pixel circuit comprising of nearly identical features or components. It would have been obvious to one having ordinary skill in the art before the effective filing date of claimed invention to use the claimed features of the reference patent to arrive at the instant claim, yielding predictable results and no more than one having ordinary skill in the art would expect from such an arrangement, as shown below.
Instant Application 19/435,793
Reference Patent 12,536,954
1. A pixel circuit, comprising:
a light-emitting device;
a driving module electrically connected to the light-emitting device for driving the light-emitting device to emit light; and
a light-emitting control module connected to the driving module, wherein the light-emitting control module, the light-emitting device and the driving module are connected in series between a first voltage terminal and a second voltage terminal, a control terminal of the light-emitting control module is configured for receiving a light-emitting control signal, and the light-emitting control signal comprises black frame insertion pulses and light-emitting pulses, wherein the black frame insertion pulses are configured for cutting off an illumination loop of the pixel circuit, and the light-emitting pulses are configured for conducting the illumination loop;
wherein a light-emitting stage of a frame of the pixel circuit at least comprises an early light-emitting stage of said frame and a late light-emitting stage of said frame, a time ratio of the early light-emitting stage in the light-emitting stage of said frame and a time ratio of the late light-emitting stage in the light-emitting stage of said frame are same or different; a duty ratio of the black frame insertion pulses to the early light-emitting stage of said frame is a first ratio value, a duty ratio of the black frame insertion pulses to the late light-emitting stage of said frame is a second ratio value, and the first ratio is greater than the second ratio value.
1. A pixel circuit, comprising:
a light-emitting device;
a driving module electrically connected to the light-emitting device for driving the light-emitting device to emit light; and
a light-emitting control module connected to the driving module, wherein the light-emitting control module, the light-emitting device and the driving module are connected in series between a first voltage terminal and a second voltage terminal, a control terminal of the light-emitting control module is configured for receiving a light-emitting control signal, and the light-emitting control signal comprises black frame insertion pulses and light-emitting pulses, wherein the black frame insertion pulses are configured for cutting off an illumination loop of the pixel circuit, and the light-emitting pulses are configured for conducting the illumination loop;
wherein a light-emitting stage of a frame of the pixel circuit at least comprises an early light-emitting stage of said frame and a late light-emitting stage of said frame, a duty ratio of the black frame insertion pulses to the early light-emitting stage of said frame is a first ratio value, a duty ratio of the black frame insertion pulses to the late light-emitting stage of said frame is a second ratio value, and the first ratio value is greater than the second ratio value.
Instant Application 19/435,793
Reference Patent 12,536,954
Claim 2
Claim 3
Claim 4
Claim 5
Claim 6
Claim 7
Claim 8
Claim 9
Claim 10
Claim 11
Claim 12
Claim 2
Claim 3
Claim 4
Claim 5
Claim 6
Claim 7
Claim 9
Claim 7
Claim 8
Claim 10
Claim 10
Claims 13-18 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 11-19 of U.S. Patent No. 12,536,954. Although the claims at issue are not identical, they are not patentably distinct from each other because both sets of claims are claiming a display panel comprising of nearly identical features or components. It would have been obvious to one having ordinary skill in the art before the effective filing date of claimed invention to use the claimed features of the reference patent to arrive at the instant claim, yielding predictable results and no more than one having ordinary skill in the art would expect from such an arrangement, as shown below.
Instant Application 19/435,793
Reference Patent 12,536,954
13. A display panel, comprising:
a light-emitting driving circuit; and
a pixel circuit connected to the light-emitting driving circuit that provides the light-emitting control signal, wherein the pixel circuit comprises:
a light-emitting device;
a driving module electrically connected to the light-emitting device for driving the light-emitting device to emit light; and
a light-emitting control module connected to the driving module, wherein the light-emitting control module, the light-emitting device and the driving module are connected in series between a first voltage terminal and a second voltage terminal, a control terminal of the light-terminal control module is configured for receiving a light-emitting control signal, and the light-emitting control signal comprises black frame insertion pulses and light-emitting pulses, wherein the black frame insertion pulses are configured for cutting off an illumination loop of the pixel circuit, and the light-emitting pulses are configured for conducting the illumination loop;
wherein a light-emitting stage of a frame of the pixel circuit at least comprises an early light-emitting stage of said frame and a late light-emitting stage of said frame, a time ratio of the early light-emitting stage in the light-emitting stage of said frame and a time ratio of the late light-emitting stage in the light-emitting stage of said frame are same or different; a duty ratio of the black frame insertion pulses to the early light-emitting stage of said frame is a first ratio value, a duty ratio of the black frame insertion pulses to the late light-emitting stage of said frame is a second ratio value, and the first ratio value is greater than the second ratio value.
11. A display panel, comprising:
a light-emitting driving circuit; and
a pixel circuit connected to the light-emitting driving circuit that provides the light-emitting control signal, wherein the pixel circuit comprises:
a light-emitting device;
a driving module electrically connected to the light-emitting device for driving the light-emitting device to emit light; and
a light-emitting control module connected to the driving module, wherein the light-emitting control module, the light-emitting device and the driving module are connected in series between a first voltage terminal and a second voltage terminal, a control terminal of the light-terminal control module is configured for receiving a light-emitting control signal, and the light-emitting control signal comprises black frame insertion pulses and light-emitting pulses, wherein the black frame insertion pulses are configured for cutting off an illumination loop of the pixel circuit, and the light-emitting pulses are configured for conducting the illumination loop;
wherein a light-emitting stage of a frame of the pixel circuit at least comprises an early light-emitting stage of said frame and a late light-emitting stage of said frame, a duty ratio of the
black frame insertion pulses to the early light-emitting stage of said frame is a first ratio value, a duty ratio of the black frame insertion frame insertion pulses to the late light-emitting stage of said frame is a second ratio value, and the first ratio value is greater than the second ratio value.
Instant Application 19/424,851
Reference Application 19/425,920
Claim 14
Claim 15
Claim 16
Claim 17
Claim 18
Claim 12
Claim 13
Claim 14
Claim 19
Claim 15
Claims 19-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 20 of U.S. Patent No. 12,536,954. Although the claim at issue is not identical, it is not patentably distinct from each other because both sets of claims are claiming a method for controlling a display panel comprising of nearly identical steps or features or components. It would have been obvious to one having ordinary skill in the art before the effective filing date of claimed invention to use the claimed features of the reference patent to arrive at the instant claim, yielding predictable results and no more than one having ordinary skill in the art would expect from such an arrangement, as shown below.
Instant Application 19/435,793
Reference Patent 12,536,954
19. A method for controlling a display panel, wherein the display panel comprises:
a light-emitting driving circuit; and
a pixel circuit connected to the light-emitting driving circuit that provides the light-emitting control signal, wherein the pixel circuit comprises:
a light-emitting device;
a driving module electrically connected to the light-emitting device for driving the light-emitting device to emit light; and
a light-emitting control module connected to the driving module, wherein the light-emitting control module, the light-emitting device and the driving module are connected in series between a first voltage terminal and a second voltage terminal, a control terminal of the light-terminal control module is configured for receiving a light-emitting control signal, and the light-emitting control signal comprises black frame insertion pulses and light-emitting pulses, wherein the black frame insertion pulses are configured for cutting off an illumination loop of the pixel circuit, and the light-emitting pulses are configured for conducting the illumination loop;
wherein a light-emitting stage of a frame of the pixel circuit at least comprises an early light-emitting stage of said frame and a late light-emitting stage of said frame, a time ratio of the early light-emitting stage in the light-emitting stage of said frame and a time ratio of the late light-emitting stage in the light-emitting stage of said frame are same or different; a duty ratio of the black frame insertion pulses to the early light-emitting stage of said frame is a first ratio value, a duty ratio of the black frame insertion pulses to the late light-emitting stage of said frame is a second ratio value, and the first ratio value is greater than the second ratio value, and
wherein the method for controlling a display panel comprises:
controlling the light-emitting driving circuit to provide the light-emitting control signal to the pixel circuit during the light-emitting stage of said frame of the pixel circuit.
20. A method for controlling a display panel, wherein the display panel comprises:
a light-emitting driving circuit; and
a pixel circuit connected to the light-emitting driving circuit that provides the light-emitting control signal, wherein the pixel circuit comprises:
a light-emitting device;
a driving module electrically connected to the light-emitting device for driving the light-emitting device to emit light; and
a light-emitting control module connected to the driving module, wherein the light-emitting control module, the light-emitting device and the driving module are connected in series between a first voltage terminal and a second voltage terminal, a control terminal of the light-terminal control module is configured for receiving a light-emitting control signal, and the light-emitting control signal comprises black frame insertion pulses and light-emitting pulses, wherein the black frame insertion pulses are configured for cutting off an illumination loop of the pixel circuit, and the light-emitting pulses are configured for conducting the illumination loop;
wherein a light-emitting stage of a frame of the pixel circuit at least comprises an early light-emitting stage of said frame and a late light-emitting stage of said frame, a duty ratio of the
black frame insertion pulses to the early light-emitting stage of said frame is a first ratio value, a duty ratio of the black frame insertion frame insertion pulses to the late light-emitting stage of said frame is a second ratio value, and the first ratio value is greater than the second ratio value, and
wherein the method for controlling a display panel comprises:
controlling the light-emitting driving circuit to provide the light-emitting control signal to the pixel circuit during the light-emitting stage of said frame of the pixel circuit.
Instant Application 19/435,793
Reference Patent 12,536,954
Claim 20
Claim 20
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Yuan et al (US 2020/0312223)
Yang et al (USPN 11,783,777)
Liu et al (USPN 11,908,403)
Any inquiry concerning this communication from the examiner should be directed to whose telephone number is 571-272-7565. The examiner can normally be reached on weekdays from 2:0 pm to 10:00 pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Boddie can be reached on 571-272-0666. The fax phone numbers for the organization where this application or proceeding is assigned are 571-273-8300 for regular communications and 571-273-7565 for After Final communications.
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/FRED TZENG/ Primary Examiner, Art Unit 2625
FFT
July 25, 2026
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