DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This Office Action is in response to the Applicant’s amendment filed June 15, 2026.
Response to Amendment
Applicant's request for reconsideration of the finality of the rejection of the last Office action is persuasive and, therefore, the finality of that action is withdrawn.
Drawings
The objection to the drawings has been withdrawn due to the amendment filed.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 9 recites the limitations "the relaxed In-containing III-nitride surface" in lines 2 and 4; and "the fully relaxed In-containing III-nitride alloy" in lines 5-6. There is insufficient antecedent basis for this limitation in the claim.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-4, 6-9, 13 and 15-33 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yoshikawa et al. (JP 2016111317 A).
In regard to claim 1, Yoshikawa et al. teach a semiconductor structure 400 comprising: (a) a III-nitride layer 401 comprising a III-nitride surface; (b) a relaxed In-containing III-nitride layer 402 overlying the III-nitride surface; and (c) a slip layer 403 overlying the III-nitride layer 401 and underlying the relaxed In-containing III-nitride layer 402 (Figure 17, pages 29-37).
In regard to claim 2, Yoshikawa et al. teach the slip layer 403 disposed on the III-nitride surface (Figure 17, pages 29-37).
In regard to claim 3, Yoshikawa et al. teach the slip layer 403 comprising a metal oxide, a non-metal oxide, a metal nitride, a non-metal nitride, or a combination of any of the foregoing (Figure 17, pages 29-37).
In regard to claims 4 and 19-21, where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, burden is on Applicant to show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). Discovering the desired thickness, distance or pit density is within the level of ordinary skill and requires only routine experimentation.
In regard to claim 6, Yoshikawa et al. teach the slip layer 403 comprising nanoscale islands or discontinuous patches 404 defining low-adhesion boundaries (Figure 17, pages 29-37).
In regard to claim 7, Yoshikawa et al. teach the nanoscale islands or discontinuous patches 404 covering between 10% and 90% of the III-nitride surface (Figure 17, pages 29-37).
In regard to claim 8, Yoshikawa et al. teach the relaxed In-containing III-nitride layer 402 comprising a relaxed In-containing III-nitride surface characterized by an in-plane a-lattice parameter that differs from an in-plane a-lattice parameter of the III-nitride layer 401 by at least 0.1% (Figure 17, pages 29-37).
In regard to claim 9, Yoshikawa et al. teach the relaxed In-containing III-nitride surface (of 402) comprising an In-containing III-nitride alloy; and the relaxed In-containing III-nitride surface (of 402) is characterized by an in-plane a-lattice parameter within ±0.1% of an in-plane a-lattice parameter the fully relaxed In-containing III-nitride alloy (of 402) (Figure 17, pages 29-37).
In regard to claim 13, Yoshikawa et al. teach the III-nitride layer 401 comprising GaN, InxGa1-xN,or InxAlyGa1-x-yN, wherein 0 < x < 1 and 0 < y < 1 (Figure 17, pages 29-37).
In regard to claim 15, Yoshikawa et al. teach the III- nitride surface (of 401) being a planar Wurtzite (0001) surface (Figure 17, pages 29-37).
In regard to claim 16, Yoshikawa et al. teach the III-nitride surface (of 401) having a roughness of less than 1 nm RMS over a 1 µm x 1 µm area (Figure 17, pages 29-37).
In regard to claim 17, Yoshikawa et al. teach the relaxed In-containing III-nitride layer 402 comprising InxAlyGa1-x-yN, wherein 0 < x < 1 and 0 < y < 1 (Figure 17, pages 29-37).
In regard to claim 18, Yoshikawa et al. teach the relaxed In-containing III-nitride layer 402 having an InN mole fraction greater than 1% (Figure 17, pages 29-37).
In regard to claim 22, Yoshikawa et al. teach the relaxed In-containing III-nitride layer 402 having a surface characterized by an in-plane a-lattice parameter within ±0.1% of a fully relaxed in-plane a-lattice parameter of the In-containing III-nitride alloy (Figure 17, pages 29-37).
In regard to claim 23, Yoshikawa et al. teach one or more epitaxial layers (See Figure 18) overlying the relaxed In-containing III-nitride layer 402 (Figures 17-18, pages 29-37).
In regard to claim 24, Yoshikawa et al. teach the one or more epitaxial layers (See Figure 18) comprising an In-containing III-nitride layer (Figure 17, pages 29-37).
In regard to claim 25, Yoshikawa et al. teach an engineered substrate 501 underlying the III-nitride layer 502 (Figures 17-18, pages 29-37).
In regard to claim 26, Yoshikawa et al. teach a semiconductor device 400 comprising the semiconductor structure of claim 1 (Figure 17, pages 29-37).
In regard to claim 27, Yoshikawa et al. teach an active region 403 overlying the relaxed In-containing III-nitride layer 401 (Figure 17, pages 29-37).
In regard to claim 28, Yoshikawa et al. teach the active region 403 is configured to emit electromagnetic radiation between 440 nm and 650 nm (Figure 17, pages 29-37).
In regard to claim 29, Yoshikawa et al. teach a wafer comprising the semiconductor structure (of 400) of claim 1 (Figure 17, pages 29-37).
In regard to claim 30, Yoshikawa et al. teach a wafer comprising the semiconductor device 400 of claim 26 (Figure 17, pages 29-37).
In regard to claim 31, Yoshikawa et al. teach the slip layer 403 being non-continuous (Figure 17, pages 29-37).
In regard to claim 32, Yoshikawa et al. teach the slip layer 403 disposed between the planar Wurtzite (0001) surface and the relaxed In-containing III-nitride layer 402 (Figure 17, pages 29-37).
In regard to claim 33, Yoshikawa et al. teach the slip layer 403 being non-continuous and comprises nanoscale islands, non-continuous nanoscale platelets, or irregularly-shaped areas (Figure 17, pages 29-37).
Allowable Subject Matter
Claim 10 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 11 is objected to as being dependent upon rejected claim 10.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-4, 6-11, 13 and 15-33 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
The following patents are cited to further show the state of the art with respect to semiconductor structures:
Arena (US 2010/0109126 A1) Arena (US 2013/0285015 A1)
Chua et al. (US 2011/0150017 A1) M. Letertre (TW I414021 B)
Pernel (CN 113013018 A) Werkhoven (US 2012/0161289 A1).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to IDA M SOWARD whose telephone number is (571)272-1845. The examiner can normally be reached Monday through Thursday, 7am to 5:30pm.
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IMS
June 17, 2026
/IDA M SOWARD/Primary Examiner, Art Unit 2898
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