DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 5-9 and 12-16 are rejected under 35 U.S.C. 103 as being unpatentable over Hosseini (US Patent Application Publication No. 2022/0413216).
Regarding claim 1, Hosseini discloses a network sub-system for an optical network, the optical network comprising a plurality of nodes connected by optical signal paths, the network sub-system being provided at a node of the plurality of nodes (fig. 1 and paragraph 0042, “optical communications network” inherently requires communication between at least two nodes) and comprising: a network termination unit (fig. 1A element 103 and paragraphs 0035 and 0046); a data conversion chip configured to communicate electrical data signals to and from the network termination unit, and further configured to convert between electrical data signals and optical data signals (fig. 1A TRX 1 of element 102 and paragraph 0035); an optical switching chip configured to direct optical data signals across the optical network in accordance with selected optical signal path and wavelength (fig. 1A element 101 and paragraph 0035); wherein the network termination unit and the data conversion chip are provided on a first circuit module (fig. 1A element 104 and paragraph 0035), the optical switching chip is separate from the data conversion chip (fig. 1A element 101 and paragraph 0035, optical switch die); and the data conversion chip and the optical switching chip are in optical communication with each other, whereby optical data signals for communication to and from said node are communicated between the data conversion chip and the optical switching chip (fig. 1A element 110 and 0044). Hosseini discloses the optical switching chip provided on the same module 104, and thus does not disclose it provided on a second circuit module separate from the first circuit module. However, the difference between the claim and Hosseini is only a simple, non-functional, physical separation. Hosseini fig. 2 shows an example of separate substrates with fibers coupled between. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to split substrate 104 such that chip 101 has its own substrate, as this is a matter of simple, non-functional, physical separation.
Regarding claim 2, Hosseini discloses the network sub-system of claim 1, wherein the first circuit module is a central processing unit, CPU, card (fig. 1A element 103 and paragraph 0046 in light of fig. 6 element 610 and paragraphs 0086-0090).
Regarding claim 3, Hosseini discloses the network sub-system of claim 1, wherein the data conversion chip and the network termination unit provided in the same physical package (fig. 1A element 104 and paragraph 0035, where sharing a substrate reads on co-packaged).
Regarding claim 5, Hosseini discloses the network sub-system of claim 1, wherein the data conversion chip and the optical switching chip are in optical communication with each other via one or more optical fibres (fig. 1A element 110 and 0044).
Regarding claim 6, Hosseini discloses the network sub-system of claim 1, wherein the data conversion chip comprises a modulator configured to modulate received light from a light source provided remotely from the data conversion chip, the light from the light source being provided at a selected optical wavelength for propagating an optical data signal to the optical network (paragraphs 0039 and 0046).
Regarding claim 7, Hosseini discloses the network sub-system of claim 6, wherein the network sub-system comprises an optical loop path whereby modulated light from the modulator is directed to the optical switching chip (fig. 1A and paragraph 0039, for the option of laser sources fed in through 105 to transceivers, which then modulate and transmit data signals – this reads on “loop” because Applicant’s disclosed “loop” is simply a back and forth path, not a closed loop).
Regarding claim 8, Hosseini discloses the network sub-system of claim 6, wherein the light source comprises at least one of: a fixed wavelength laser; a tunable laser configured to emit different wavelengths of light; a plurality of fixed wavelength lasers having different wavelengths of light; a plurality of tunable lasers configured to emit different wavelengths of light (paragraphs 0039 and 0046, the laser is inherently either fixed or tunable wavelength).
Regarding claim 9, Hosseini discloses the network sub-system of claim 1, wherein the data conversion chip comprises at least one photodetection device configured to receive an optical data signal from the optical switching chip, and wherein the at least one photodetection device is configured to convert the received optical data signal to electrical form (paragraphs 0039 and 0046).
Regarding claim 12, Hosseini discloses the network sub-system of claim 1, wherein the optical switching chip comprises a transmission switching structure configured to direct an optical data signal received from the data conversion chip to a selected output port of the node for propagation over at least one optical signal path in the optical network to at least one other node of the plurality of nodes (fig. 1A element 101 and paragraphs 0042-0044, for the transmit function of the transceivers, where “optical communications network” inherently requires the transmitted data to be received at another node).
Regarding claim 13, Hosseini discloses the network sub-system of claim 1, wherein the optical switching chip comprises a receiving switching structure configured to direct an optical data signal from an input port of the node to the data conversion chip for reception by at least one photodetection device of the data conversion chip that is configured to convert the received optical data signal received to electrical form (fig. 1A element 101 and paragraphs 0042-0044, for the receive function of the transceivers).
Regarding claim 14, Hosseini discloses a network sub-assembly for an optical network, the optical network comprising a plurality of nodes connected by optical signal paths, the network sub-assembly being provided at a node of the plurality of nodes (fig. 1 and paragraph 0042, “optical communications network” inherently requires communication between at least two nodes) and comprising: a data conversion chip configured to communicate electrical data signals to and from a network termination unit of the node provided on a first circuit module, and further configured to convert between electrical data signals and optical data signals (fig. 1A TRX 1 of element 102 and paragraph 0035); an optical switching chip configured to direct optical data signals across the optical network in accordance with selected optical signal path and wavelength (fig. 1A element 101 and paragraph 0035); wherein the data conversion chip is configured to be provided on the first circuit module (fig. 1A element 104 and paragraph 0035); the optical switching chip is separate from the data conversion chip (fig. 1A element 101 and paragraph 0035, optical switch die); and the data conversion chip and the optical switching chip are in optical communication with each other, whereby optical data signals for communication to and from said node are communicated between the data conversion chip and the optical switching chip (fig. 1A element 110 and 0044).
Regarding claim 15, Hosseini discloses the network sub-system of claim 1, wherein the network termination unit is any one of: a processing unit, a storage unit, a switching unit, a memory unit (fig. 1A element 103 and paragraph 0046).
Regarding claim 16, Hosseini discloses the network sub-assembly of claim 14, wherein the network termination unit is any one of: a processing unit, a storage unit, a switching unit, a memory unit (fig. 1A element 103 and paragraph 0046).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 10 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Hosseini (US Patent Application Publication No. 2022/0413216) in view of Allouche (US Patent Application Publication No. 2006/0198571).
Regarding claim 10, Hosseini discloses the network sub-system of claim 1, but does not disclose one or more electronic integrated circuits such that it is provided on the first circuit module, the one or more electronic integrated circuits comprising at least one electronic amplification device for amplifying an electronic signal provided by the data conversion chip and/or at least one electronic driver device for driving at least one component of the data conversion chip. However, Allouche discloses a conventional arrangement for a transceiver, including a TIA and post-amplifier after the receiver and driver for the transmit side (fig. 1 and paragraphs 0027-0029). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to integrated post-reception amplification and a transmitter driver on the transceiver chip of Hosseini, for the respective benefits of I/V conversion and signal leveling, and transmit level control.
Regarding claim 11, the combination of Hosseini and Allouche discloses the network sub-system of claim 10, wherein the one or more electronic integrated circuits are integrated with the data conversion chip (Hosseini: fig. 1A element 102 and Allouche: fig. 1 element 100, as applicable for the combination).
Response to Arguments
Applicant's arguments filed 17 August 2026 have been fully considered but they are not persuasive.
Regarding the limitation added to claim 1 (per previous claim 4, now canceled), Applicant argues that Hosseini’s fig. 2 is directed to a “different architectural level” than the “internal/die package arrangement” of figs. 1A-1D, arguing that fig. 2 is showing complete packages “at the system level” and “platform-level.” This argument is not persuasive. Regarding “internal”, element 101 is already disclosed as its own die, and it is simply on the substrate. That it can be considered internal to a package has no bearing on whether one skill in the art (OSITA) would recognize that using a single package, versus multiple packages, without otherwise changing components, connections, or functions, would be obvious variants. Further, Applicant is using “system level” and “platform-level” to imply distinct or limiting physical features that are not disclosed or inherent to fig. 2. Fig. 2 is showing chips/circuits, cards, and fiber ribbons. The “system” or “platform” characterization of fig. 2 is Applicant’s own reading of some kind of distinguished feature(s) into the disclosure. However, there are no distinguishing features that prohibit considering the arrangement/layout principles of figs. 1A-1D and fig. 2 as suggestive and relevant to each other. Further, when a die/chiplet is made physically separate, it can necessarily be considered as taking on a different “architectural level,” if one wants to consider packaging as “architectural,” which is subjective. The question is whether such a physical change would have been obvious to OSITA. It would have been, because the difference is only a simple, non-functional separation, and Hosseini fig. 2 shows an example of separate substrates with fibers coupled between. OSITA would not need express education on die separation, substrates, or packaging in order to simply realize die 101 as a separate module.
Applicant further argues that the claimed separation is not merely physical and non-functional, arguing that placing the data conversion chip on the same first circuit module as the network termination unit produces benefits. This argument is not persuasive because it is arguing in favor of the arrangement of the data conversion chip and the network termination unit, whereas the claim limitation is directed to separation of the optical switching chip and the data conversion chip. The concept of placing A and B on the same module is not an argument for the patentability of having separate B and C modules. Further, there is no functionality that arises inherently, or in the disclosure, from the claimed separation of the optical switching chip from the data conversion chip. The benefits argued by Applicant would be related to the network termination unit and data conversion chip being on the same module, which is a distinct limitation. However, even in that case, placing chips on the same module may, but does not inherently, result in the argued benefits. Thus, the claim scope is simply establishing that two components are on the same module, and another component is on a different module.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NATHAN M CORS whose telephone number is (571)272-3028. The examiner can normally be reached Monday-Friday.
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/NATHAN M CORS/Primary Examiner, Art Unit 2634
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