DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 3, 4, 9-11, 13, 14, 19 and 20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by “Massively Parallel Huffman Decoding on GPUs” henceforth referred to as Weibenberger et al.
Consider claim 1, Weibenberger et al. discloses a computer system configured to execute software instructions stored on nontransitory machine-readable storage media, wherein the software instructions comprise instructions that cause the computer system to: receive a variable-length encoded bitstream comprising a sequence of codewords drawn from a prefix-free codebook; select an arbitrary bit offset within the variable-length encoded bitstream; initialize a plurality of decoder instances at staggered bit offsets, wherein the staggered bit offsets comprise the arbitrary bit offset and a set of additional offsets positioned sequentially following the arbitrary bit offset, and wherein a spacing between consecutive offsets does not exceed a maximum codeword length associated with the prefix-free codebook; advance each decoder instance of the plurality of decoder instances through the variable- length encoded bitstream by decoding symbols according to the prefix-free codebook; monitor decoded outputs produced by the plurality of decoder instances to detect decoder agreement, wherein decoder agreement is identified when all decoder instances produce identical decoded symbol sequences over a defined region of the bitstream; identify a valid codeword boundary at a bit position where decoder agreement is detected; and decode data from the identified valid codeword boundary (abstract, section 2.1 Huffman coding and section 3 Synchronization, Weibenberger et al. discloses Huffman coding when is codebook based, prefix free and variable length. Multiple decoders are used to decode the Huffman coding and each decoder starts a staggered location in the bitstream. The output of each decoder is monitored for when each decoder starts producing the same output (synch point) to identity a valid codeword boundary.).
Consider claim 3, Weibenberger et al. discloses the computer system of claim 1, further comprising software instructions that cause the computer system to: execute the plurality of decoder instances in parallel using multiple processor cores or vectorized instructions; and evaluate agreement among the plurality of decoder instances continuously or at periodic checkpoints during parallel execution (abstract, section 2.1 Huffman coding and section 3 Synchronization, Section 4.1 Parallel Algorithm Design, Weibenberger et al. discloses executing the decoders in parallel. The decoders are decoding assigned subsequences and continuously do so until synch points are found.).
Consider claim 4, Weibenberger et al. discloses the computer system of claim 1, further comprising software instructions that cause the computer system to: execute the plurality of decoder instances in an interleaved manner by advancing each decoder instance incrementally; and evaluate agreement among the plurality of decoder instances after each incremental advancement or after a fixed number of decoding steps (abstract, section 2.1 Huffman coding and section 3 Synchronization, Section 4.1 Parallel Algorithm Design, Weibenberger et al. discloses executing the decoders in parallel. The decoders are decoding assigned subsequences.).
Consider claim 9, Weibenberger et al. discloses the computer system of claim 1, further comprising software instructions that cause the computer system to: require decoder agreement to persist over a minimum number of decoded symbols or bits before declaring convergence; and adjust a length of an agreement window to achieve a desired confidence level that convergence has occurred (abstract, section 2.1 Huffman coding and section 3 Synchronization, Section 4.1 Parallel Algorithm Design, Weibenberger et al. discloses executing the decoders in parallel. The decoders are decoding assigned subsequences and continuously do so until synch points are found).
Consider claim 10, Weibenberger et al. discloses the computer system of claim 1, further comprising software instructions that cause the computer system to perform random access search by: identifying a candidate match location within the variable-length encoded bitstream using a search operation; initiating decoding at or near the candidate match location by selecting an arbitrary bit offset corresponding to the candidate match location; converging to a valid codeword boundary using the plurality of decoder instances and agreement-based boundary detection; and verifying the candidate match location by decoding a limited window of data surrounding the identified valid codeword boundary (abstract, section 2.1 Huffman coding and section 3 Synchronization, Weibenberger et al. discloses Huffman coding when is codebook based, prefix free and variable length. Multiple decoders are used to decode the Huffman coding and each decoder starts a staggered location in the bitstream. The output of each decoder is monitored for when each decoder starts producing the same output (synch point) to identity a valid codeword boundary. At least one decoder can start from the beginning.).
Claims 11, 13, 14, 19 and 20 is the method claim to system claims 1, 3, 4, 9 and 10 above and is rejected using the same rationale.
Allowable Subject Matter
Claims 2, 5-8, 12 and 15-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL ALSIP whose telephone number is (571)270-1182. The examiner can normally be reached M-F 9-5.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Reginald G. Bragdon can be reached at (571)272-4204. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/MICHAEL ALSIP/Primary Examiner, Art Unit 2139
Prosecution Insights