DETAILED ACTION
This is a first office action in response to application 19/568,176 filed 03/16/2026, in which claims 1-15 are presented for examination. Currently claims 1-15 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
Figure 1A-C should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
The drawings are objected to under 37 CFR 1.83(a) because they fail to show find numbers for the transistors (e.g. 1-1, 2-5, etc.) of each pixel circuit as described in the specification. Any structural detail that is essential for a proper understanding of the disclosed invention should be shown in the drawing. MPEP § 608.02(d). Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2, 6-8, and 11-13 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. U.S. Patent Application Publication No. 2021/0210002 A1 hereinafter Kim.
Consider Claim 1:
Kim discloses an electronic apparatus comprising: (Kim, See Abstract.)
a driving unit configured to output a plurality of signals; (Kim, [0080-0097[, [0081], “The driver 200 drives the display panel 100. The driver 200 may provide various control signals, data signals, driving voltages, or the like, to the display panel 100 to drive the display panel 100.”)
an inorganic light-emitting element; and pixel circuitry configured to control the inorganic light-emitting element based on the plurality of signals from the driving unit, the pixel circuitry comprising: (Kim, [0097-0111], [0097], “Referring to FIG. 5, the display module 300 includes the display panel 100 including the sub-pixel circuit 110 and the inorganic light emitting element 120, and the driver 200.”)
first circuitry including a switching transistor, the first circuitry providing a first current based on a first control voltage among the plurality of signals to the inorganic light-emitting element through the switching transistor; and (Kim, [0110], “According to an embodiment, the driver 200 may apply the same constant current generator voltage to all the constant current generator circuits 112 of the display panel 100. Therefore, since a driving current of the same magnitude (i.e., constant current) is provided to each inorganic light emitting element 120 through each constant current generator circuit 112, the wavelength change problem of the LED according to the magnitude change of the driving current may be solved.”)
second circuitry including a charging element connected to a gate of the switching transistor, the second circuitry charging the charging element with a second current based on a second control voltage among the plurality of signals, and cutting off a supply of the first current to the inorganic light-emitting element at a timing the switching transistor is blocked based on a voltage of the charging element reaching a predetermined voltage level such that the timing corresponds to the charging element being charged and no first current is supplied to the inorganic light-emitting element. (Kim, [0147], “The PWM circuit 111 includes a reset unit 13. The reset unit 13 is configured to forcibly turn on the first switching transistor T10. As described above, the first switching transistor T10 needs to be turned on so that the constant current flows over the inorganic light emitting element 120 to make the inorganic light emitting element 120 emit light. Accordingly, the first switching transistor T10 may be turned on at the start point of each light emitting period through the operation of the reset unit 13.”)
Consider Claim 2:
Kim discloses the electronic apparatus of claim 2, wherein the first circuitry further includes a first driving transistor, (Kim, Fig. 6D item T8) and the first circuitry supplies, based on a reset signal among the plurality of signals, a first initial voltage among the plurality of signals to a gate of the first driving transistor, and supplies, based on a data setting signal among the plurality of signals, the first control voltage to the gate of the first driving transistor, and (Kim, [0199], “The process of outputting the scan signal SP(n) is described with reference to FIGS. 8A and 8C. First, when the scan signal SP (n-1) is input to the scan driver 81, the Q(n) node voltage becomes low. Then, as the CLK signal become low, the Q(n) node voltage is bootstrapped, and accordingly, the transistor T7 may be fully turned on to output an output signal, i.e., SP(n). The other operation may be readily understood by those of ordinary skill in the art in relation to a signal applied to the configuration of the circuit, and thus a more detailed description will be omitted.”)
the second circuitry further includes a second driving transistor, (Kim, Fig. 6D item T8) and the second circuitry supplies, based on the reset signal, the first initial voltage to a gate of the second driving transistor, and supplies, based on the data setting signal, the second control voltage to the gate of the second driving transistor. (Kim, [0199], “The process of outputting the scan signal SP(n) is described with reference to FIGS. 8A and 8C. First, when the scan signal SP (n-1) is input to the scan driver 81, the Q(n) node voltage becomes low. Then, as the CLK signal become low, the Q(n) node voltage is bootstrapped, and accordingly, the transistor T7 may be fully turned on to output an output signal, i.e., SP(n). The other operation may be readily understood by those of ordinary skill in the art in relation to a signal applied to the configuration of the circuit, and thus a more detailed description will be omitted.”)
Consider Claim 6:
Kim discloses the electronic apparatus of claim 2, wherein the second circuitry supplies a second initial voltage to the charging element based on the reset signal, wherein the second initial voltage is at a voltage level that allows the switching transistor to be turned on. (Kim, [0147], [0155], “Referring to FIG. 6D, the VDD_PAM represents the first driving voltage (e.g., +10 [V]), VDD_PWM represents the second driving voltage (e.g., +10 [V]), VSS represents the ground voltage (e.g., 0 [V]), and Vset represents a low voltage (e.g., −3 [V]) for turning on the first switching transistor T10. The VDD_PAM, VDD_PWM, VSS, Vset and test voltages may be applied from the driving voltage providing circuit described above.”)
Consider Claim 7:
Kim discloses the electronic apparatus of claim 2, wherein an end of the inorganic light-emitting element is grounded while an other end is connected to the switching transistor, and the first initial voltage is supplied to the other end based on the reset signal. (Kim, Fig. 6D item 120 and VSS.)
Consider Claim 8:
Kim discloses the electronic apparatus of claim 2, wherein the first circuitry further includes a first capacitor connected to the gate of the first driving transistor, and a gate voltage of the first driving transistor is maintained through the first capacitor, and the second circuitry further includes a second capacitor connected to the gate of the second driving transistor, and a gate voltage of the second driving transistor is maintained through the second capacitor. (Kim, Fig. 6D item C1, C2, T3, T8.)
Consider Claim 11:
Kim discloses the electronic apparatus of claim 1, wherein each of the plurality of signals is a square signal or a DC signal. (Kim, [0170], “Since the same voltage is applied to the same kind of sub-pixel regardless of the column line or the row line, the DC voltage may be used as a constant current generator voltage. For example, three kinds of DC voltages (e.g., +5.1 [V], +4.8 [V], +5.0 [V]) corresponding to each of the R, G, and B sub-pixels may be individually applied to each of the R, G, and B sub-pixel circuits of the display panel 100 from the driving voltage providing circuit. In this example, the MUX circuit is not required.”)
Consider Claim 12:
Kim discloses a method for controlling an electronic apparatus, the method comprising: (Kim, See Abstract.)
providing a first current based on a first control voltage among a plurality of signals output from a driving unit of the electronic apparatus to an inorganic light-emitting element of the electronic apparatus through a switching transistor, charging a charging element connected to a gate of the switching transistor with a second current based on a second control voltage among the plurality of signals; and (Kim, [0110], “According to an embodiment, the driver 200 may apply the same constant current generator voltage to all the constant current generator circuits 112 of the display panel 100. Therefore, since a driving current of the same magnitude (i.e., constant current) is provided to each inorganic light emitting element 120 through each constant current generator circuit 112, the wavelength change problem of the LED according to the magnitude change of the driving current may be solved.”)
cutting off a supply of the first current to the inorganic light-emitting element at a timing the switching transistor is blocked based on a voltage of the charging element reaching a predetermined voltage level such that the timing corresponds to the charging element being charged and no first current is supplied to the inorganic light-emitting element. (Kim, [0147], “The PWM circuit 111 includes a reset unit 13. The reset unit 13 is configured to forcibly turn on the first switching transistor T10. As described above, the first switching transistor T10 needs to be turned on so that the constant current flows over the inorganic light emitting element 120 to make the inorganic light emitting element 120 emit light. Accordingly, the first switching transistor T10 may be turned on at the start point of each light emitting period through the operation of the reset unit 13.”)
Consider Claim 13:
Kim discloses the method of claim 12 further comprising: supplying, based on a reset signal among the plurality of signals, a first initial voltage among the plurality of signals to a gate of a first driving transistor included in first circuitry and a gate of a second driving transistor included in second circuitry; and (Kim, [0199], “The process of outputting the scan signal SP(n) is described with reference to FIGS. 8A and 8C. First, when the scan signal SP (n-1) is input to the scan driver 81, the Q(n) node voltage becomes low. Then, as the CLK signal become low, the Q(n) node voltage is bootstrapped, and accordingly, the transistor T7 may be fully turned on to output an output signal, i.e., SP(n). The other operation may be readily understood by those of ordinary skill in the art in relation to a signal applied to the configuration of the circuit, and thus a more detailed description will be omitted.”)
supplying, based on a data setting signal among the plurality of signals, the first control voltage to the gate of the first driving transistor and the second control voltage to the gate of the second driving transistor. (Kim, [0199], “The process of outputting the scan signal SP(n) is described with reference to FIGS. 8A and 8C. First, when the scan signal SP (n-1) is input to the scan driver 81, the Q(n) node voltage becomes low. Then, as the CLK signal become low, the Q(n) node voltage is bootstrapped, and accordingly, the transistor T7 may be fully turned on to output an output signal, i.e., SP(n). The other operation may be readily understood by those of ordinary skill in the art in relation to a signal applied to the configuration of the circuit, and thus a more detailed description will be omitted.”)
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. U.S. Patent Application Publication No. 2021/0210002 A1 as applied to claim 8 above, and further in view of Lai et al. U.S. Patent Application Publication No. 2022/0223084 A1 hereinafter Lai.
Consider Claim 9:
Kim discloses the electronic apparatus of claim 8, and teaches firs, second, and wherein the charging element includes a third capacitor, (Kim, Fig. 6D item C3 and C1 and C2.) however does not specify that a capacitance of the third capacitor is greater than both a capacitance of the first capacitor and a capacitance of the second capacitor.
Lai however teaches that it was a known technique to provide capacitors of different size within the pixel circuit. Therefore, Lai teaches the third capacitor is greater than both a capacitance of the first capacitor and a capacitance of the second capacitor. (Lai, [0054-0059], [0055], “Thus, in some embodiments of the present disclosure, the capacitance of the second capacitor C2 may be greater than the capacitance of the third capacitor C3; and/or, the capacitance of the first capacitor C1 may be greater than the capacitance of the fourth capacitor C4.”)
It therefore would have been obvious to those having ordinary skill in the art before the effective filing date of the invention to provide capacitors of different sizes as this was a known technique in view of Lai and would have been utilized for the art recognized purpose of to provide stability to the nodes thereby it may not be prone to have the problem of an unstable output and may not easily fluctuate. (Lai, [0081], [0054])
Claim Rejections - 35 USC § 103
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. U.S. Patent Application Publication No. 2021/0210002 A1 as applied to claim 2 above, and further in view of Liu et al. U.S. Patent Application Publication No. 2022/0238065 A1 hereinafter Liu.
Consider Claim 10:
Kim discloses the electronic apparatus of claim 2, however does not specify wherein a W/L ratio of the first driving transistor is greater than a W/L ratio of the second driving transistor.
Liu however teaches that it was a known technique to provide a W/L ratio of the first driving transistor is greater than a W/L ratio of the second driving transistor. (Liu, [0107], “Further, a width-to-length ratio W/L of a channel of the first driving transistor T3 is smaller than a width-to-length ratio W/L of a channel of the second driving transistor T8. For example, the width-to-length ratio W/L of the channel of the first driving transistor T3 is less than 1, and specifically 0.5, 0.6, 0.7, 0.8, 0.9, etc. The width-to-length ratio W/L of the channel of the second driving transistor T8 is greater than 1, and specifically 1.2, 1.3, 1.5, 1.6, 1.7, 1.8, etc.”)
It therefore would have been obvious to those having ordinary skill in the art before the effective filing date of the invention to provide different W/L ratios as this was a known technique in view of Liu and would have been utilized for the art recognized purpose of the greater the width-to-length ratio W/L of the channel, the greater the saturation current of the transistor, the better the performance and the smaller the subthreshold swing of the transistor. The smaller the width-to-length ratio W/L of the channel, and the higher the subthreshold swing of the transistor. (Liu, [0108])
Allowable Subject Matter
Claim 3-5 and 14-15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Prior art made of record and not relied upon which is still considered pertinent to applicant's disclosure is cited in a current or previous PTO-892. The prior art cited in a current or previous PTO-892 reads upon the applicants claims in part, in whole and/or gives a general reference to the knowledge and skill of persons having ordinary skill in the art before the effective filing date of the invention. Applicant, when responding to this Office action, should consider not only the cited references applied in the rejection but also any additional references made of record.
In the response to this office action, the Examiner respectfully requests support be shown for any new or amended claims. More precisely, indicate support for any newly added language or amendments by specifying page, line numbers, and/or figure(s). This will assist The Office in compact prosecution of this application. The Office has cited particular columns, paragraphs, and/or line numbers in the applied rejection of the claims above for the convenience of the applicant. Citations are representative of the teachings in the art and are applied to the specific limitations within each claim, however other passages and figures may apply. Applicant, in preparing a response, should fully consider the cited reference(s) in its entirety and not only the cited portions as other sections of the reference may expand on the teachings of the cited portion(s).
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Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL J JANSEN II whose telephone number is (571)272-5604. The examiner can normally be reached Normally Available Monday-Friday 9am-4pm EST.
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/Michael J Jansen II/ Primary Examiner, Art Unit 2626
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