DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Obvious-type Double Patenting (ODP) Rejections
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement.
Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b).
This is a provisional obviousness-type double patenting rejection because the conflicting claims have not in fact been patented. (Do not use against patented applications).
Claims 1, 11, 15, and 20 are rejected under the judicially created doctrine of obviousness-type double patenting as being unpatentable over claim 1 of copending Application No. 19/578,546 hereinafter ‘546. Although the conflicting claims are not identical, they are not patentably distinct from each other. For example, Claims 1, 11, 15, and 20 of instant Application, respectively contain elements of claim 1 of the ‘017 as follows:
Claims
‘546
Claim
Instant
1, 11, 15, 20, 24
CXL messages
PCIe TLPs
receiving by
a computer
a first entity
a CXL.mem M2S request
translating to
a PCIe memory request
sending to
a second entity
receiving
a PCIe Completion
translating to
a CXL.mem S2M response
sending to
the first entity the response
1, 19,
23
CXL messages
PCIe TLPs
receiving by
a computer
a first entity
a PCIe memory request*
translating to
a CXL.mem M2S request*
sending to
a second entity
receiving
a CXL.mem M2S request*
translating to
a PCIE Completion*
sending to
the first entity the completion*
Claims 1, 11, 15, 20, and 24 of ‘546 does not expressly disclose arrangement of CXL.mem M2S request, PCIe memory request, PCIe Completion, and CXL.mem S2M response as it is in Instant Application (IA). However, they are merely describing bidirectional nature of communication/translation between the first entity and the second. At the time of the invention it would have been obvious to a person of ordinary skill in the art to incorporate common sense of communicating between two entities that speaks/communicate different language/protocol. The suggestion/motivation for doing so would have been to open communication channels.
Claim Rejections - 35 USC § 112 2nd
The following is a quotation of the second paragraph of 35 U.S.C. 112:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 6-8, 12-15 and 26 are rejected under 35 U.S.C. 112, second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which applicant regards as the invention.
Use of the abbreviated word ‘MemRd*’ in claim 6 fails to particularly point out and distinctly claim the subject matter. At least, it should be spelled out and explained first time it appears in the claims.
Use of the abbreviated word ‘MemWr*’ in claims 7 and 10 fails to particularly point out and distinctly claim the subject matter. At least, it should be spelled out and explained first time it appears in the claims.
Use of the abbreviated word ‘UIO’ in claim 8 fails to particularly point out and distinctly claim the subject matter. At least, it should be spelled out and explained first time it appears in the claims.
Use of the abbreviated word ‘MemSpecRd’ in claims 12-15 and 26 fails to particularly point out and distinctly claim the subject matter. At least, it should be spelled out and explained first time it appears in the claims.
Applicant is required to review the claim and correct all language which does not comply with 35 U.S.C. § 112, second paragraph.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 8, 19-20, and 22-23 are rejected under 35 U.S.C. 103 as being unpatentable over Das Sharama (U.S. Publication 2021/0240655), hereinafter Das in view of Paliwal et al. (U.S. Publication 2021/0112132), hereinafter Paliwal.
Referring to claim 1, Das teaches, as claimed, a method for translating between Peripheral Component Interconnect Express (PCIe) Transaction Layer Packets (TLPs) and Compute Express Link (CXL) messages, comprising:
receiving a PCIe memory (PCIe Memory Write, see Paragraph 76 and Fig. 5, PCIe Logic 530 and Memory Protocol 545B) request by a computer (see Fig. 5, Host Processor 505) from a first entity (see Fig. 5, I/O Device 518);
translating (a translator such as a binary translator, translates code either statistically or dynamically, see Paragraph 127), by the computer, the PCIe memory request
sending, by the computer to a second entity (Fig. 5, Accelerator 510), the CXL.mem M2S request;
receiving, by the computer from the second entity, a CXL.mem Subordinate-to-Master (CXL.mem Subordinate; see Paragraph 61) Data Response (S2M DRS) (responding to; see Paragraph 61) corresponding to the CXL.mem M2S request;
translating (a translator such as a binary translator, translates code either statistically or dynamically, see Paragraph 127), by the computer, the CXL.mem S2M DRS
sending the PCIe Completion by the computer to the first entity (Completion transaction, see Paragraph 67).
Das does not disclose expressly communicating the CXL to PCIe and communicating PCIe to CXL.
Paliwal does disclose communicating the CXL (see Fig. 6, 618 CXL.io Transaction Layer and 628 CXL.io Link Layer) to PCIe (see Fig. 6, 616 PCIe Transaction Layer and 626 PCIe Data Link Layer) and communicating PCIe (see Fig. 6, 616 PCIe Transaction Layer and 626 PCIe Data Link Layer) to CXL (see Fig. 6, 618 CXL.io Transaction Layer and 628 CXL.io Link Layer).
At the time of the invention it would have been obvious to a person of ordinary skill in the art to incorporate multi-protocol link of Paliwal into flexible device interconnects of Das.
The suggestion/motivation for doing so would have been to provide alternative way to conserve energy and efficiency (see Paliwal, Paragraphs 3 and 19).
As to claim 2, the modification teaches the method of claim 1, wherein the PCIe memory request comprises a first physical address (physical address translations, see Das, Paragraph 120) belonging to a first physical address space (physical memory, see Das, Paragraph 120) utilized by the first entity, and wherein translating the PCIe memory request to the CXL.mem M2S request comprising a second physical address (physical address translations, see Das, Paragraph 120; Note, same concept of physical address in the first applies to the second) belonging to a second physical address space (physical memory, see Das, Paragraph 120) utilized by the second entity.
As to claim 8, the modification teaches the method of claim 1, wherein the computer is included in a switch (switches, see Das, Paragraph 19), wherein the PCIe memory request is selected from: or a Memory Write request (MWr) (see Paragraph 76, PCIe Memory Write).
As to claim 20, the modification teaches one or more integrated circuits configured to perform the method of claim 1, wherein the one or more integrated circuits comprise at least one of: (i) a general-purpose processing unit (cores), comprising or connected to communication interfaces (CXL/PCIe), configured to perform the method via software and/or firmware execution (see Fig. 5),
As to claim 22, the modification teaches configured to operate as a switch (switches, see Das, Paragraph 19), wherein the apparatus comprises switching circuitry and is configured to perform the method of claim 1.
As to claims 19 and 23, they are directed to a program/device to implement the method as set forth in claim 1. Therefore, they are rejected on the same basis as set forth hereinabove.
Claims 21 and 27 are rejected under 35 U.S.C. 103 as being unpatentable over Das in view of Paliwal further in view of Jason, “Exploring the History of Active Optical Cables” hereinafter Jason.
As to claims 21 and 27, the modification teaches method of claim 1.
The Das/Paliwal modification does not expressly disclose the active cable comprising first and second pluggable modules coupled by a physical medium; wherein the active cable further comprises hardware circuitry, integrated into the active cable.
Jason does disclose the active cable (Fiber Optic cable, see Figure in Page 1) comprising first and second pluggable modules (Optical transceiver module circuit at both end of the cable, see Figure in Page 1) coupled by a physical medium (Optical signals, see Figure in Page 1); wherein the active cable further comprises hardware circuitry (Electronic connectors, see Figure in Page 1), integrated into the active cable.
At the time of the invention it would have been obvious to a person of ordinary skill in the art to incorporate Jason’s Active Optical Cable in Das/Paliwal modification.
The suggestion/motivation for doing so would have been to provide better support higher bandwidth communication (see Jason, 1st Paragraph in Page 1).
Allowable Subject Matter
Claims 3-5, 9-11, and 25 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims; and if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph (and ODP), set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Claims 28-30 are allowed.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Hyun Nam whose telephone number is (571) 270-1725 and fax number is (571) 270-2725. The examiner can normally be reached on Monday through Friday 8:30 AM to 5:00 PM EST. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dr. Henry Tsai can be reached on (571) 272-4176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/HYUN NAM/Primary Examiner, Art Unit 2183
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