Prosecution Insights
Last updated: October 25, 2026

Adeia Semiconductor Inc.

Technology area: Semiconductors, Circuits & Optics

3 pending office actions • 3 art units • 3 examiners • 0 of 3 (0%) have an AI response strategy ready • 4 patents granted in the last 365 days

Analysis

Adeia Semiconductor Inc. maintains a focused presence in the Semiconductors, Circuits & Optics technology area. The portfolio currently shows 3 pending office actions, which are handled by 3 distinct examiners. This distribution between actions and examiners indicates that no single examiner is managing multiple pending matters for the company. The count of 3 pending office actions reflects a very specific set of active cases.

The prosecution is distributed across 3 distinct art units, matching the count of distinct examiners. LEUNG, CHRISTINA Y is the busiest examiner for this portfolio, with 1 pending office action under her review. This figure of 1 action represents the workload for the most active examiner within this set of 3 distinct examiners. With 3 distinct art units involved, the company must navigate different technical groups despite the small number of actions.

Practitioners must prepare for distinct examination styles in each of the 3 art units involved. The scale of 3 distinct examiners suggests a narrow set of active patent applications for Adeia Semiconductor Inc. and LEUNG, CHRISTINA Y. The data shows that the busiest examiner handles 1 pending office action, which is the same volume assigned to every other examiner in this portfolio.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Portfolio Summary

3
Total Pending OAs
2
Non-Final OAs
1
Final Rejections
0
Advisory / Quayle

Response Deadline Pressure

Based on the USPTO statutory response window for each pending office action. 1 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.

1
Overdue
0
Due this week
0
Due this month
0
Due in next 60 days
0
Due later

Case Difficulty Mix

Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.

2
Hard (67%)
0
Medium (0%)
1
Easy (33%)
0
Unknown (0%)

Rejection Statute Mix

BucketCases
Double-patenting only1 (33%)
Multi-statute (no §101)2 (67%)

Industry Mix

How the docket's pending cases split across USPTO tech-center bands.

0
Life Sciences
0% of docket
0
Information Tech
0% of docket
0
Communications
0% of docket
1
Semiconductors
33% of docket
0
Mechanical / Eng
0% of docket
2
Business / Other
67% of docket

Time-on-OA Estimate

Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.

30 h
Manual time on pending OAs
6 h
Time saved (low, 20%)
10 h
Time saved (mid, 35%)
0.3 wks
FTE-weeks freed (mid)

Top Examiners on this docket

ExaminerApps on this docketAllow rateInterview lift
LEUNG, CHRISTINA Y 1 77.7% +1.5%
ASSOUMAN, HERVE-LOUIS Y 1 91.4% +4.1%
RALIS, STEPHEN J 1 34.5% +40.4%

Quick Wins (1)

Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 1 ordered by deadline are shown.

App #TitleExaminerDue in
18783034 HARD IP BLOCKS WITH PHYSICALLY BIDIRECTIONAL PASSAGEWAYS ASSOUMAN, HERVE-LOUIS Y —

Hard Cases (2)

Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 2 ordered by deadline are shown.

App #TitleExaminerDue in
18375197 ABSTRACTED NAND LOGIC IN STACKS RALIS, STEPHEN J 202d overdue
19313197 HIGH DENSITY INTERCONNECT FOR SEGMENTED LEDS LEUNG, CHRISTINA Y —

Interview Candidates (1)

Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 1 ordered by deadline are shown.

App #TitleExaminerDue in
18375197 ABSTRACTED NAND LOGIC IN STACKS RALIS, STEPHEN J 202d overdue

Top Art Units

Art UnitApps
3991 1
2812 1
3992 1

Pending Office Actions

App #TitleExaminerArt UnitStatutesStatusDue inAIFiled
19313197 HIGH DENSITY INTERCONNECT FOR SEGMENTED LEDS LEUNG, CHRISTINA Y 3991 §102§112Other Non-Final OA — Pending Aug 28, 2025
18783034 HARD IP BLOCKS WITH PHYSICALLY BIDIRECTIONAL PASSAGEWAYS ASSOUMAN, HERVE-LOUIS Y 2812 DP Non-Final OA — Pending Jul 24, 2024
18375197 ABSTRACTED NAND LOGIC IN STACKS RALIS, STEPHEN J 3992 §103§112 Final Rejection 202d overdue Pending Sep 29, 2023

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Frequently Asked Questions

How many pending USPTO office actions does Adeia Semiconductor Inc. have?

Adeia Semiconductor Inc. has 3 pending office actions as of October 2026, spread across 3 art units and 3 examiners.

Which USPTO examiner handles the most Adeia Semiconductor Inc. applications?

Christina Y Leung has the most, with 1 of Adeia Semiconductor Inc.'s pending office actions.

What technology area are Adeia Semiconductor Inc.'s patent applications in?

Mostly Semiconductors, Circuits & Optics (USPTO Tech Center 2800), based on where its pending office actions are examined.

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