Prosecution Insights
Last updated: May 29, 2026

STMicroelectronics

5 pending office actions • 5 art units • 5 examiners • 0 of 5 (0%) have an AI response strategy ready • 37 patents granted in the last 365 days

Portfolio Summary

5
Total Pending OAs
2
Non-Final OAs
2
Final Rejections
1
Advisory / Quayle

Response Deadline Pressure

Based on the USPTO statutory response window for each pending office action. 5 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.

3
Overdue
1
Due this week
1
Due this month
0
Due in next 60 days
0
Due later

Deadline Fire Line

Every pending office action with a known statutory deadline, placed on a days-until-due axis. Dots left of Today are overdue; the further right, the more runway. Cases that share a deadline window stack vertically. 5 of the docket's apps have a known mailing date.

-30dToday30d60d90d120d
Overdue (3)Due ≤ 7 days (1)Due ≤ 30 days (1)

Case Difficulty Mix

Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.

0
Hard (0%)
4
Medium (80%)
1
Easy (20%)
0
Unknown (0%)

Rejection Statute Mix

BucketCases
§103 only4 (80%)
§112 only1 (20%)

Industry Mix

How the docket's pending cases split across USPTO tech-center bands.

0
Life Sciences
0% of docket
0
Information Tech
0% of docket
0
Communications
0% of docket
4
Semiconductors
80% of docket
1
Mechanical / Eng
20% of docket
0
Business / Other
0% of docket

Time-on-OA Estimate

Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.

50 h
Manual time on pending OAs
10 h
Time saved (low, 20%)
18 h
Time saved (mid, 35%)
0.4 wks
FTE-weeks freed (mid)

Top Examiners on this docket

ExaminerApps on this docketAllow rateInterview lift
NICELY, JOSEPH C 1 77.3% +20.1%
LIU, XIAOMING 1 86.0% +11.0%
CASTILHO, EDUARDO D 1 47.4% +20.7%
GOODWIN, DAVID J 1 67.4% +16.3%
MONTALVO, EVA Y 1 77.0% +13.7%

Quick Wins (1)

Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 1 ordered by deadline are shown.

App #TitleExaminerDue in
18180025 INTEGRATED CIRCUIT COMPRISING A HIGH VOLTAGE TRANSISTOR AND CORRESPONDING MANUFACTURING METHOD LIU, XIAOMING 19d overdue

Interview Candidates (5)

Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 5 ordered by deadline are shown.

App #TitleExaminerDue in
17734963 INTEGRATED CIRCUIT COMPRISING A NON-VOLATILE MEMORY OF THE EEPROM TYPE AND CORRESPONDING MANUFACTURING METHOD MONTALVO, EVA Y 45d overdue
18180025 INTEGRATED CIRCUIT COMPRISING A HIGH VOLTAGE TRANSISTOR AND CORRESPONDING MANUFACTURING METHOD LIU, XIAOMING 19d overdue
18197909 TRANSISTOR NICELY, JOSEPH C 9d overdue
17992392 NFC TRANSACTION CASTILHO, EDUARDO D 6d
17839976 ELECTRONIC CHIP GOODWIN, DAVID J 15d

Top Art Units

Art UnitApps
2813 1
2812 1
3698 1
2817 1
2818 1

Pending Office Actions

App #TitleExaminerArt UnitStatutesStatusDue inAIFiled
18197909 TRANSISTOR NICELY, JOSEPH C 2813 §103 Non-Final OA 9d overdue Pending May 16, 2023
18180025 INTEGRATED CIRCUIT COMPRISING A HIGH VOLTAGE TRANSISTOR AND CORRESPONDING MANUFACTURING METHOD LIU, XIAOMING 2812 §103 Non-Final OA 19d overdue Pending Mar 07, 2023
17992392 NFC TRANSACTION CASTILHO, EDUARDO D 3698 §103 Final Rejection 6d Pending Nov 22, 2022
17839976 ELECTRONIC CHIP GOODWIN, DAVID J 2817 §112 Final Rejection 15d Pending Jun 14, 2022
17734963 INTEGRATED CIRCUIT COMPRISING A NON-VOLATILE MEMORY OF THE EEPROM TYPE AND CORRESPONDING MANUFACTURING METHOD MONTALVO, EVA Y 2818 §103 Non-Final OA 45d overdue Pending May 02, 2022

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