DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 45-48 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Re claim 45, the phrase “wherein each first region comprises a first thickness and each second region comprises a second thickness; and wherein a total of the second thicknesses is less than or equal to about 10% of a total of the first thicknesses” was not described in the original specification. Note: the instant claim excludes the thickness of the third and/or fourth region.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 59, 63 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Re claim 59, line 2, the phrase “wherein one of the source/drain regions further comprising a source/drain region over the channel region and is electrically coupled to a capacitor” is unclear and indefinite (i.e., which one? Since the phase “the source/drain regions” lacks antecedent basis).
Re claim 64, the scope of the instant claim is unclear and indefinite since it depends from a cancelled claim 63.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 79-93, 78, 38-41, 49 and 71-76 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Cheng et al., US Pub. No. 2015/0228652 A1.
Re claim 79. Cheng et al. disclose a semiconductor structure comprising: a laminate 12 comprising a first region 20/16 alternating with a second region 18/14 (e.g., fig. 1); the first region comprising a first semiconductor material (e.g., silicon, paragraph 37) and the second region comprising a second semiconductor material (i.e., Ge, SiGe, paragraph 35) that is different from the first semiconductor material; the laminate 12 is against a gate dielectric 30 (e.g., fig. 4, note: same material as instant claim 90, silicon oxide, see paragraph 54); and at least one of the first region and the second region comprising a polycrystalline (paragraph 39).
Re claim 80. The semiconductor structure of claim 79 wherein a number of the first region and the second region comprises a total of at least three regions of any combination of the first region and the second region (paragraph 33), see figs. 1-9c and pages 1-10 for more details.
Re claim 81. The semiconductor structure of claim 79 wherein a number of the first region and the second region comprises a total of at least four regions of any combination of the first region and the second region (i.e., three or more, paragraph 33).
Re claim 82. The semiconductor structure of claim 79 wherein the second semiconductor material comprises germanium (paragraph 35).
Re claim 83. The semiconductor structure of claim 79 wherein the second semiconductor material comprises pure germanium (paragraph 35).
Re claim 84. The semiconductor structure of claim 79 wherein the second semiconductor material comprises a mixture of germanium with another material (i.e., SiGe, paragraph 35).
Re claim 85. The semiconductor structure of claim 79 wherein the second semiconductor material comprises a mixture of germanium with silicon (paragraph 35).
Re claim 86. The semiconductor structure of claim 79 wherein the second semiconductor material comprises a mixture of silicon with germanium wherein the germanium concentration is within a range from about 5 atomic percent to about 95 atomic percent (ie., greater than 20%, paragraph 35).
Re claim 87. The semiconductor structure of claim 79 wherein the second semiconductor material inherently shows that it comprises a lower activation energy for epitaxial growth than the first semiconductor material because this is the intrinsic properties of the material.
Re claim 88. The semiconductor structure of claim 79 wherein the at least one of the first region and the second region comprises partially a crystalline (e.g., paragraph 39).
Re claim 89. The semiconductor structure of claim 79 wherein the at least one of the first region and the second region comprises substantially entirely a crystalline (e.g., paragraph 39).
Re claim 90. The semiconductor structure of claim 79 wherein the gate dielectric comprises silicon oxide (e.g., paragraph 54).
Re claim 91. The semiconductor structure of claim 79 comprising a transistor (e.g., n-type FET or p-type FET, see figs. 4, paragraph 48 etc).
Re claim 92. The semiconductor structure of claim 79 wherein the laminate comprises at least two second regions (e.g., fig. 1)
Re claim 93. The semiconductor structure of claim 79 wherein the laminate comprises at least three first regions (e.g., paragraph 33).
Re claim 78. Cheng et al. disclose a semiconductor structure comprising: a laminate 12 (e.g., fig. 1, paragraph 33) comprising: a first region 16/20 (e.g., silicon, paragraph 37); a second region 18/14 (e.g., Ge, SiGe, paragraph 35) on top of the first region; a third region 20/16 on top of the second region and the third region comprising a material that is a same material (e.g., silicon, paragraph 37) as the first region; a fourth region 14 on top of the third region and the fourth region comprising a material that is a same material (e.g., Ge, SiGe, paragraph 35) as the second region; and the laminate 12 comprising any number of these the first, the second, the third and the fourth regions (e.g., fig. 1, paragraph 33); at least one of the first region and the second regions region comprising a polycrystalline (e.g., paragraph 39); a channel region comprised by the laminate 12 (e.g., fig. 4 &1 ); and the laminate is against a gate dielectric 30 (e.g., fig. 4 note: same material as instant claim 90, silicon oxide, see paragraph 54). see figs. 1-9c and pages 1-10 for more details.
Re claim 38. The semiconductor structure of claim 78 wherein the second semiconductor material region comprises a mixture of a germanium with a silicon (e.g, SiGe, paragraph 35).
Re claim 39. The semiconductor structure of claim 38 wherein a germanium concentration within said mixture is at least about 5 atomic percent (paragraph 35).
Re claim 40. The semiconductor structure of claim 38 wherein a germanium concentration within said mixture is at least about 50 atomic percent (greater than 30% paragraph 38, i.e., 50%).
Re claim 41. The semiconductor structure of claim 38 wherein a germanium concentration within said mixture is within a range of from about 5 atomic percent to about 95 atomic percent (paragraph 35).
Re claim 49. The semiconductor structure of claim 78 comprising at least a portion of an active region of a transistor 22/26 (fig. 4, paragraph 48 et.).
Re claim 71. The semiconductor structure of claim 78 further comprising a base or substrate 10 (fig. 1) supporting the laminate.
Re claim 72. The semiconductor structure of claim 71 wherein the base or substrate consists essentially of silicon (paragraph 23).
Re claim 73. The semiconductor structure of claim 78 further comprising a template 14/18 (e.g., one of the layer from stack 12).
Re claim 74. The semiconductor structure of claim 73 wherein the template comprises silicon and germanium 14/18 (e.g., one of the layer from stack 12).
Re claim 75. The semiconductor structure of claim 73 wherein the template comprises a polycrystalline surface (paragraph 39).
Re claim 76. The semiconductor structure of claim 73 wherein the first semiconductor material region consists essentially of a silicon (paragraph 37).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 45-48 and 57 are rejected under 35 U.S.C. 103 as being unpatentable over Cheng et al., US Pub. No. 2015/0228652 A1.
Cheng et al. disclosed above; however, Cheng et al does not explicitly show the instant claim thickness of claims 45-48.
The thickness range of claims 45-48 are considered to involve routine optimization while has been held to be within the level of ordinary skill in the art. As noted in In re Aller, the selection of reaction parameters such as thickness, temperature and concentration etc. would have been obvious:
“Normally, it is to be expected that a change in temperature, or in concentration, or in both, would be an unpatentable modification. Under some circumstances, however, changes such as these may impart patentability to a process if the particular ranges claimed produce a new and unexpected result which is different in kind and not merely degree from the results of the prior art...such ranges are termed Acritical ranges and the applicant has the burden of proving such criticality.... More particularly, where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.”
In re Aller 105 USPQ233, 255 (CCPA 1955). See also In re Waite 77 USPQ 586 (CCPA 1948); In re Scherl 70 USPQ 204 (CCPA 1946); In re Irmscher 66 USPQ 314 (CCPA 1945); In re Norman 66 USPQ 308 (CCPA 1945); In re Swenson 56 USPQ 372 (CCPA 1942); In re Sola 25 USPQ 433 (CCPA 1935); In re Dreyfus 24 USPQ 52 (CCPA 1934).
Therefore, one of ordinary skill in the requisite art before the invention was made would have used any thickness range suitable to the device of Cheng et al. in order to optimize the performance of the device. Further in this regard, the specification contains no disclosure of either the critical nature of the claimed thickness arrangement or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen limitations or upon another variable recited in a claim, the Applicant must show that the chosen limitations are critical. In re Woodruff, 919 F.2d 1575, 1578 (Fed. Cir. 1990).
Re claim 57, further comprising a source/drain region under the channel region and is electrically coupled to a bitline have been well-known in the semiconductor art for forming a transistor/memory device.
Response to Arguments
Applicant's arguments filed 1/16/2026 have been fully considered but they are not persuasive for reasons herein above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JACK CHEN whose telephone number is (571)272-1689. The examiner can normally be reached Monday to Friday, 8am to 4pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara J. Green can be reached at (571)270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JACK S CHEN/Primary Examiner, Art Unit 2893
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