DETAILED ACTION
This Action is responsive to the Amendment filed on 02/02/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Initially, and regarding Claims 40 and 50, note that a “product-by-process” claim is directed to the product per se, no matter how actually made. See In re Thorpe, 227 USPQ 964 (CAFC, 1985) and the related case law cited therein which makes it clear that it is the final product per se which must be determined in a “product-by-process” claim, and not the patentability of the process, and that, as here, an old or obvious product produced by a new method is not patentable as a product, whether claimed in “product-by-process” claims or not. As stated in Thorpe,
[E]ven though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. In re Brown, 459 F.2d 531, 535, 173 USPQ 685, 688 (CCPA); In re Pilkington, 411 F.2d 1345, 1348, 162 USPQ 145, 147 (CCPA 1969); Buono v. Yankee Maid Dress Corp., 77 F.2d 274, 279, 26 USPQ 57, 61 (2d. Cir. 1935).
Note that the applicants have the burden of proof in such cases, as the above case law makes clear.
Claims 38-39 and 48-49 are rejected under 35 U.S.C. 103 as being unpatentable over Chan (US 2018/0342459), in view of Yokoyama (US 2019/0043753).
Regarding claim 38, Chan (see, e.g., FIG. 11) discloses a semiconductor device comprising:
a dielectric layer DS e.g., silicon oxide, silicon nitride, or carbon doped silicon oxide disposed on a substrate 212 (Para 0014, Para 0015);
a metallic interconnect 280’ disposed in the dielectric layer DS (Para 0031, Para 0032);
a nitride barrier material 250 disposed beneath one or more lateral portions of the metallic interconnect 280’ (Para 0022);
a manganese-containing barrier material 260’ only disposed between the dielectric layer DS and sidewall portions of the metallic interconnect 280’ (Para 0025, Para 0028);
a metallic liner 270, the metallic liner 270 comprising one or more first sections e.g., horizontal sections of 270 and second sections e.g., vertical sections of 270 that are contiguous with the one or more first sections e.g., horizontal sections of 270 to at least partially surround the metallic interconnect 280’ (Para 0030),
wherein:
the one or more first sections e.g., horizontal sections of 270 are disposed between the metallic interconnect 280’ and the nitride barrier material 250; and
the second sections e.g., vertical sections of 270 are disposed (i) directly adjacent to the manganese-containing barrier material 260’, and (ii) between the manganese-containing barrier material 260’ and the metallic interconnect 280’,
Although Chan shows substantial features of the claimed invention, Chan fails to expressly teach that the metallic liner comprising cobalt. Chan does, however, teach that the metallic liner 270 comprises tungsten, titanium, and tantalum (Para 0030).
Yoyokama (see, e.g., FIG. 2), on the other hand, teaches that the metallic liner BL comprises a metal such as tungsten, cobalt, or the like (Para 0018).
Therefore, it would have been obvious at the time of filing the invention to one or ordinary skill in the art to use either any tungsten or cobalt in Chan’s device because these were recognized in the semiconductor art for their use as metallic liners, as taught by Yoyokama, and selecting between known equivalents would be within the level of ordinary skill in the art.
Regarding claim 39, Chan (see, e.g., FIG. 11) teaches the semiconductor device of claim 38, wherein the metallic interconnect 280’ comprises copper (Para 0031).
Regarding claim 48, Chan (see, e.g., FIG. 11) teaches the semiconductor device of claim 38, wherein the nitride barrier material 250 comprises tantalum nitride (Para 0022).
Regarding claim 49, Chan (see, e.g., FIG. 11) teaches the semiconductor device of claim 38, wherein the nitride barrier material 250 comprises titanium nitride (Para 0022).
Claims 40-41, 44, 50, 52, 54, and 58 are rejected under 35 U.S.C. 103 as being unpatentable over Chan (US 2018/0342459), in view of Yokoyama (US 2019/0043753), and further in view of Lai (US 2017/0330797).
Regarding claim 40, although Chan/Yoyokama show substantial features of the claimed invention, Chan/Yoyokama fail to expressly teach the semiconductor device of claim 38, wherein the manganese-containing barrier material comprises a reaction product of manganese atoms diffused through the metallic liner and a dielectric material of the dielectric layer.
Lai (see, e.g., FIG. 2C) teaches that the manganese-containing barrier material 204 comprises a product of manganese and a dielectric material e.g., silicon oxide for the purpose of utilizing a material that has good adhesion and barrier properties (Para 0030, Para 0033).
The combination of Chan (see, e.g., FIG. 11) / Lai (see, e.g., FIG. 2C) teaches that manganese-containing barrier material 260’ (as taught by Chan, modified by Lai) comprises product of manganese and a dielectric material e.g., silicon oxide (as taught by Chan and as taught by Lai) of the dielectric layer DS (as taught by Chan).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the manganese-containing material of Chan to comprise a product of manganese and a dielectric material as described by Lai for the purpose of utilizing a material that has good adhesion and barrier properties (Para 0030, Para 0033).
Examiner Note: It is noted that the combination of Chan (see, e.g., FIG. 11) / Yoyokama (see, e.g., FIG. 2) shows all aspects of the semiconductor device including the manganese-containing barrier material to the claimed invention, and the method step of a reaction product of manganese atoms diffused through the metallic liner and a dielectric material e.g., silicon oxide, silicon nitride, or carbon doped silicon oxide of the dielectric layer is an intermediate step that does not affect the structure of the final device.
Regarding claim 41, although Chan/Yoyokama show substantial features of the claimed invention, Chan/Yoyokama fail to expressly teach the semiconductor device of claim 38, wherein the manganese-containing barrier material comprises a manganese oxide.
Lai (see, e.g., FIG. 2C) teaches that the manganese-containing barrier material 204 comprises a manganese oxide for the purpose of utilizing a material that has good adhesion and barrier properties (Para 0030, Para 0033).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the manganese-containing material of Chan to comprise manganese oxide as described by Lai for the purpose of utilizing a material that has good adhesion and barrier properties (Para 0030, Para 0033).
Regarding claim 44, Lai (see, e.g., FIG. 2C) teaches the semiconductor device of claim 40, wherein the manganese-containing barrier material 204 comprises silicon for the purpose of utilizing a material that has good adhesion and barrier properties (Para 0030, Para 0033).
Regarding claim 50, Chan (see, e.g., FIG. 11) discloses a semiconductor device comprising:
a dielectric layer 230 e.g., silicon oxide, silicon nitride, or carbon doped silicon oxide (Para 0014, Para 0015);
a metallic interconnect 280’ (left) comprising copper disposed in the dielectric layer 230 (Para 0031, Para 0032);
a metallic liner 270 (left) that at least partially surrounds a perimeter of the metallic interconnect 280’ (left) (Para 0030);
a first diffusion barrier material 250 (left) comprising tantalum nitride or titanium nitride disposed beneath one or more first sections of the metallic liner e.g., horizontal section of 270 (left) (Para 0022); and
a second diffusion barrier material 260’ (left), wherein the second diffusion barrier material 260’ (left) is disposed only (i) directly adjacent to one or more second sections e.g., vertical sections of 270 (left) of the metallic liner 270 (left), and (ii) between the one or more second sections e.g., vertical section of 270 (left) and the dielectric layer 230,
Although Chan shows substantial features of the claimed invention, Chan fails to expressly teach that the metallic liner comprising cobalt; and that the second diffusion barrier material comprising a reaction product of manganese and a dielectric material of the dielectric layer. Chan does, however, teach that the metallic liner 270 (left) comprises tungsten, titanium, and tantalum (Para 0030).
Yoyokama (see, e.g., FIG. 2), on the other hand, teaches that the metallic liner BL comprises a metal such as tungsten, cobalt, or the like (Para 0018).
Therefore, it would have been obvious at the time of filing the invention to one or ordinary skill in the art to use either any tungsten or cobalt in Chan’s device because these were recognized in the semiconductor art for their use as metallic liners, as taught by Yoyokama, and selecting between known equivalents would be within the level of ordinary skill in the art.
Lai (see, e.g., FIG. 2C) teaches that the barrier material 204 comprises a product of manganese and a dielectric material e.g., silicon oxide for the purpose of utilizing a material that has good adhesion and barrier properties (Para 0030, Para 0033).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the barrier material of Chan to comprise manganese and a dielectric material e.g., silicon oxide as described by Lai for the purpose of utilizing a material that has good adhesion and barrier properties (Para 0030, Para 0033).
Examiner Note: It is noted that the combination of Chan (see, e.g., FIG. 11) / Yoyokama (see, e.g., FIG. 2) / Lai (see, e.g., FIG. 2C) show all aspects of the semiconductor device including the barrier material of the claimed invention, and the method step of a reaction product of manganese and a dielectric material e.g., silicon oxide, silicon nitride, or carbon doped silicon oxide of the dielectric layer is an intermediate step that does not affect the structure of the final device.
Regarding claim 52, although Chan/Yoyokama show substantial features of the claimed invention, Chan/Yoyokama fail to expressly teach the semiconductor device of claim 50, wherein the second diffusion barrier material comprises a manganese and oxygen.
Lai (see, e.g., FIG. 2C) teaches that the diffusion barrier material 204 comprises a manganese and oxygen for the purpose of utilizing a material that has good adhesion and barrier properties (Para 0030, Para 0033).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the second diffusion barrier material of Chan to comprise manganese and oxygen as described by Lai for the purpose of utilizing a material that has good adhesion and barrier properties (Para 0030, Para 0033).
Regarding claim 54, Lai (see, e.g., FIG. 2C) teaches the semiconductor device of claim 50, wherein the second diffusion barrier material 204 comprises manganese and silicon for the purpose of utilizing a material that has good adhesion and barrier properties (Para 0030, Para 0033).
Regarding claim 58, Chan (see, e.g., FIG. 11) teaches semiconductor device of claim 50, wherein: the dielectric layer 230 is a first dielectric layer 230 (Para 0014, Para 0015); the metallic interconnect 280’ (left) is a first metallic interconnect 280’ (left) (Para 0031, Para 0032); the semiconductor device e.g., semiconductor device of FIG.11 further comprises a second dielectric layer 220 and a second metallic interconnect 280’ (center) disposed in the second dielectric layer 220 (Para 0014, Para 0015); and the first diffusion barrier material 250 (left) is disposed between one of the one or more first sections e.g., horizontal section of 270 (left) of the metallic liner 270 (left) and the second metallic interconnect 280’ (center) (Para 0022).
Claim 45 is rejected under 35 U.S.C. 103 as being unpatentable over Chan (US 2018/0342459), in view of Yokoyama (US 2019/0043753), and further in view of Neishi (US 2012/0025380).
Regarding claim 45, although Chan/Yoyokama show substantial features of the claimed invention, Chan/Yoyokama fails to expressly teach semiconductor device of claim 40, wherein the manganese-containing barrier material further comprises carbon.
Neishi (see, e.g., FIG. 17F), in a similar field of endeavor, teaches that the manganese-containing barrier material 207 comprises carbon for the purpose of increasing the adhesive strength of the manganese oxide film (Para 0011, Para 0012, Para 0115, Para 0126, Para 0143, Para 0144, Para 0153, Para 0156, Para 0157).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the manganese-containing barrier material of Chan/Yoyokama to be the manganese-containing barrier material that further comprises carbon as described by Neishi for the purpose of increasing the adhesive strength of the manganese oxide film (Para 0011, Para 0012, Para 0115, Para 0144, Para 0156, Para 0157).
Claim 53 is rejected under 35 U.S.C. 103 as being unpatentable over Chan (US 2018/0342459), in view of Yokoyama (US 2019/0043753), and further in view of Lai (US 2017/0330797), and further in view of Neishi (US 2012/0025380).
Regarding claim 53, although Chan/Yoyokama/Lai show substantial features of the claimed invention, Chan/Yoyokama/Lai fails to expressly teach semiconductor device of claim 50, wherein the second diffusion barrier material comprises manganese and carbon.
Neishi (see, e.g., FIG. 17F), in a similar field of endeavor, teaches that the diffusion barrier material 207 comprises carbon for the purpose of increasing the adhesive strength of the manganese oxide film (Para 0011, Para 0012, Para 0115, Para 0126, Para 0143, Para 0144, Para 0153, Para 0156, Para 0157).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the second diffusion barrier material of Chan to be the diffusion barrier material that comprises manganese and carbon as described by Neishi for the purpose of increasing the adhesive strength of the manganese oxide film (Para 0011, Para 0012, Para 0115, Para 0144, Para 0156, Para 0157).
Response to Arguments
Applicant’s arguments with respect to claims 38 and 50 have been considered but are moot because of the new ground of rejection.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANTONIO CRITE whose telephone number is (571) 270-5267. The examiner can normally be reached Monday - Friday, 10:00 am - 6:30 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached at (571) 272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ANTONIO B CRITE/Primary Examiner, Art Unit 2817