Prosecution Insights
Last updated: April 19, 2026
Application No. 16/287,392

SYSTEM AND METHOD FOR COMPILER SUPPORT FOR COMPILE TIME CUSTOMIZATION OF CODE

Final Rejection §101§103
Filed
Feb 27, 2019
Examiner
CHEN, QING
Art Unit
2191
Tech Center
2100 — Computer Architecture & Software
Assignee
Nvidia Corporation
OA Round
10 (Final)
80%
Grant Probability
Favorable
11-12
OA Rounds
2y 10m
To Grant
99%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allow Rate
542 granted / 678 resolved
+24.9% vs TC avg
Strong +52% interview lift
Without
With
+51.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
28 currently pending
Career history
706
Total Applications
across all art units

Statute-Specific Performance

§101
18.1%
-21.9% vs TC avg
§103
39.2%
-0.8% vs TC avg
§102
10.3%
-29.7% vs TC avg
§112
23.1%
-16.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 678 resolved cases

Office Action

§101 §103
DETAILED ACTION This Office action is in response to the amendment submitted on January 15, 2026. Claims 1-20 are pending. Claims 1-20 are currently amended. The objection to the title of the invention is withdrawn in view of the Applicant’s amendments to the claims. The objections to Claims 1-17 are withdrawn in view of the Applicant’s amendments to the claims. The 35 U.S.C. § 112(b) rejections of Claims 1-8 and 18-20 are withdrawn in view of the Applicant’s amendments to the claims. In the interest of facilitating compact prosecution, the Examiner kindly asks the Applicant’s representative to authorize Internet communications with the Examiner by submitting Form PTO/SB/439 using Patent Center. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment Claim Objections Claims 1 and 3-20 are objected to because of the following informalities: Claims 1, 9, and 18 recite “functionality.” It should read -- a functionality --. Claims 1, 9, and 18 recite “host code.” It should read -- host source code --. Claims 1, 3-8, 11-15, 17, 19, and 20 recite “the host code.” It should read -- the host source code --. Claim 4 contains a typographical error “the a function” should read -- a function --. Claims 10-12 recite “the circuit.” It should read -- the circuitry --. Claim 16 recites “GPU.” It should read -- graphics processing unit (GPU) --. Appropriate correction is required. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more. Claim Interpretation: Under the broadest reasonable interpretation (BRI), the limitations of Claim 1 are presumed to have their plain meaning consistent with the specification as it would be interpreted by one of ordinary skill in the art. See MPEP § 2111. Step 1: Claim 1 is directed to a method, which is a process (a series of steps or acts), and falls within one of the statutory categories of invention. Step 2A, Prong One: Claim 1 recites the limitations: (a) identifying, in host source code, a function comprising device source code indicating functionality to be performed by an accelerator; and (b) replacing the device source code with host code comprising an identifier of the device source code to result in modified host source code. These recited steps, under the broadest reasonable interpretation (BRI), cover performance of the steps in the human mind alone or with the aid of pen and paper. That is, nothing in the claim precludes the steps from practically being performed in the human mind alone using observation, evaluation, judgment, and opinion or with the aid of pen and paper. For example, the limitation (a) in the context of the claim encompasses a human observing host source code in the human mind alone using observation, evaluation, judgment, and opinion or with the aid of pen and paper to identify a function comprising device source code. And the limitation (b) in the context of the claim encompasses a human observing the device source code in the human mind alone using observation, evaluation, judgment, and opinion or with the aid of pen and paper to replace the device source code. See MPEP § 2106.04(a)(2)(III). If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the human mind alone or with the aid of pen and paper but for the recitation of generic computer components, then it falls within the “Mental Processes” grouping of abstract ideas. Accordingly, the claim recites an abstract idea. Step 2A, Prong Two: This judicial exception is not integrated into a practical application. In particular, the claim recites the additional element: (1) compiling the modified host source code to enable a host program to cause the accelerator to perform the functionality. The additional element (1) fails to meaningfully limit the claim because it does not require any particular application of the judicial exception and is, at best, the equivalent of merely adding the words “apply it” (or an equivalent) to the judicial exception. See MPEP § 2106.05(f). The additional element recites only the idea of compiling the modified host source code without details on how this is accomplished. The claim omits any details as to how the compiling solves a technical problem, and instead recites only the idea of a solution or outcome. Therefore, the additional element attempts to cover any solution to the identified problem of compiling the modified host source code with no restriction on how the compiling is accomplished and no description of the mechanism for accomplishing the compiling, and does not integrate a judicial exception into a practical application because this type of recitation is equivalent to the words “apply it.” Accordingly, even when viewed in combination, the additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. The claim is directed to an abstract idea. Step 2B: The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception because the additional elements when considered both individually and as a combination do not amount to significantly more than the abstract idea. As discussed above with respect to integration of the abstract idea into a practical application, the claim recites the additional element: (1) compiling the modified host source code to enable a host program to cause the accelerator to perform the functionality. The additional element (1) does not require any particular application of the judicial exception and is, at best, the equivalent of merely adding the words “apply it” (or an equivalent) to the judicial exception. The analysis under Step 2A, Prong Two is carried through to Step 2B. Therefore, the additional element attempts to cover any solution to the identified problem of compiling the modified host source code with no restriction on how the compiling is accomplished and no description of the mechanism for accomplishing the compiling, and does not provide significantly more because this type of recitation is equivalent to the words “apply it.” Thus, taken alone, the additional element does not amount to significantly more than the above-identified judicial exception (the abstract idea). Looking at the additional element as a combination adds nothing that is not already present when looking at the additional element taken individually. Even when considered in combination, the additional element represents only the idea of a solution or outcome, and therefore does not provide an inventive concept. The claim is not patent eligible. Claims 2-8 are dependent on Claim 1, but do not add any feature or subject matter that would solve the judicial exception deficiencies of Claim 1. Claim 2 recites the limitation: (a) wherein the device source code is associated with a template instantiation. <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> Claim 3 recites the limitation: (a) wherein the host code comprises a type associated with a function enclosing an entry point. <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> Claim 4 recites the limitation: (a) wherein the host code comprises an address of the a function enclosing an entry point. <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> Claim 5 recites the limitation: (a) wherein the host code comprises a unique identifier associated with an entry point. <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> Claim 6 recites the limitation: (a) wherein the host code comprises a modification to an entry point. <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> Claim 7 recites the limitation: (a) wherein the host code comprises one or more variables and captures the one or more variables by explicitly passing values of the one or more variables to a constructor of the host code. <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> Claim 8 recites the limitation: (a) wherein the host code comprises a template specialization associated with the device source code. Claims 2-6 and 8 recite further mental steps which can be practically performed in the human mind alone using observation, evaluation, judgment, and opinion or with the aid of pen and paper and thus, fail to make the claim any less abstract (see MPEP § 2106.04(a)(2)(III)). Claim 7 recites further additional elements that do not integrate the judicial exception into a practical application of the judicial exception because they do not require any particular application of the judicial exception and are, at best, the equivalent of merely adding the words “apply it” (or an equivalent) to the judicial exception (see MPEP § 2106.05(f)), and thus, are not significantly more than the abstract idea. Thus, Claims 2-8 do not add any steps or additional elements, when considered both individually and as a combination, that would convert Claim 1 into patent-eligible subject matter. Therefore, Claims 1-8 are not drawn to patent-eligible subject matter as they are directed to an abstract idea without significantly more. <<>> • × • <<>> • × • <<>> • × • <<>> • × • <<>> • × • <<>> • × • <<>> • × • <<>> Claim Interpretation: Under the broadest reasonable interpretation (BRI), the limitations of Claim 9 are presumed to have their plain meaning consistent with the specification as it would be interpreted by one of ordinary skill in the art. See MPEP § 2111. Step 1: Claim 9 is directed to one or more processors, which is a machine, and falls within one of the statutory categories of invention. Step 2A, Prong One: Claim 9 recites the limitations: (a) identify, in host source code, a function comprising device source code indicating functionality to be performed by an accelerator; and (b) replace the device source code with host code comprising an identifier of the device source code to result in modified host source code. These recited steps, under the broadest reasonable interpretation (BRI), cover performance of the steps in the human mind alone or with the aid of pen and paper. That is, other than reciting: (1) [o]ne or more processors comprising circuitry to. Nothing in the claim precludes the steps from practically being performed in the human mind alone using observation, evaluation, judgment, and opinion or with the aid of pen and paper. For example, the limitation (a) in the context of the claim encompasses a human observing host source code in the human mind alone using observation, evaluation, judgment, and opinion or with the aid of pen and paper to identify a function comprising device source code. And the limitation (b) in the context of the claim encompasses a human observing the device source code in the human mind alone using observation, evaluation, judgment, and opinion or with the aid of pen and paper to replace the device source code. See MPEP § 2106.04(a)(2)(III). If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the human mind alone or with the aid of pen and paper but for the recitation of generic computer components, then it falls within the “Mental Processes” grouping of abstract ideas. Accordingly, the claim recites an abstract idea. Step 2A, Prong Two: This judicial exception is not integrated into a practical application. In particular, the claim recites the additional element: (1) [o]ne or more processors comprising circuitry to. The additional element (1) is recited at a high-level of generality such that it amounts to no more than mere instructions to apply the judicial exception using generic computer components. The one or more processors are used as tools to perform the identifying, replacing, and compiling steps of the claim. See MPEP § 2106.05(f). Also, the claim recites the additional element: (2) compile the modified host source code to enable a host program to cause the accelerator to perform the functionality. The additional element (2) fails to meaningfully limit the claim because it does not require any particular application of the judicial exception and is, at best, the equivalent of merely adding the words “apply it” (or an equivalent) to the judicial exception. See MPEP § 2106.05(f). The additional element recites only the idea of compiling the modified host source code without details on how this is accomplished. The claim omits any details as to how the compiling solves a technical problem, and instead recites only the idea of a solution or outcome. Therefore, the additional element attempts to cover any solution to the identified problem of compiling the modified host source code with no restriction on how the compiling is accomplished and no description of the mechanism for accomplishing the compiling, and does not integrate a judicial exception into a practical application because this type of recitation is equivalent to the words “apply it.” Accordingly, even when viewed in combination, the additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea. The claim is directed to an abstract idea. Step 2B: The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception because the additional elements when considered both individually and as a combination do not amount to significantly more than the abstract idea. As discussed above with respect to integration of the abstract idea into a practical application, the claim recites the additional element: (1) [o]ne or more processors comprising circuitry to. The additional element (1) amounts to no more than mere instructions to apply the judicial exception using generic computer components. Mere instructions to apply a judicial exception using generic computer components cannot provide an inventive concept. Also, the claim recites the additional element: (2) compile the modified host source code to enable a host program to cause the accelerator to perform the functionality. The additional element (2) does not require any particular application of the judicial exception and is, at best, the equivalent of merely adding the words “apply it” (or an equivalent) to the judicial exception. The analysis under Step 2A, Prong Two is carried through to Step 2B. Therefore, the additional element attempts to cover any solution to the identified problem of compiling the modified host source code with no restriction on how the compiling is accomplished and no description of the mechanism for accomplishing the compiling, and does not provide significantly more because this type of recitation is equivalent to the words “apply it.” Thus, taken alone, the additional elements do not amount to significantly more than the above-identified judicial exception (the abstract idea). Looking at the additional elements as a combination adds nothing that is not already present when looking at the additional elements taken individually. Even when considered in combination, the additional elements represent mere instructions to apply a judicial exception using generic computer components and only the idea of a solution or outcome, and therefore do not provide an inventive concept. The claim is not patent eligible. Claims 10-17 are dependent on Claim 9, but do not add any feature or subject matter that would solve the judicial exception deficiencies of Claim 9. Claim 10 recites the limitation: (a) wherein the circuit is to identify a template specialization based on the device source code. <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> Claim 11 recites the limitation: (a) wherein the circuit is to modify the host code based on a template specialization. <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> Claim 12 recites the limitation: (a) wherein the circuit is to send the host code to a host compiler. <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> Claim 13 recites the limitation: (a) wherein the host code comprises a type associated with a function enclosing an entry point. <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> Claim 14 recites the limitation: (a) wherein the host code comprises an address of a function enclosing an entry point. <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> Claim 15 recites the limitation: (a) wherein the host code comprises a unique identifier associated with an entry point. <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> Claim 16 recites the limitation: (a) wherein the device source code comprises GPU code. <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> Claim 17 recites the limitation: (a) wherein the host code includes one or more variables, and wherein the host code captures the one or more variables by explicitly passing values of the one or more variables to a constructor of the host code. Claims 10, 11, and 13-16 recite further mental steps which can be practically performed in the human mind alone using observation, evaluation, judgment, and opinion or with the aid of pen and paper and thus, fail to make the claim any less abstract (see MPEP § 2106.04(a)(2)(III)). Claim 12 recites further additional elements that do not integrate the judicial exception into a practical application of the judicial exception because they are mere data gathering/transmitting/outputting recited at a high level of generality, and thus are insignificant extra-solution activities (see MPEP § 2106.05(g)), and thus, are not significantly more than the abstract idea. Claim 17 recites further additional elements that do not integrate the judicial exception into a practical application of the judicial exception because they do not require any particular application of the judicial exception and are, at best, the equivalent of merely adding the words “apply it” (or an equivalent) to the judicial exception (see MPEP § 2106.05(f)), and thus, are not significantly more than the abstract idea. Thus, Claims 10-17 do not add any steps or additional elements, when considered both individually and as a combination, that would convert Claim 9 into patent-eligible subject matter. Therefore, Claims 9-17 are not drawn to patent-eligible subject matter as they are directed to an abstract idea without significantly more. <<>> • × • <<>> • × • <<>> • × • <<>> • × • <<>> • × • <<>> • × • <<>> • × • <<>> Claim Interpretation: Under the broadest reasonable interpretation (BRI), the limitations of Claim 18 are presumed to have their plain meaning consistent with the specification as it would be interpreted by one of ordinary skill in the art. See MPEP § 2111. Step 1: Claim 18 is directed to a non-transitory computer-readable medium, which is an article of manufacture, and falls within one of the statutory categories of invention. Step 2A, Prong One: Claim 18 recites the limitations: (a) identify, in host source code, a function comprising device source code indicating functionality to be performed by an accelerator; and (b) replace the device source code with host code comprising an identifier of the device source code to result in modified host source code. These recited steps, under the broadest reasonable interpretation (BRI), cover performance of the steps in the human mind alone or with the aid of pen and paper. That is, other than reciting: (1) [a] non-transitory computer-readable medium having stored thereon a set of instructions, which when performed by one or more processors, cause the one or more processors to. Nothing in the claim precludes the steps from practically being performed in the human mind alone using observation, evaluation, judgment, and opinion or with the aid of pen and paper. For example, the limitation (a) in the context of the claim encompasses a human observing host source code in the human mind alone using observation, evaluation, judgment, and opinion or with the aid of pen and paper to identify a function comprising device source code. And the limitation (b) in the context of the claim encompasses a human observing the device source code in the human mind alone using observation, evaluation, judgment, and opinion or with the aid of pen and paper to replace the device source code. See MPEP § 2106.04(a)(2)(III). If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the human mind alone or with the aid of pen and paper but for the recitation of generic computer components, then it falls within the “Mental Processes” grouping of abstract ideas. Accordingly, the claim recites an abstract idea. Step 2A, Prong Two: This judicial exception is not integrated into a practical application. In particular, the claim recites the additional element: (1) [a] non-transitory computer-readable medium having stored thereon a set of instructions, which when performed by one or more processors, cause the one or more processors to. The additional element (1) is recited at a high-level of generality such that it amounts to no more than mere instructions to apply the judicial exception using generic computer components. The non-transitory computer-readable medium and one or more processors are used as tools to perform the identifying, replacing, and compiling steps of the claim. See MPEP § 2106.05(f). Also, the claim recites the additional element: (2) compile the modified host source code to enable a host program to cause the accelerator to perform the functionality. The additional element (2) fails to meaningfully limit the claim because it does not require any particular application of the judicial exception and is, at best, the equivalent of merely adding the words “apply it” (or an equivalent) to the judicial exception. See MPEP § 2106.05(f). The additional element recites only the idea of compiling the modified host source code without details on how this is accomplished. The claim omits any details as to how the compiling solves a technical problem, and instead recites only the idea of a solution or outcome. Therefore, the additional element attempts to cover any solution to the identified problem of compiling the modified host source code with no restriction on how the compiling is accomplished and no description of the mechanism for accomplishing the compiling, and does not integrate a judicial exception into a practical application because this type of recitation is equivalent to the words “apply it.” Accordingly, even when viewed in combination, the additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea. The claim is directed to an abstract idea. Step 2B: The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception because the additional elements when considered both individually and as a combination do not amount to significantly more than the abstract idea. As discussed above with respect to integration of the abstract idea into a practical application, the claim recites the additional element: (1) [a] non-transitory computer-readable medium having stored thereon a set of instructions, which when performed by one or more processors, cause the one or more processors to. The additional element (1) amounts to no more than mere instructions to apply the judicial exception using generic computer components. Mere instructions to apply a judicial exception using generic computer components cannot provide an inventive concept. Also, the claim recites the additional element: (2) compile the modified host source code to enable a host program to cause the accelerator to perform the functionality. The additional element (2) does not require any particular application of the judicial exception and is, at best, the equivalent of merely adding the words “apply it” (or an equivalent) to the judicial exception. The analysis under Step 2A, Prong Two is carried through to Step 2B. Therefore, the additional element attempts to cover any solution to the identified problem of compiling the modified host source code with no restriction on how the compiling is accomplished and no description of the mechanism for accomplishing the compiling, and does not provide significantly more because this type of recitation is equivalent to the words “apply it.” Thus, taken alone, the additional elements do not amount to significantly more than the above-identified judicial exception (the abstract idea). Looking at the additional elements as a combination adds nothing that is not already present when looking at the additional elements taken individually. Even when considered in combination, the additional elements represent mere instructions to apply a judicial exception using generic computer components and only the idea of a solution or outcome, and therefore do not provide an inventive concept. The claim is not patent eligible. Claims 19 and 20 are dependent on Claim 18, but do not add any feature or subject matter that would solve the judicial exception deficiencies of Claim 18. Claim 19 recites the limitation: (a) wherein the host code comprises a type associated with a function enclosing an entry point. <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> Claim 20 recites the limitation: (a) wherein the host code comprises an address of a function enclosing an entry point and a unique integer associated with the entry point. Claims 19 and 20 recite further mental steps which can be practically performed in the human mind alone using observation, evaluation, judgment, and opinion or with the aid of pen and paper and thus, fail to make the claim any less abstract (see MPEP § 2106.04(a)(2)(III)). Thus, Claims 19 and 20 do not add any steps or additional elements, when considered both individually and as a combination, that would convert Claim 18 into patent-eligible subject matter. Therefore, Claims 18-20 are not drawn to patent-eligible subject matter as they are directed to an abstract idea without significantly more. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 9, 12, 16, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over US 2011/0252411 (hereinafter “Martin”) in view of US 2010/0042976 (hereinafter “Hines”). [Examiner’s Remarks: In order for a reference to be proper for use in an obviousness rejection under 35 U.S.C. 103, the reference must be analogous art to the claimed invention. In re Bigio, 381 F.3d 1320, 1325, 72 USPQ2d 1209, 1212 (Fed. Cir. 2004). A reference is analogous art to the claimed invention if: (1) the reference is from the same field of endeavor as the claimed invention (even if it addresses a different problem); or (2) the reference is reasonably pertinent to the problem faced by the inventor (even if it is not in the same field of endeavor as the claimed invention). Note that the claimed invention is generally directed to compilation of host source code and device source code, and graphics processing units (GPUs) (specification, paragraph [003]). As for the “same field of endeavor” test, Martin is generally directed to identifying and translating programming (or program) code executable by a GPU (Martin, paragraph [0015]). As for the “reasonably pertinent” test, Hines is generally directed to optimizing applications using source code patterns and performance analysis (Hines, paragraph [0001]). Thus, Martin and Hines are both analogous art to the claimed invention (even if they address different problems or are not in the same field of endeavor as the claimed invention). See MPEP § 2141.01(a)(I).] As per Claim 1, Martin discloses: A method (paragraph [0015], “[…] methods described herein may identify and translate programming (or program) code executable by a GPU.”) comprising: identifying, in host source code, a function comprising device source code indicating functionality to be performed by an accelerator (Figure 7; paragraph [0037], “Client device 110 may perform a static analysis of the program code to identify portions of the program code, and may determine, prior to execution of the program code and based on the input size and type information, a first portion of the program code to be executed by GPU 130 (emphasis added).”; paragraph [0061], “As shown in FIG. 7, program code 700 […] may include a portion 720 (e.g., parallel code) that may be more efficiently executed by GPU 130. Program code 700 […] may include another portion 740 (e.g., parallel-for code) that may be more efficiently executed by GPU 130.”); and compiling the […] host source code to enable a host program to cause the accelerator to perform the functionality (paragraph [0037], “Client device 110 may compile the first portion of the program code to produce compiled GPU-executable code 330 (e.g., assembly code that may be understood by GPU 130) […] As shown in FIG. 3, client device 110 may provide, to GPU 130 for execution, compiled GPU-executable code 330 […] (emphasis added).”). Martin discloses “device source code” and “host source code,” but Martin does not explicitly disclose: replacing the device source code with host code comprising an identifier of the device source code to result in modified host source code. However, Hines discloses: replacing the […] source code with host code comprising an identifier of the […] source code to result in modified […] source code (paragraph [0031], “At 410, a catalog of patterns of inefficient program statements are stored. The catalog may be stored in one or more files, database tables, or other data strictures. The catalog may also be incorporated into computer programs and/or programmable hardware logic, that uses the catalog to analyze the source code. Each inefficiency pattern can include, or be associated with, corresponding replacement or optimized code that can be used to correct statements matching the inefficiency patterns (emphasis added).”; paragraph [0033], “At 440, the performance of the executed source code is monitored to identify high consuming statements. Performance analysis tools, such as the scanners described above, can be used to determine performance metrics corresponding to the statements in the program. A report or file containing the high consuming statements can be created based on the results of the monitoring. The high consuming statements can be identified by file name and line number [an identifier of the device source code] so that they can be cross-referenced with results from the catalog comparison.”; paragraph [0035], “At 460, the source code can be modified based on the high consuming, inefficient source code statements [result in modified host source code]. The corresponding replacement or optimized code associated with each of the high consuming, inefficient source code statements or sets of statements can be used to automatically modify the source code [replacing the device source code with host code]. The replacement statements can be implemented so as to maintain essentially the same functionality of the original source code.”). As pointed out hereinabove, Martin and Hines are both analogous art to the claimed invention. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Hines into the teaching of Martin to include “replacing the device source code with host code comprising an identifier of the device source code to result in modified host source code.” The modification would be obvious because one of ordinary skill in the art would be motivated to optimize the performance of a computer application based on correcting inefficient statements (Hines, paragraph [0031]). Claim 9 is a one or more processors claim corresponding to the method claim hereinabove (Claim 1). Therefore, Claim 9 is rejected for the same reason set forth in the rejection of Claim 1. As per Claim 12, the rejection of Claim 9 is incorporated; and Martin further discloses: wherein the circuit is to send the host code to a host compiler (paragraph [0052], “CPU compiler 520 may include hardware or a combination of hardware and software that may receive portion(s) 560 of TCE code 530, which have been determined to be more efficiently executed by CPU 140 than GPU 130.”). As per Claim 16, the rejection of Claim 9 is incorporated; and Martin further discloses: wherein the device source code comprises GPU code (paragraph [0061], “As shown in FIG. 7, program code 700 […] may include a portion 720 (e.g., parallel code) that may be more efficiently executed by GPU 130. Program code 700 […] may include another portion 740 (e.g., parallel-for code) that may be more efficiently executed by GPU 130.”). Claim 18 is a non-transitory computer-readable medium claim corresponding to the method claim hereinabove (Claim 1). Therefore, Claim 18 is rejected for the same reason set forth in the rejection of Claim 1. Claims 2-4, 8, 10, 11, 13, 14, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Martin in view of Hines as applied to Claims 1, 9, and 18 above, and further in view of “Nvidia: CUDA Programming Model Overview,” 2006 (hereinafter “Nvidia”). [Examiner’s Remarks: In order for a reference to be proper for use in an obviousness rejection under 35 U.S.C. 103, the reference must be analogous art to the claimed invention. In re Bigio, 381 F.3d 1320, 1325, 72 USPQ2d 1209, 1212 (Fed. Cir. 2004). A reference is analogous art to the claimed invention if: (1) the reference is from the same field of endeavor as the claimed invention (even if it addresses a different problem); or (2) the reference is reasonably pertinent to the problem faced by the inventor (even if it is not in the same field of endeavor as the claimed invention). Note that the claimed invention is generally directed to compilation of host source code and device source code, and graphics processing units (GPUs) (specification, paragraph [003]). As for the “reasonably pertinent” test, Nvidia is generally directed to “Nvidia: CUDA Programming Model Overview” (Nvidia, slide 1). Thus, Nvidia is an analogous art to the claimed invention (even if it is not in the same field of endeavor as the claimed invention). See MPEP § 2141.01(a)(I).] As per Claim 2, the rejection of Claim 1 is incorporated; and the combination of Martin and Hines does not explicitly disclose: wherein the device source code is associated with a template instantiation. However, Nvidia discloses: wherein the device source code is associated with a template instantiation ( PNG media_image1.png 722 964 media_image1.png Greyscale PNG media_image2.png 717 961 media_image2.png Greyscale PNG media_image3.png 721 966 media_image3.png Greyscale ). As pointed out hereinabove, Nvidia is an analogous art to the claimed invention. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Nvidia into the combined teachings of Martin and Hines to include “wherein the device source code is associated with a template instantiation.” The modification would be obvious because one of ordinary skill in the art would be motivated to target portions of code for execution on a device (Nvidia, slide 17). As per Claim 3, the rejection of Claim 1 is incorporated; and the combination of Martin and Hines does not explicitly disclose: wherein the host code comprises a type associated with a function enclosing an entry point. However, Nvidia discloses: wherein the host code comprises a type associated with a function enclosing an entry point ( PNG media_image4.png 721 966 media_image4.png Greyscale ). As pointed out hereinabove, Nvidia is an analogous art to the claimed invention. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Nvidia into the combined teachings of Martin and Hines to include “wherein the host code comprises a type associated with a function enclosing an entry point.” The modification would be obvious because one of ordinary skill in the art would be motivated to target portions of code for execution on a device (Nvidia, slide 17). As per Claim 4, the rejection of Claim 1 is incorporated; and the combination of Martin and Hines does not explicitly disclose: wherein the host code comprises an address of a function enclosing an entry point. However, Nvidia discloses: wherein the host code comprises an address of a function enclosing an entry point ( PNG media_image5.png 722 965 media_image5.png Greyscale ). As pointed out hereinabove, Nvidia is an analogous art to the claimed invention. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Nvidia into the combined teachings of Martin and Hines to include “wherein the host code comprises an address of a function enclosing an entry point.” The modification would be obvious because one of ordinary skill in the art would be motivated to target portions of code for execution on a device (Nvidia, slide 17). As per Claim 8, the rejection of Claim 1 is incorporated; and the combination of Martin and Hines does not explicitly disclose: wherein the host code comprises a template specialization associated with the device source code. However, Nvidia discloses: wherein the host code comprises a template specialization associated with the device source code ( PNG media_image1.png 722 964 media_image1.png Greyscale PNG media_image2.png 717 961 media_image2.png Greyscale PNG media_image3.png 721 966 media_image3.png Greyscale ). As pointed out hereinabove, Nvidia is an analogous art to the claimed invention. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Nvidia into the combined teachings of Martin and Hines to include “wherein the host code comprises a template specialization associated with the device source code.” The modification would be obvious because one of ordinary skill in the art would be motivated to target portions of code for execution on a device (Nvidia, slide 17). As per Claim 10, the rejection of Claim 9 is incorporated; and the combination of Martin and Hines does not explicitly disclose: wherein the circuit is to identify a template specialization based on the device source code. However, Nvidia discloses: wherein the circuit is to identify a template specialization based on the device source code ( PNG media_image1.png 722 964 media_image1.png Greyscale PNG media_image2.png 717 961 media_image2.png Greyscale PNG media_image3.png 721 966 media_image3.png Greyscale ). As pointed out hereinabove, Nvidia is an analogous art to the claimed invention. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Nvidia into the combined teachings of Martin and Hines to include “wherein the circuit is to identify a template specialization based on the device source code.” The modification would be obvious because one of ordinary skill in the art would be motivated to target portions of code for execution on a device (Nvidia, slide 17). As per Claim 11, the rejection of Claim 9 is incorporated; and the combination of Martin and Hines does not explicitly disclose: wherein the circuit is to modify the host code based on a template specialization. However, Nvidia discloses: wherein the circuit is to modify the host code based on a template specialization ( PNG media_image1.png 722 964 media_image1.png Greyscale PNG media_image2.png 717 961 media_image2.png Greyscale PNG media_image3.png 721 966 media_image3.png Greyscale ). As pointed out hereinabove, Nvidia is an analogous art to the claimed invention. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Nvidia into the combined teachings of Martin and Hines to include “wherein the circuit is to modify the host code based on a template specialization.” The modification would be obvious because one of ordinary skill in the art would be motivated to target portions of code for execution on a device (Nvidia, slide 17). Claims 13 and 14 are one or more processors claims corresponding to the method claims hereinabove (Claims 3 and 4, respectively). Therefore, Claims 13 and 14 are rejected for the same reasons set forth in the rejections of Claims 3 and 4, respectively. Claim 19 is a non-transitory computer-readable medium claim corresponding to the method claim hereinabove (Claim 3). Therefore, Claim 19 is rejected for the same reason set forth in the rejection of Claim 3. Claims 5-7, 15, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Martin in view of Hines as applied to Claims 1 and 9 above, and further in view of “CUDA C PROGRAMMING GUIDE,” October 2012 (hereinafter “CUDA_C”). [Examiner’s Remarks: In order for a reference to be proper for use in an obviousness rejection under 35 U.S.C. 103, the reference must be analogous art to the claimed invention. In re Bigio, 381 F.3d 1320, 1325, 72 USPQ2d 1209, 1212 (Fed. Cir. 2004). A reference is analogous art to the claimed invention if: (1) the reference is from the same field of endeavor as the claimed invention (even if it addresses a different problem); or (2) the reference is reasonably pertinent to the problem faced by the inventor (even if it is not in the same field of endeavor as the claimed invention). Note that the claimed invention is generally directed to compilation of host source code and device source code, and graphics processing units (GPUs) (specification, paragraph [003]). As for the “reasonably pertinent” test, CUDA_C is generally directed to CUDA C programming guide (CUDA_C, page 1). Thus, CUDA_C is an analogous art to the claimed invention (even if it is not in the same field of endeavor as the claimed invention). See MPEP § 2141.01(a)(I).] As per Claim 5, the rejection of Claim 1 is incorporated; and the combination of Martin and Hines does not explicitly disclose: wherein the host code comprises a unique identifier associated with an entry point. However, CUDA_C discloses: wherein the host code comprises a unique identifier associated with an entry point ( PNG media_image6.png 495 569 media_image6.png Greyscale ). As pointed out hereinabove, CUDA_C is an analogous art to the claimed invention. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of CUDA_C into the combined teachings of Martin and Hines to include “wherein the host code comprises a unique identifier associated with an entry point.” The modification would be obvious because one of ordinary skill in the art would be motivated to give a unique CUDA thread ID that is accessible with a kernel (CUDA_C, page 7). As per Claim 6, the rejection of Claim 1 is incorporated; and the combination of Martin and Hines does not explicitly disclose: wherein the host code comprises a modification to an entry point. However, CUDA_C discloses: wherein the host code comprises a modification to an entry point ( PNG media_image7.png 772 580 media_image7.png Greyscale ). As pointed out hereinabove, CUDA_C is an analogous art to the claimed invention. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of CUDA_C into the combined teachings of Martin and Hines to include “wherein the host code comprises a modification to an entry point.” The modification would be obvious because one of ordinary skill in the art would be motivated to modify host code to be compiled (CUDA_C, page 15). As per Claim 7, the rejection of Claim 1 is incorporated; and the combination of Martin and Hines does not explicitly disclose: wherein the host code comprises one or more variables and captures the one or more variables by explicitly passing values of the one or more variables to a constructor of the host code. However, CUDA_C discloses: wherein the host code comprises one or more variables and captures the one or more variables by explicitly passing values of the one or more variables to a constructor of the host code ( PNG media_image8.png 541 582 media_image8.png Greyscale ). As pointed out hereinabove, CUDA_C is an analogous art to the claimed invention. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of CUDA_C into the combined teachings of Martin and Hines to include “wherein the host code comprises one or more variables and captures the one or more variables by explicitly passing values of the one or more variables to a constructor of the host code.” The modification would be obvious because one of ordinary skill in the art would be motivated to prepare a new object for use, often accepting arguments that a constructor uses to set required member variables. Claims 15 and 17 are one or more processors claims corresponding to the method claims hereinabove (Claims 5 and 7, respectively). Therefore, Claims 15 and 17 are rejected for the same reasons set forth in the rejections of Claims 5 and 7, respectively. Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Martin in view of Hines as applied to Claim 18 above, and further in view of “Nvidia: CUDA Programming Model Overview,” 2006 (hereinafter “Nvidia”) and “CUDA C PROGRAMMING GUIDE,” October 2012 (hereinafter “CUDA_C”). As per Claim 20, the rejection of Claim 18 is incorporated; and the combination of Martin and Hines does not explicitly disclose: wherein the host code comprises an address of a function enclosing an entry point. However, Nvidia discloses: wherein the host code comprises an address of a function enclosing an entry point ( PNG media_image5.png 722 965 media_image5.png Greyscale ). As pointed out hereinabove, Nvidia is an analogous art to the claimed invention. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Nvidia into the combined teachings of Martin and Hines to include “wherein the host code comprises an address of a function enclosing an entry point.” The modification would be obvious because one of ordinary skill in the art would be motivated to target portions of code for execution on a device (Nvidia, slide 17). The combination of Martin, Hines, and Nvidia does not explicitly disclose: wherein the host code comprises a unique integer associated with the entry point. However, CUDA_C discloses: wherein the host code comprises a unique integer associated with the entry point ( PNG media_image6.png 495 569 media_image6.png Greyscale ). As pointed out hereinabove, CUDA_C is an analogous art to the claimed invention. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of CUDA_C into the combined teachings of Martin, Hines, and Nvidia to include “wherein the host code comprises a unique integer associated with the entry point.” The modification would be obvious because one of ordinary skill in the art would be motivated to give a unique CUDA thread ID that is accessible with a kernel (CUDA_C, page 7). Response to Arguments Applicant’s arguments with respect to Claims 1, 9, and 18 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the arguments. Conclusion Applicant’s amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action. Any inquiry concerning this communication or earlier communications from the Examiner should be directed to Qing Chen whose telephone number is 571-270-1071. The Examiner can normally be reached on Monday through Friday from 9:00 AM to 5:00 PM ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, the Applicant is encouraged to use the USPTO Automated Interview Request (AIR) at https://www.uspto.gov/ interviewpractice. If attempts to reach the Examiner by telephone are unsuccessful, the Examiner’s supervisor, Wei Mui, can be reached at 571-272-3708. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for more information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO customer service representative, call 800-786-9199 (in USA or Canada) or 571-272-1000. /Qing Chen/ Primary Examiner, Art Unit 2191
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Prosecution Timeline

Feb 27, 2019
Application Filed
Sep 09, 2019
Non-Final Rejection — §101, §103
Nov 15, 2019
Applicant Interview (Telephonic)
Dec 09, 2019
Response Filed
Jan 31, 2020
Final Rejection — §101, §103
May 14, 2020
Request for Continued Examination
May 18, 2020
Response after Non-Final Action
Jul 15, 2020
Non-Final Rejection — §101, §103
Nov 09, 2020
Applicant Interview (Telephonic)
Nov 10, 2020
Examiner Interview Summary
Jan 11, 2021
Response Filed
Apr 14, 2021
Examiner Interview (Telephonic)
Apr 19, 2021
Final Rejection — §101, §103
Oct 04, 2021
Applicant Interview (Telephonic)
Oct 04, 2021
Examiner Interview Summary
Oct 18, 2021
Request for Continued Examination
Oct 21, 2021
Response after Non-Final Action
Dec 08, 2021
Non-Final Rejection — §101, §103
Jun 13, 2022
Response Filed
Sep 09, 2022
Final Rejection — §101, §103
Mar 15, 2023
Notice of Allowance
Aug 15, 2023
Response after Non-Final Action
Aug 28, 2023
Response after Non-Final Action
Dec 07, 2023
Response after Non-Final Action
Dec 17, 2023
Non-Final Rejection — §101, §103
May 02, 2024
Applicant Interview (Telephonic)
May 02, 2024
Examiner Interview Summary
May 22, 2024
Response Filed
Jun 16, 2024
Final Rejection — §101, §103
Nov 21, 2024
Notice of Allowance
Apr 21, 2025
Request for Continued Examination
May 02, 2025
Response after Non-Final Action
Jul 24, 2025
Non-Final Rejection — §101, §103
Aug 15, 2025
Interview Requested
Aug 21, 2025
Applicant Interview (Telephonic)
Aug 21, 2025
Examiner Interview Summary
Jan 15, 2026
Response Filed
Feb 22, 2026
Final Rejection — §101, §103
Mar 24, 2026
Interview Requested
Mar 30, 2026
Applicant Interview (Telephonic)
Mar 31, 2026
Examiner Interview Summary

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

11-12
Expected OA Rounds
80%
Grant Probability
99%
With Interview (+51.9%)
2y 10m
Median Time to Grant
High
PTA Risk
Based on 678 resolved cases by this examiner. Grant probability derived from career allow rate.

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