Prosecution Insights
Last updated: July 17, 2026
Application No. 16/413,046

Method and Apparatus for Stacking Printed Circuit Board Assemblies with Single Reflow

Non-Final OA §103§112
Filed
May 15, 2019
Examiner
GAMINO, CARLOS J
Art Unit
1735
Tech Center
1700 — Chemical & Materials Engineering
Assignee
Jabil Inc.
OA Round
9 (Non-Final)
35%
Grant Probability
At Risk
9-10
OA Rounds
0m
Est. Remaining
81%
With Interview

Examiner Intelligence

Grants only 35% of cases
35%
Career Allowance Rate
261 granted / 739 resolved
-29.7% vs TC avg
Strong +46% interview lift
Without
With
+45.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
33 currently pending
Career history
782
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
86.1%
+46.1% vs TC avg
§102
3.1%
-36.9% vs TC avg
§112
4.6%
-35.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 739 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 5/19/26 has been entered. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 17 and 18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claims 17 and 18 recites “the transferring solder paste on the top PCB is done using a (gang) pin transfer device in cooperation with the pick and place machine” while claim 15 recites “transferring, using the pick and place machine, solder paste onto the top PCB”. It is unclear as to how the solder paste can be transferred by different devices, if there is additional solder paster transferred, or if the pin transfer device is part of the pick and place machine. For the purposes of this examination, this limitation will be interpreted as the pin transfer device is part of the pick and place machine. Claim Rejections - 35 USC § 103 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claims 1-3, 7, 15-17, 19, 21, and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Kledzik et al. (US 2003/0165051 A1) in view of Okamoto et al. (US 2010/023072 A1), Häcker Automation GmbH, “Pin Transfer of Solder Paste and Pick + Place of SMD components on PCB”, and Wischoffer ““0201 Parts (0.25 Mm X 0.125 Mm, 008004”) “Arrived on the Scene in Order to Make the Technology for Future Device Terminals Possible”. Regarding claim 1, Kledzik teaches: A method for printed circuit board (PCB) assembly (PCBA) stacking comprising: picking and placing, using a pick and place machine, a first surface mount technology (SMT) components [BGA devices (139) having balls/bumps; figures 10, 11, and 16] on the bottom PCB [circuit board (140); 0065, 0072]; picking and placing, using a pick and place machine, a middle PCB [carrier (141) having balls (37)] directly on the bottom PCB [0072]; picking and placing, using a pick and place machine, the top PCB [carrier (149) having balls] on the middle PCB [0072]; picking and placing SMT, using a pick and place machine, component [BGA device (153) having balls/bumps] on the top PCB to form a stacked assembly [0072]; and reflowing the stacked assembly in a single reflow [0072]. Kledzik does not teach: depositing, using a pick and place machine, a first solder paste on a bottom PCB; after depositing the first solder paste on the bottom PCB, inspecting the first solder paste for proper solder paste deposition on the bottom PCB; after depositing a first solder paste on the bottom PCB, depositing, using the pick and place machine, a second solder paste on the middle PCB; after depositing the second solder paste on the middle PCB, inspecting the second solder paste for proper solder paste deposition on the middle PCB; after depositing the second solder paste and before picking and placing a top PCB on the middle PCB, inspecting, using an automated optical inspection system (AOI), a respective placement of the first SMT components on the bottom PCB, a respective placement of the middle PCB on the bottom PCB, and the first SMT components to check for a missing component of the first SMT components; after depositing a second solder paste on the middle PCB, depositing, using the pick and place machine, a third solder paste on the top PCB; after depositing the third solder paste on the top PCB, inspecting the third solder paste for proper solder paste deposition on the top PCB; picking and placing second SMT components on the top PCB; using the same pick and place machine for all picking, placing, and depositing steps; and after picking and placing the second SMT components on the top PCB, inspecting, using the AOI, a respective placement for each respective PCB and the second SMT components for a missing component of the second SMT components, wherein at least one of the first SMT components or the second SMT components have a 0201 package size or have a package size smaller than the 0201 package size. Concerning the use of solder paste the inspection thereof: Okamoto teaches soldering electronic component (16) having bumps (16a) to board (5) having electrodes (5a) wherein solder paste (7) is applied to the electrodes and inspected, the component bumps are placed onto the paste, and the assembly is reflowed; figures 1, 8, 9A-B, and 11A-C. Note that it is extremely well-known in the art to use paste to facilitate the soldering of bumped components in order to provide a flux to allow wetting of the solder, to provide additional solder, to provide alloying elements, to provide temporary adhesion, and/or to provide the solder that is to be reflowed. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to apply paste for soldering all of the Kledzik bumps as taught by Okamoto in order to provide a flux to allow wetting of the solder, to provide additional solder, to provide alloying elements, to provide temporary adhesion, and/or to provide the solder that is to be reflowed. It also would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the Okamoto paste inspection concept into Kledzik in order to inspect the applied paste after each application for any deficiencies so that they may be corrected before proceeding. Concerning the use of the same pick and place machine: Hacker teaches a single device that pin transfers solder paste onto a PCB and picks and places different components on the transferred paste and the smallest size component is (0.3 X 0.3)mm, i.e. smaller than 0201; watch video. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use the Hacker pick and place machine since it can apply paste and pick and place components of various sizes/types in the applied paste, minus any unexpected results. Additionally, one would have been motivated to use this machine in order to save space or to do small batches. In doing so, the same pick and place machine would be used for all picking, placing, and depositing steps. Concerning the 0201/008004 package size: It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate and/or replace the SMT components of Kledzik with the 0201/008004 packages or smaller in order to further miniaturize the PCBA or manufacture a desired assembly. Concerning the number of components: While Kledzik only teaches placing a single BGA device on carrier (149) it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to place as many BGA devices/0201/008004 packages as needed in order to assemble a desired array/PCBA, minus any unexpected results. Furthermore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to place any number of components/electrical members in any desired configuration in order to make a desired PCBA, minus any unexpected results. Concerning the AOI : Wischoffer teaches using AOI to inspect for missing parts, placing deviations, and upside-down parts and that inspection should be done between each process; pages 6 and 22-26. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate an AOI system into the prior PCBA process, the process based on the combination of the above references, and to inspect the process at any point, including after the depositing of any solder paste and the placing of any component/element, in order to identify missing components/elements. Regarding claim 15, all of the limitations of this claim are addressed in the rejection of claim 1. Regarding claims 2 and 16, Kledzik does not teach: depaneling the stacked assembly to form stacked assembly PCBs. The examiner notes that depaneling is a well-known process in the art since it is an art specific term and depaneling devices can be readily bought. Since the applicant did not traverse the examiner’s assertion of official notice, the examiner notes that the above well-known fact in the art statement is taken to be admitted prior art because applicant failed to traverse the examiner’s assertion of official notice. Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to manufacture a panel circuit board assembly that can be singulated/depaneled into individual Kledzik PCBs after the reflow step in order to increase production. Regarding claims 3, 7, 17, 19, 21, and 22, these claims are addressed in the rejections of claims 1 or 15. Claims 4 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Kledzik et al. (US 2003/0165051 A1) in view of Okamoto et al. (US 2010/023072 A1), Häcker Automation GmbH, “Pin Transfer of Solder Paste and Pick + Place of SMD components on PCB”, and Wischoffer ““0201 Parts (0.25 Mm X 0.125 Mm, 008004”) “Arrived on the Scene in Order to Make the Technology for Future Device Terminals Possible”, as applied to claims 1 and 15 above, and in further view of Amir et al. (US 2019/0221456 A1) Regarding claims 4 and 18, Kledzik does not teach: wherein depositing the first solder paste, the second solder paste, and the third solder paste are done with a gang pin transfer process using the pick and place device machine; or wherein the transferring solder paste on the bottom PCB, the transferring solder paste on the middle bottom PCB, and the transferring solder paste on the top PCB is done using a gang pin transfer device in cooperation with the pick and place device machine. Amir teaches using paste transfer tool (201) having a plurality pins (205) so that paste is applied to a plurality of pads simultaneously; figures 2E-G. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the Amir tool into the prior art process in order to speed up the paste transferring step. Response to Arguments Applicant's arguments filed 5/19/26 have been fully considered but they are not persuasive. Note that the applicant’s arguments drawn to the new limitations are addressed by the incorporation of Okamoto. The applicant argues, “the Office Action's stated motivation for combining Hacker with Kledzik is to "save space or to do small batches." Applicant submits that this motivation is generic and does not specifically address why one of ordinary skill in the art would apply Hacker's single-level pin transfer machine to deposit solder paste at each of three successive PCB levels in a PCBA stacking assembly.” This argument is a matter of opinion and fails to provide any rational reason why the motivation is not sufficient. In response to applicant's argument that the examiner's conclusion of obviousness is based upon improper hindsight reasoning, it must be recognized that any judgment on obviousness is in a sense necessarily a reconstruction based upon hindsight reasoning. But so long as it takes into account only knowledge which was within the level of ordinary skill at the time the claimed invention was made, and does not include knowledge gleaned only from the applicant's disclosure, such a reconstruction is proper. See In re McLaughlin, 443 F.2d 1392, 170 USPQ 209 (CCPA 1971). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CARLOS J GAMINO whose telephone number is (571)270-5826. The examiner can normally be reached M-F 9-6. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Keith Walker can be reached at 5712723458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CARLOS J GAMINO/Examiner, Art Unit 1735 /KEITH WALKER/Supervisory Patent Examiner, Art Unit 1735
Read full office action

Prosecution Timeline

Show 21 earlier events
Jun 26, 2025
Response after Non-Final Action
Sep 17, 2025
Non-Final Rejection mailed — §103, §112
Dec 11, 2025
Response Filed
Mar 19, 2026
Final Rejection mailed — §103, §112
May 19, 2026
Response after Non-Final Action
Jun 17, 2026
Request for Continued Examination
Jun 18, 2026
Response after Non-Final Action
Jun 25, 2026
Non-Final Rejection mailed — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

9-10
Expected OA Rounds
35%
Grant Probability
81%
With Interview (+45.6%)
3y 2m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 739 resolved cases by this examiner. Grant probability derived from career allowance rate.

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