CTFR 16/803,887 CTFR 86121 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 112 07-30-02 AIA The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 07-34-01 Claim 22 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. With respect to claim 22, the recitation of “an integrated heat spreader (IHS)…” renders the claim as indefinite, “an integrated heat spreader” is already presented in claim 20 and the limitations of claim 22 appear to be already integrated into the claim limitations of claim 20. Clarification is required. Claim Rejections - 35 USC § 102 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15-aia AIA Claim(s) 1, 7, 11-12 and 24 is/are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Huang et al. (U.S. Publication No. 2020/0075527 A1; hereinafter Huang) With respect to claim 1, Huang discloses (in Figure 6) an electronic package, comprising: a package substrate [121/123/125]; an interposer [111] over the package substrate, wherein the interposer comprises a ceramic (See ¶[0024]); a first die [101] over the interposer; a second die [101] over the interposer, wherein the first die and the second die are electrically coupled together by the interposer (see ¶[0025-0027]); an insulating layer [107] laterally adjacent to and in contact with the first die and the second die, the insulating layer continuous between the first die and the second die; a thermal interface material [135] over the first die, over the second die, and over the insulating layer, the thermal interface material in contact with the first die, the second die, and the insulating layer; and an integrated heat spreader (IHS) [137] on the thermal interface material (see Figure 6 and ¶[0061]). With respect to claim 7, Huang discloses wherein the second die comprises a plurality of vertically stacked chiplets (See ¶[0019]). With respect to claim 11, Huang discloses wherein the first die is a processor die and the second die is a memory die (see Huang ¶[0016]). With respect to claim 12, Huang discloses wherein the IHS comprises supports [131] that are attached to the package substrate (See Figure 6). Wang With respect to claim 24, Huang discloses an electronic system, comprising: a board [121]; a package substrate [123/125] attached to the board; an interposer [111] attached to the package substrate, wherein the interposer comprises a thermally conductive ceramic (See ¶[0024]); a plurality of dies [101] attached to the interposer; a pedestal [109] extending away from the interposer and adjacent to the plurality of dies, wherein the pedestal and the interposer are a monolithic part (see ¶[0030]; monolithic is defined (of solid-state circuit) composed of active and passive components formed in a single chip); an insulating layer [107] laterally adjacent to and in contact with the plurality of dies, the insulating layer continuous between adjacent ones of the plurality of dies; a thermal interface material [135] over the plurality of dies and over the insulating layer, the thermal interface material in contact with the first die, the second die, and the insulating layer; and an integrated heat spreader (IHS) [137] thermally coupled to the plurality of dies and the pedestal by the thermal interface material (See Figure 6) . Claim Rejections - 35 USC § 103 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-23-aia AIA The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. 07-20-02-aia AIA This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. 07-21-aia AIA Claim (s) 2-3 and 5-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Huang in view of Wang et al. (U.S. Publication No. 2016/0049361 A1; hereinafter Wang) . With respect to claim 2, Huang fails to disclose a pedestal over the interposer. In the same field of endeavor, Wang teaches a pedestal [112] in [116] over the interposer (See Figure 2). Implementation of a pedestal structure, as taught by Wang, increases structural rigidity of the overall device (see ¶[0033]). Therefore, it would have been obvious to one of ordinary skill in the art at the time of invention that the combination of references would arrive at the claimed invention. With respect to claim 3, the combination of Huang and Wang discloses wherein the pedestal is between the first die and the second die (see Wang Figure 2). With respect to claim 5, the combination of Huang and Wang discloses wherein the pedestal and the interposer are a monolithic structure (see Figure 2; monolithic is defined (of solid-state circuit) composed of active and passive components formed in a single chip). With respect to claim 6, the combination of Huang and Wang discloses wherein the pedestal is thermally coupled to the IHS [158] (See Wang Figure 2) . 07-21-aia AIA Claim (s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Huang in view of Tonomura et al. (U.S. Publication No. 2010/0258233 A1; hereinafter Tonomura) With respect to claim 10, Huang fails to disclose wherein the ceramic comprises silicon and carbon, silicon and nitrogen, aluminum and carbon, aluminum and nitrogen, or beryllium and oxygen. In the same field of endeavor, Tonomura teaches wherein the ceramic comprises silicon and carbon, silicon and nitrogen, aluminum and carbon, aluminum and nitrogen, or beryllium and oxygen (see ¶[0077]). Implementation of a silicon nitride ceramic as taught by Tonomura allows for aggressive heat cycling while maintaining structural integrity (See Tonomura ¶[0123]). Therefore, it would have been obvious to one of ordinary skill in the art at the time of invention that the combination of references would arrive at the claimed invention . 07-21-aia AIA Claim (s) 14 and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang in view of Huang . With respect to claim 14, Wang discloses (in Figures 1 and 2) an interposer, comprising: a substrate [114] with a first surface [130] and a second surface [122] (See Figure 2) wherein the substrate comprises a thermally conductive ceramic material (see ¶[0026]); a pedestal [16] over the second surface of the substrate (See Figure 1), wherein the pedestal and the substrate are a single continuous structure (see Figure 1; pedestal and substrate [14] do not have a separation, i.e., continuous); a first die [24] over the substrate; a second die [24] over the substrate, wherein the pedestal is laterally between the first die and the second die; a plurality of through substrate vias (TSVs) [134] (See ¶[0034]) through the substrate; an insulating layer [158] laterally adjacent to and in contact with the pedestal (See Figure 2 and ¶[0030]); Wang fails to disclose a thermal interface material over the first die, over the second die, over the pedestal and over the insulating layer, the thermal interface material in contact with the first die, the second die, the pedestal and the insulating layer; and an integrated heat spreader (IHS) on the thermal interface material, however does disclose integrating thermal interface material within [158] (See ¶[0045]). In the same field of endeavor, Huang teaches a thermal interface material [135] over the first die [101], over the second die [101], over the pedestal [107/109] and over the insulating layer [107], the thermal interface material in contact with the first die, the second die, the pedestal and the insulating layer; and an integrated heat spreader (IHS) [137] on the thermal interface material (See Figure 6). Implementation of a thermal interface and IHS above the interposer of Wang, as taught by Huang allows for more efficient heat dissipation from the die structures as desired by Wang (See ¶[0059]). Furthermore, integration of Huang’s thermal interface and IHS would align in contact with the die structures and surrounding thermal material as the thermal material would be integrated into the insulating material of Wang (See Wang ¶[0045]). Therefore, it would have been obvious to one of ordinary skill in the art at the time of invention that the combination of references would arrive at the claimed invention With respect to claim 19, the combination of Wang and Huang discloses wherein the pedestal is set back from an edge of the substrate (See Wang Figure 1 and 2) . 07-22-aia AIA Claim (s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang in view of Huang as applied to claim 14 above, and further in view of Tonomura. With respect to claim 17, the combination of Wang and Huang fails to disclose wherein the substrate comprises silicon and carbon, silicon and nitrogen, aluminum and carbon, aluminum and nitrogen, or beryllium and oxygen . In the same field of endeavor, Tonomura teaches wherein the substrate comprises silicon and carbon, silicon and nitrogen, aluminum and carbon, aluminum and nitrogen, or beryllium and oxygen (see ¶[0077]). Implementation of a silicon nitride ceramic substrate as taught by Tonomura allows for aggressive heat cycling while maintaining structural integrity (See Tonomura ¶[0123]). Therefore, it would have been obvious to one of ordinary skill in the art at the time of invention that the combination of references would arrive at the claimed invention . 07-21-aia AIA Claim (s) 20-22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang in view of Huang and Katkar et al (U.S. Patent No. 9,355,997 B2; hereianfter Katkar) With respect to claim 20, Wang discloses a module, comprising: a ceramic interposer [114] (see Figure 2); a first die [124] attached to the ceramic interposer, wherein the first die has a first thermal resistance; a second die [124] attached to the ceramic interposer (See Figure 2), a pedestal [116] attached to the ceramic interposer (See Figure 2); an insulating layer [158/112] laterally adjacent to and in contact with the first die, the second die, and the pedestal, the insulating layer continuous between the first die and the second die; a thermal interface material [158] over the first die, over the second die, over the pedestal, and over the insulating layer (See ¶[0045]; over side walls and upper surfaces), Wang fails to disclose wherein the second die has a second thermal resistance that is higher than the first thermal resistance; the thermal interface material in contact with the first die, the second die, and the insulating layer; and an integrated heat spreader (IHS) on the thermal interface material. In the same field of endeavor, Katkar teaches two dies with differing thermal resistance with a second thermal resistance of the second die [130.1] being higher than the first thermal resistance of the first die [1310.2] (see Figure 15A) Furthermore, Huang teaches a thermal interface material [135] over the first die [101], over the second die [101], over the pedestal [107/109] and over the insulating layer [107], the thermal interface material in contact with the first die, the second die, the pedestal and the insulating layer; and an integrated heat spreader (IHS) [137] on the thermal interface material (See Figure 6). Implementation of a thermal interface and IHS above the interposer of Wang, as taught by Huang allows for more efficient heat dissipation from the die structures as desired by Wang (See ¶[0059]). Furthermore, integration of Huang’s thermal interface and IHS would align in contact with the die structures and surrounding thermal material as the thermal material would be integrated into the insulating material of Wang (See Wang ¶[0045]). The additional thermal dissipation would aid in scenarios of differing thermal resistance, as taught by Katkar, and thereby allowing for proper heat dissipation and thermal resistance (See Katkar Column 11, lines 21-33). Therefore, it would have been obvious to one of ordinary skill in the art at the time of invention that the combination of references would arrive at the claimed invention With respect to claim 21, the combination of Wang, Huang and Katkar discloses wherein the second die [1310.1] comprises a plurality of vertically stacked chiplets (See Katkar Figure 15A and Huang ¶[0019]). With respect to claim 22, the combination of Wang, Huang and Katkar discloses an integrated heat spreader (IHS) thermally coupled to the first die, the second die, and the pedestal by a thermal interface material (see Huang Figure 6) . Response to Arguments 07-38 Applicant's arguments with respect to claim s 1-3, 5-7, 10-12, 14, 17, 19-22, and 24 have been considered but are moot in view of the new ground(s) of rejection. Conclusion 07-40 AIA Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL . See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JONATHAN HAN whose telephone number is (571)270-7546. The examiner can normally be reached 9.00-5.00PM PST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, STEVEN LOKE can be reached at 571-272-1657. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JONATHAN HAN/Primary Examiner, Art Unit 2818 Application/Control Number: 16/803,887 Page 2 Art Unit: 2818 Application/Control Number: 16/803,887 Page 3 Art Unit: 2818 Application/Control Number: 16/803,887 Page 4 Art Unit: 2818 Application/Control Number: 16/803,887 Page 5 Art Unit: 2818 Application/Control Number: 16/803,887 Page 6 Art Unit: 2818 Application/Control Number: 16/803,887 Page 7 Art Unit: 2818 Application/Control Number: 16/803,887 Page 8 Art Unit: 2818 Application/Control Number: 16/803,887 Page 9 Art Unit: 2818 Application/Control Number: 16/803,887 Page 10 Art Unit: 2818 Application/Control Number: 16/803,887 Page 11 Art Unit: 2818 Application/Control Number: 16/803,887 Page 12 Art Unit: 2818 Application/Control Number: 16/803,887 Page 13 Art Unit: 2818
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