DETAILED ACTION
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference characters "224" and "204" have both been used to designate conformal metal layer. See, for example, FIG. 2H and FIG. 3J, which shows element 224 in FIG. 2H and element 204 in FIG. 3J pointing to the same conformal layer. Also, see, for example, FIG. 3I and FIG. 3J wherein the element 204 is pointing to two different layers. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “wherein the encapsulation material surrounds and directly contacts the semiconductor substrate on all sides including the bottom surface of the semiconductor substrate (claim 21), and “wherein the encapsulation material directly contacts the bottom surface of the semiconductor substrate and forms a bottom surface of the semiconductor packaging system.” (claim 22) must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
In the corrected drawing FIG. 2H that was filed on 1/27/22, the applicant shows an
encapsulation material 214 that only directly contacts the lateral sides of the semiconductor substrate 202 that does not include the bottom surface of the semiconductor substrate 202, but instead shows an insulating layer 226 that directly contacts the bottom surface of the semiconductor substrate.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 21, and 22 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
The specification does not describe “wherein the encapsulation material surrounds and
directly contacts the semiconductor substrate on all sides including the bottom surface of the semiconductor substrate.” For example, in FIG. 2H, the applicant shows an encapsulation material 214 directly contacts the semiconductor substrate 202 on only the lateral sides, and does not include the bottom surface of the semiconductor substrate 202.
The same applies to claim 22, which states “wherein the encapsulation material directly contacts the bottom surface of the semiconductor substrate and forms a bottom surface of the semiconductor packaging system.”
Claims 21, and 22 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 21 is contradictory to claim 1 as claim 21 states “wherein the encapsulation material surrounds and directly contacts the semiconductor substrate on all sides including the bottom surface of the semiconductor substrate.”, but in claim 1, the applicant states “an insulating layer encapsulating the semiconductor substrate and at least a portion of the encapsulation material, wherein the insulating layer is disposed on a bottom surface of the encapsulation material and on a bottom surface of the semiconductor substrate, and the bottom surface of the encapsulation material is coplanar with the bottom surface of the semiconductor substrate.” FIG. 2H shows an insulating layer 226 that directly contacts the bottom surface of the semiconductor substrate 202, not the encapsulation material 214. Appropriate clarification and/or correction are required.
The same applies to claim 22, which states “wherein the encapsulation material directly contacts the bottom surface of the semiconductor substrate and forms a bottom surface of the semiconductor packaging system.”, which also contradicts claim 1. Appropriate clarification and/or correction are required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
In view of the 112 rejection above, claim(s) 1, and 21 thru 23 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fazelpour US 2011/0204515 A1 in view of Stacey US 2012/0199967 A1 in view of Scanlan et al. US 2016/0086825 A1. Fazelpour discloses (see, for example, FIG. 3A) a semiconductor package system 300 comprising a semiconductor substrate 105, and further discloses (see, for example, paragraph [0028]) the top semiconductor surface 107 comprising an active region having active circuitry 109(a) and 109(b). An encapsulation material 312 at least partially encapsulates the semiconductor substrate 105 and a portion of the active region, the encapsulation material 312 has a cavity extending through to an upper surface of the active region. The redistribution layer structure 327 is positioned over an upper surface of the encapsulation material 312, and includes a conformal layer 327 lining a bottom surface and sidewalls of the cavity and extending partially above the upper surface of the encapsulation material 312. The conformal layer 327 electrically connects the active region having active circuitry 109(a) and 109(b) to the RDL structure 327. A dielectric material 319 is disposed above the conformal layer 327 and above portions of the upper surface of the encapsulation material 312 without the conformal layer 327, the dielectric layer 319 filling the cavity, wherein at least a portion of the RDL 327 is in electrical contact with the active region of the semiconductor device through the conformal layer 327. In paragraph [0029], Fazelpour discloses the dielectric material 319 includes BCB, which is a type of imageable dielectric layer.
Fazelpour does not specifically disclose the conformal layer being a conformal metal layer. However, Stacey discloses (see, for example, Figure 1, and paragraph [0038]) a semiconductor package system comprising a conformal metal layer 4. It would have been obvious to one of ordinary skill in the art, at a time prior to the effective filing date, to have a conformal layer being a conformal metal layer in order to provide high electrical conductivity between the semiconductor substrate and other regions of a semiconductor package system.
Fazelpour in view of Stacey does not disclose an insulating layer encapsulating the semiconductor substrate and at least a portion of the encapsulation material, wherein the insulating layer is disposed on a bottom surface of the encapsulation material and on a bottom surface of the semiconductor substrate, and the bottom surface of the encapsulation material is coplanar with the bottom surface of the semiconductor substrate. However, Scanlan discloses (see, for example, FIG. 19) a semiconductor package system 300 comprising an encapsulation material 366, and an insulating layer 384. In paragraph [0135], Scanlan discloses the insulating layer 384 includes a dielectric film. It would have been obvious to one of ordinary skill in the art, at a time prior to the effective filing date, to have an insulating layer encapsulating the semiconductor substrate and at least a portion of the encapsulation material, the insulating layer is disposed on a bottom surface of the encapsulation material and on a bottom surface of the semiconductor substrate, wherein the bottom surface of the encapsulation material is coplanar with the bottom surface of the semiconductor substrate in order to protect the bottom surface of the semiconductor substrate.
Regarding claim 21, and 22, see, for example, FIG. 18 wherein Scanlan discloses the encapsulation material 366 surrounds and directly contacts the semiconductor substrate 334 on all sides including the bottom surface of the semiconductor substrate 334. Also see 112 rejections above.
Regarding claim 23, see, for example, FIG. 3A wherein Fazelpour discloses a solder ball 310(a). In Figure 1, Stacey discloses a conformal metal layer 4/8/7 that extends above the upper surface of an encapsulation material 3, portions of the conformal metal layer disposed within the dielectric material 5 and portions of the conformal metal layer extending, at least partially, above an upper surface of the dielectric material 5. Further, it would have been obvious to one of ordinary skill in the art to have portions of the conformal metal layer disposed within the dielectric material and portions of the conformal metal layer extending, at least partially, above an upper surface of the dielectric material in order to have a contiguous material that avoids discontinuities and/or defects, and thereby reduce effects such as noise, high impedance, etc.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1, and 21-23 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Regarding applicant’s arguments towards the Scanlan reference, this is not persuasive since Scanlan is only used as a secondary reference to show that including the insulating layer of Scanlan into the primary reference of Fazelpour would have been obvious to one of ordinary skill in the art for protecting the bottom surface of the semiconductor substrate. The applicant’s arguments on the bottom of page 9 that “the dielectric material of the RDL structure comprises only a single photo-imageable dielectric (PID) layer,”, “the dielectric material directly contacts portions of the upper surface of the encapsulation material outside the cavity without an intervening dielectric layer, and”, and “an insulating layer is disposed on a bottom surface of the encapsulation material and on a bottom surface of the semiconductor substrate, wherein the bottom surface of the encapsulation material is coplanar with the bottom surface of the semiconductor substrate.” are not persuasive since these limitations are all disclosed in Fazelpour US 2011/0204515 A1, while Scanlan et al. US 2016/0086825 A1 discloses the insulating layer disposed on a bottom surface of the encapsulation material and on a bottom surface of the semiconductor substrate, and therefore, Fazelpour (with Stacey) in combination with Scanlan still reads on the applicant’s claims.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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Eugene Lee
June 9, 2026
/EUGENE LEE/Primary Examiner, Art Unit 2815
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