DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-18, 20, and 21 are pending and prosecuted.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-6, 9, 11-17, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Jeong, US Patent Publication 2020/0159287, in further view of Xu et al., US Patent Publication 2021/0367026, henceforth known as Xu, and in further view of Hiroki, US Patent Publication 2016/0118616, and in further view of Zhang, US Patent Publication 2021/0366933.
Regarding Claim 1, Jeong discloses A functional panel (Abstract; Display Device) comprising:
a first region (Figure 2E; [0053-0055]; the examiner considers a “first region” as an area between first bending axis BX1 and second bending axis BX2);
a second region(Figure 2C and 2E; [0053-0055]; the examiner considers a “second region” as an area to the right edge of the display device to the first bending axis BX2, as seen in Figure 2C); and
a third region between the first region and the second region (Figure 2E and 9; [0053-0055]; [0132-0161]; the examiner considers a “third region” to be between said “first region” and “second region” that includes bending axis BX2 ,
wherein the functional panel comprises a functional layer (Figure 2E, 5, 6, 8, and 9; [0053-0055]; [0070]; [0073]; [0086-0103]; [0112-0161]; a Display module DM that includes a display panel DP, as seen in Figure 8. The display panel includes a circuit layer CL and a light emitting element layer ELL, which the examiner considers as the functional layer)
wherein the third region is bendable (Figure 2E and 9; [0053-0055]; [0132-0161]; the “third area” that includes the bending axis BX2 can be in-folded and out-folded with respect to the first bending axis BX2),
wherein the first region comprises:
a first portion of the functional layer, the first portion comprising a first plurality of light-emitting elements in matrix (Figure 2E, 5, 6, 8, and 9; [0053-0055]; [0070]; [0073]; [0086-0103]; [0112-0161]; the “first region” as seen in Figure 9, has a Display module DM that includes a display panel DP, as seen in Figure 8. The display panel includes a circuit layer CL and a light emitting element layer ELL, which the examiner considers as the functional layer. The display panel DP comprises of a plurality of pixels circuit, as seen in Figure 6, arranged in a matrix, as seen in Figure 5, in the circuit layer CL. Each of the pixel circuits comprise of an OLED (light-emitting element)),
a first base (Figure 2E, 8, and 9; [0053-0055]; [0070]; [0112-0161]; a base layer BL), and
wherein the second region comprises:
a second portion of the functional layer, the second portion comprising a second plurality of light-emitting elements in matrix (Figure 2E, 5, 6, 8, and 9; [0053-0055]; [0070]; [0073]; [0086-0103]; [0112-0161]; the “second region” as seen in Figure 9, has a Display module DM that includes a display panel DP, as seen in Figure 8. The display panel includes a circuit layer CL and a light emitting element layer ELL, which the examiner considers as the functional layer. The display panel DP comprises of a plurality of pixels circuit, as seen in Figure 6, arranged in a matrix, as seen in Figure 5, in the circuit layer CL. Each of the pixel circuits comprise of an OLED (light-emitting element)),),
a second base (Figure 2E, 8, and 9; [0053-0055]; [0070]; [0112-0161]; a base layer BL), and
wherein the third region comprises: a third portion of the functional layer comprising a third plurality of light-emitting elements in a matrix (Figure 2E, 5, 6, 8, and 9; [0053-0055]; [0070]; [0073]; [0086-0103]; [0112-0161]; the “third region” as seen in Figure 9, has a Display module DM that includes a display panel DP, as seen in Figure 8. The display panel includes a circuit layer CL and a light emitting element layer ELL, which the examiner considers as the functional layer. The display panel DP comprises of a plurality of pixels circuit, as seen in Figure 6, arrange din a matrix, as seen in Figure 5, in the circuit layer CL. Each of the pixel circuits comprise of an OLED (light-emitting element)),,
wherein the functional layer further comprises a circuit and an insulating film (Figure 6, 8, and 9; [0053-0055]; [0070]; [0112-0161]; the “functional layer” comprises of a circuit layer CL that contains transistors TR1 and TR2, that are a part of the pixel circuit for driving the OLED as seen in Figure 6, and a buffer layer BFL (insulating film)),
wherein the circuit comprises a second conductive film (Figure 6, 8, and 9; [0053-0055]; [0070]; [0112-0161]; the circuit includes an active part of transistor ACL (second conductive film)),
wherein the third plurality of light-emitting elements comprises a first light-emitting elements (Jeong: Figure 6; [0073]; [0086-0103]; the display panel DP comprises of a plurality of pixels circuit, as seen in Figure 6, in the circuit layer CL. Each pixel circuit comprises of an OLED).
However, Jeong doesn’t explicitly disclose
wherein the first region comprises: a first bonding layer between the first portion and the first base,
wherein the second region comprises: a second bonding layer between the second portion and the second base,
wherein the third region comprises: a first conductive film, and a third bonding layer between the functional layer and the first conductive film,
wherein an area occupied by all of the third plurality of light-emitting elements is fully covered with an area occupied by the first conductive film,
wherein the insulating film is between the first conductive film and the second conductive film, and
wherein the first conductive film and the second conductive film form a capacitor.
Xu et al., US Patent Publication 2021/0367026, discloses the use of light shielding layer LS that is between a buffer layer 20 and a base substrate 10, that is forms a minimal additional capacitance between the light shielding layer LS and the gate electrode disposed above the buffer layer 20. The light shielding layer also being electrically connected to at least one or more power supply lines (Abstract; Figure 4; [0070];).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claim invention, to modify the disclosure of Jeong to further include the teachings of Xu in order to provide wherein the light blocking member BKL of Jeong is located to be between the buffer layer BFL and the base layer BL, and is used to provide a capacitance with the active part of transistor ACL. The motivation to combine these analogues arts is to provide reducing data loss in the display apparatus (Xu: [0070];).
Therefore, the combination of Jeong and Xu teaches the third region comprises a first conductive film (Jeong: Figure 2E, 8, and 9; [0053-0055]; [0070]; [0112-0161]; Xu: Abstract; Figure 4; [0070]; the “third region” comprises of light blocking member BKL (first conductive film)),
wherein the first conductive film is overlapped by each of the third plurality of light emitting elements (Jeong: Figure 2E, 8, and 9; [0053-0055]; [0070]; [0112-0161]; Xu: Abstract; Figure 4; [0070]; the light blocking member BKL (first conductive film) is located to be between the buffer layer BFL and the base layer BL, and is used to provide a capacitance with the active part of transistor ACL in a pixel circuit. Therefore, the OLED overlaps the light blocking member BKL (wherein the first conductive film is overlapped by the plurality of light-emitting elements). Furthermore, As seen in Figure 2E of Jeong, based on the folding of the display device, the light blocking member and the plurality of pixels circuits will overlap each other. The examiner additionally notes that having the light blocking layer underneath the transistor of a pixel circuit is identical to the arrangement of applicants first conductive film with respect to the plurality of pixels as shown in Figure 2B and 3 in Applicants in Drawings),
wherein the insulating film is between the first conductive film and the second conductive film (Jeong: Figure 2E, 8, and 9; [0053-0055]; [0070]; [0112-0161]; Xu: Abstract; Figure 4; [0070]; the buffer layer (insulating film) is between the active part of transistor ACL and the light blocking member BKL (second conductive film)), and
wherein the first conductive film and the second conductive film form a capacitor (Jeong: Figure 2E, 8, and 9; [0053-0055]; [0070]; [0112-0161]; Xu: Abstract; Figure 4; [0043]; [0070]; an additional capacitance, thus forming a capacitor, is formed between the active part of transistor ACL and the light blocking member BKL that allows for data loss in the display apparatus to be significantly reduced or eliminated).
However, the combination of Jeong and Xu doesn’t explicitly teach wherein the first region comprises: a first bonding layer between the first portion and the first base,
wherein the second region comprises: a second bonding layer between the second portion and the second base,
wherein the third region comprises: a third bonding layer between the functional layer and the first conductive film, and
wherein an area occupied by all of the third plurality of light-emitting elements is fully covered with an area occupied by the first conductive film.
Hiroki, US Patent Publication 2016/0118616, discloses the use of a bonding layer provided between a light-blocking layer 109 and a connection portion 106 of a flexible light-emitting device (Abstract; Figure 6A and 6B; [0122];).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the combinational disclosure of Jeong and Xu to further include the teachings of Hiroki such that a bonding layer is provided between the light blocking member BKL and the buffer layer BFL of the Circuit layer CL (functional layer) in order to provide wherein the first region comprises: a first bonding layer between the first portion and the first base, wherein the second region comprises: a second bonding layer between the second portion and the second base, wherein the third region comprises: a third bonding layer between the functional layer and the first conductive film. The motivation to combine these analogues arts is because Hiroki teaches the use of bonding layer for bonding a light-blocking layer to another component of a flexible light-emitting device (Hiroki: Figure 6A and 6B; [0122];).
However, the combination of Jeong, Xu, and Hiroki doesn’t explicitly teach wherein an area occupied by all of the third plurality of light-emitting elements is fully covered with an area occupied by the first conductive film.
Zhang, US Patent Publication 2021/0366933, teaches wherein a light shielding layer 113 is arranged between the buffer layer 121 and the substrate 111. Where the light shielding layer covers the entire substrate 111 except for areas in which light transmission holes 114 are located, which are used to allow light through to the imaging device 115 located underneath (Figure 3B and 3C; [0081-0082]; [0105-0106]).
Zhang’s teachings of having a light shielding layer that covers the entire substrate, except for areas where an imaging device 115 is located underneath, would have been recognized by one skilled in the art as applicable to the combination teachings of Jeong, Xu, and Hiroki’s light blocking member, and the results would have been predictable and resulted in having the light blocking member arranged to cover the entire base layer BL and without any holes, as the teachings of Jeong, Xu, and Hiroki do not describe a imaging device disposed underneath.
Therefore, the claimed subject matter of “wherein an area occupied by all of the third plurality of light-emitting elements is fully covered with an area occupied by the first conductive film” would have been obvious to one of ordinary skill in the art.
Regarding Claim 2, The combination of Jeong, Xu, Hiroki, and Zhang teaches further comprising a third base, wherein the first conductive film is between the third bonding layer and the third base (Jeong: Figure 2E, 8, and 9; [0053-0055]; [0070]; [0112-0161]; Xu: Abstract; Figure 4; [0043]; [0070]; Hiroki: Figure 6A and 6B; [0122]; the light blocking member BKL is between the bonding layer and the base layer BL).
Regarding Claim 3, The combination of Jeong, Xu, Hiroki, and Zhang teaches further comprising:
a fourth region (Jeong: Figure 2C and 2E; [0053-0055]; the examiner considers a “fourth region” as an area to the left edge of the display device to the first bending axis BX1, as seen in Figure 2C); and
a fifth region between the first region and the fourth region (Jeong: Figure 2E and 9; [0053-0055]; [0132-0161]; the examiner considers a “fifth region” to be between said “first region” and “fourth region” that includes bending axis BX1),
wherein the fifth region has a first flexural rigidity (Jeong: Figure 2E and 9; [0053-0055]; [0132-0161]; the “fifth region” has a “first flexural rigidity”),
wherein the third region comprises a third base (Jeong: Figure 2E and 9; [0053-0055]; [0132-0161]; the “third region” has the base layer BL),
wherein the first conductive film is between the third bonding layer and the third base (Jeong: Figure 2E, 8, and 9; [0053-0055]; [0070]; [0112-0161]; Xu: Abstract; Figure 4; [0043]; [0070]; the light blocking member BKL is between the bonding layer and the base layer BL),
wherein the third region has a second flexural rigidity (Jeong: Figure 2E and 9; [0053-0055]; [0132-0161]; the “third region” has a “second flexural rigidity”), and
wherein the second flexural rigidity is higher than the first flexural rigidity (Jeong: Figure 2E and 9; [0053-0055]; [0132-0161]; the portion with the second bending axis BX2 has a rigidity great than the portion with the first bending axis BX1).
Regarding Claim 4, The combination of Jeong, Xu, Hiroki, and Zhang teaches wherein the third region is bent such that the first conductive film is on the outer side than the functional layer, with the center of a circle of curvature that appears at the bending as the reference (Jeong: Figure 2E, 8, and 9; [0053-0055]; [0070]; [0112-0161]; Xu: Abstract; Figure 4; [0043]; [0070]; the “third area” in in-foldable and out-foldable, where when it is it in-foldable the light block layer is on the outsider side of the circuit layer CL, with the “center of a circle of curvature” that appears at the bending as the reference), and
wherein the fifth region is bendable in a direction opposite to a bending direction of the third region (Jeong: Figure 2E, 8, and 9; [0053-0055]; [0070]; [0112-0161]; Xu: Abstract; Figure 4; [0043]; [0070]; the “fifth region” is only in-foldable, which is a direction opposite to the “third region” out-foldable).
Regarding Claim 5, The combination of Jeong, Xu, Hiroki, and Zhang teaches further comprising a first pixel, wherein the circuit comprises a first pixel circuit (Jeong: Figure 6; [0073]; [0086-0103]; the display panel DP comprises of a plurality of pixels circuit, as seen in Figure 6, in the circuit layer CL),
wherein the first pixel comprises the first light-emitting element and the first pixel circuit (Jeong: Figure 6; [0073]; [0086-0103]; each pixel comprises of a pixel circuit CC and an OLED), and
wherein the first light-emitting element is electrically connected to the first pixel circuit (Jeong: Figure 6; [0073]; [0086-0103]; the OLED is electrically connected to the pixel circuit CC).
Regarding Claim 6, The combination of Jeong, Xu, Hiroki, and Zhang doesn’t explicitly teach further comprising a second pixel, wherein the second pixel comprises a second pixel circuit and a photoelectric conversion element, and wherein the photoelectric conversion element is electrically connected to the second pixel circuit.
However, Hiroki teaches a second pixel, wherein the second pixel comprises a second pixel circuit and a photoelectric conversion element (Figure 18B; [0284-0294]; the display portion 301 includes a plurality of imaging pixels 308 and a plurality of pixels 302. Each imaging pixel includes a photoelectric connection element and image pixel circuits), and wherein the photoelectric conversion element is electrically connected to the second pixel circuit (Figure 18B; [0284-0294]; Each imaging pixel includes a photoelectric connection element connected to the image pixel circuits).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the combinational disclosure of Jeong, Xu, and Hiroki to further utilize the teachings of Hiroki in order to provide further comprising a second pixel, wherein the second pixel comprises a second pixel circuit and a photoelectric conversion element, and wherein the photoelectric conversion element is electrically connected to the second pixel circuit. The motivation to combine these analogous arts is to provide a display that also includes imaging pixels to sense a touch or a finger or the like on the display portion (Hiroki: [0289];).
Regarding Claim 9, The combination of Jeong, Xu, Hiroki, and Zhang teaches an input/output device (Jeong: Abstract; Figures 4A and 4B; [0068-0069]; the display module includes an input sensing circuit ISC that detects touch and/or pressure applied from the outside ) comprising:
an input portion (Jeong: Figures 4A and 4B; [0068-0069]; an input sensing circuit ISC); and
a display portion (Jeong: Figures 4A and 4B; [0068-0069]; a display panel DP),
wherein the display portion comprises the functional panel according to claim 5 (Display panel DP comprises of the functional panel as described in claim 5),
wherein the input portion comprises a sensing region, wherein the input portion senses an object approaching the sensing region (Jeong: Figures 4A and 4B; [0068-0069]; the input sensing circuit ISC inherently comprises of a sensing region that detects touch and/or pressure), and
wherein the sensing region comprises a region overlapping with the first pixel Jeong: Figures 4A, 4B and 6; [0068-0069]; the input sensing circuit ISC is disposed above the display panel DP and thus comprises of a region that overlaps the pixel as shown in Figure 6).
Regarding Claim 11, The combination of Jeong, Xu, Hiroki, and Zhang discloses a data processing device (Jeong: Abstract; a display device),
the functional panel according to claim 5 (see Claim 5); and
at least one of a keyboard, a hardware button, a pointing device, a touch sensor, an illuminance sensor, an imaging device, an audio input device, an eye-gaze input device, and an attitude sensing device (Jeong: Abstract; Figures 4A and 4B; [0068-0069]; the display module includes an input sensing circuit ISC that detects touch and/or pressure applied from the outside).
Regarding Claim 12, Jeong discloses a semiconductor device (Abstract; Display Device) comprising:
a housing (Figure 2C and 2E; [0047]; [0053-0055]; housing HS); and
a functional panel comprising a first region, a second region, and a third region between the first region and the second region (Figure 2C and 2E; [0053-0055]; a “functional panel” comprises of a “first region”, “second reigon”, and a “third region”. the examiner considers a “first region” as an area between first bending axis BX1 and second bending axis BX2. the examiner considers a “second region” as an area to the right edge of the display device to the first bending axis BX2, as seen in Figure 2C. the examiner considers a “third region” to be between said “first region” and “second region” that includes bending axis BX2 ),
wherein the functional panel comprises a functional layer (Figure 2E, 5, 6, 8, and 9; [0053-0055]; [0070]; [0073]; [0086-0103]; [0112-0161]; a Display module DM that includes a display panel DP, as seen in Figure 8. The display panel includes a circuit layer CL and a light emitting element layer ELL, which the examiner considers as the functional layer)
wherein the third region is bendable (Figure 2E and 9; [0053-0055]; [0132-0161]; the “third area” that includes the bending axis BX2 can be in-folded and out-folded with respect to the first bending axis BX2),
wherein the first region comprises: a first portion of the functional layer, the first portion comprising a first plurality of light-emitting elements in matrix (Figure 2E, 5, 6, 8, and 9; [0053-0055]; [0070]; [0073]; [0086-0103]; [0112-0161]; the “first region” as seen in Figure 9, has a Display module DM that includes a display panel DP, as seen in Figure 8. The display panel includes a circuit layer CL and a light emitting element layer ELL, which the examiner considers as the functional layer. The display panel DP comprises of a plurality of pixels circuit, as seen in Figure 6, arranged in a matrix, as seen in Figure 5, in the circuit layer CL. Each of the pixel circuits comprise of an OLED (light-emitting element)),
a first base (Figure 2E, 8, and 9; [0053-0055]; [0070]; [0112-0161]; a base layer BL), and
wherein the second region comprises: a second portion of the functional layer, the second portion comprising a second plurality of light-emitting elements in matrix (Figure 2E, 5, 6, 8, and 9; [0053-0055]; [0070]; [0073]; [0086-0103]; [0112-0161]; the “second region” as seen in Figure 9, has a Display module DM that includes a display panel DP, as seen in Figure 8. The display panel includes a circuit layer CL and a light emitting element layer ELL, which the examiner considers as the functional layer. The display panel DP comprises of a plurality of pixels circuit, as seen in Figure 6, arranged in a matrix, as seen in Figure 5, in the circuit layer CL. Each of the pixel circuits comprise of an OLED (light-emitting element)),),
a second base (Figure 2E, 8, and 9; [0053-0055]; [0070]; [0112-0161]; a base layer BL), and
wherein the third region comprises: a third portion of the functional layer comprising a third plurality of light-emitting elements in a matrix (Figure 2E, 5, 6, 8, and 9; [0053-0055]; [0070]; [0073]; [0086-0103]; [0112-0161]; the “third region” as seen in Figure 9, has a Display module DM that includes a display panel DP, as seen in Figure 8. The display panel includes a circuit layer CL and a light emitting element layer ELL, which the examiner considers as the functional layer. The display panel DP comprises of a plurality of pixels circuit, as seen in Figure 6, arrange din a matrix, as seen in Figure 5, in the circuit layer CL. Each of the pixel circuits comprise of an OLED (light-emitting element)),,
wherein the functional layer comprises a circuit and an insulating film (Figure 6, 8, and 9; [0053-0055]; [0070]; [0112-0161]; the “functional layer” comprises of a circuit layer CL that contains transistors TR1 and TR2, that are a part of the pixel circuit for driving the OLED as seen in Figure 6, and a buffer layer BFL (insulating film)),
wherein the circuit comprises a second conductive film (Figure 6, 8, and 9; [0053-0055]; [0070]; [0112-0161]; the circuit includes an active part of transistor ACL (second conductive film)),
wherein the plurality of light-emitting elements comprises a first light-emitting element (Jeong: Figure 6; [0073]; [0086-0103]; the display panel DP comprises of a plurality of pixels circuit, as seen in Figure 6, in the circuit layer CL. Each pixel circuit comprises of an OLED),
wherein the housing comprises a first plane, a second plane, and a third plane between the first plane and the second plane (Figure 2C and 2E; [0047]; [0053-0055]; the examiner considers the housing HS to comprise of a “first plane”, a “second plane, and a “third plane” that is between the “first plane” and the “second plane” ),
wherein the first plane and the first region overlap with each other (Figure 2C and 2E; [0047]; [0053-0055]; the examiner considers the first plane and the first region to occupy the same area and overlap each other),
wherein the second plane and the second region overlap with each other (Figure 2C and 2E; [0047]; [0053-0055]; the examiner considers the second plane and the second region to occupy the same area and overlap each other),
wherein a distance is provided between the third plane and the third region (Figure 2C and 2E; [0047]; [0053-0055]; the examiner considers there to be a distance provided between the third plane and the third region), and
wherein the distance is changed by bending of the third region (Figure 2C and 2E; [0047]; [0053-0055]; the distance can be changed due because the third region includes second bending axis BX2 and can be in-folded or out-folded with respect to the second bending axis BX2).
However, Jeong does not disclose wherein the first region comprises: a first bonding layer between the first portion and the first base,
wherein the second region comprises: a second bonding layer between the second portion and the second base,
wherein the third region comprises: a first conductive film, and a third bonding layer between the functional layer and the first conductive film,
wherein an area occupied by all of the third plurality of light-emitting elements is fully covered with an area occupied by the first conductive film,
wherein the insulating film is between the first conductive film and the second conductive film,
wherein the first conductive film and the second conductive film form a capacitor.
Xu et al., US Patent Publication 2021/0367026, discloses the use of light shielding layer LS that is between a buffer layer 20 and a base substrate 10, that is forms a minimal additional capacitance between the light shielding layer LS and the gate electrode disposed above the buffer layer 20. The light shielding layer also being electrically connected to at least one or more power supply lines (Abstract; Figure 4; [0070];).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claim invention, to modify the disclosure of Jeong to further include the teachings of Xu in order to provide wherein the light blocking member BKL of Jeong is located to be between the buffer layer BFL and the base layer BL, and is used to provide a capacitance with the active part of transistor ACL. The motivation to combine these analogues arts is to provide reducing data loss in the display apparatus (Xu: [0070];).
Therefore, the combination of Jeong and Xu teaches the third region comprises a first conductive film (Jeong: Figure 2E, 8, and 9; [0053-0055]; [0070]; [0112-0161]; Xu: Abstract; Figure 4; [0070]; the “third region” comprises of light blocking member BKL (first conductive film)),
wherein the first conductive film is overlapped by each of the third plurality of light emitting elements (Jeong: Figure 2E, 8, and 9; [0053-0055]; [0070]; [0112-0161]; Xu: Abstract; Figure 4; [0070]; the light blocking member BKL (first conductive film) is located to be between the buffer layer BFL and the base layer BL, and is used to provide a capacitance with the active part of transistor ACL in a pixel circuit. As seen in Figure 2E of Jeong, based on the folding of the display device, the light blocking member and the plurality of pixels circuits will overlap each other. The examiner additionally notes that having the light blocking layer underneath the transistor of a pixel circuit is identical to the arrangement of applicants first conductive film with respect to the plurality of pixels as shown in Figure 2B and 3 in Applicants in Drawings),
wherein the insulating film is between the first conductive film and the second conductive film (Jeong: Figure 2E, 8, and 9; [0053-0055]; [0070]; [0112-0161]; Xu: Abstract; Figure 4; [0070]; the buffer layer (insulating film) is between the active part of transistor ACL and the light blocking member BKL (second conductive film)), and
wherein the first conductive film and the second conductive film form a capacitor (Jeong: Figure 2E, 8, and 9; [0053-0055]; [0070]; [0112-0161]; Xu: Abstract; Figure 4; [0043]; [0070]; an additional capacitance, thus forming a capacitor, is formed between the active part of transistor ACL and the light blocking member BKL that allows for data loss in the display apparatus to be significantly reduced or eliminated).
However, the combination of Jeong and Xu doesn’t explicitly teach wherein the first region comprises: a first bonding layer between the first portion and the first base,
wherein the second region comprises: a second bonding layer between the second portion and the second base,
wherein the third region comprises: a third bonding layer between the functional layer and the first conductive film,
wherein an area occupied by all of the third plurality of light-emitting elements is fully covered with an area occupied by the first conductive film.
Hiroki, US Patent Publication 2016/0118616, discloses the use of a bonding layer provided between a light-blocking layer 109 and a connection portion 106 of a flexible light-emitting device (Abstract; Figure 6A and 6B; [0122];).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the combinational disclosure of Jeong and Xu to further include the teachings of Hiroki such that a bonding layer is provided between the light blocking member BKL and the buffer layer BFL of the Circuit layer CL (functional layer) in order to provide wherein the first region comprises: a first bonding layer between the first portion and the first base, wherein the second region comprises: a second bonding layer between the second portion and the second base, wherein the third region comprises: a third bonding layer between the functional layer and the first conductive film. The motivation to combine these analogues arts is because Hiroki teaches the use of bonding layer for bonding a light-blocking layer to another component of a flexible light-emitting device (Hiroki: Figure 6A and 6B; [0122];).
However, the combination of Jeong, Xu, and Hiroki doesn’t explicitly teach wherein an area occupied by all of the third plurality of light-emitting elements is fully covered with an area occupied by the first conductive film.
Zhang, US Patent Publication 2021/0366933, teaches wherein a light shielding layer 113 is arranged between the buffer layer 121 and the substrate 111. Where the light shielding layer covers the entire substrate 111 except for areas in which light transmission holes 114 are located, which are used to allow light through to the imaging device 115 located underneath (Figure 3B and 3C; [0081-0082]; [0105-0106]).
Zhang’s teachings of having a light shielding layer that covers the entire substrate, except for areas where an imaging device 115 is located underneath, would have been recognized by one skilled in the art as applicable to the combination teachings of Jeong, Xu, and Hiroki’s light blocking member, and the results would have been predictable and resulted in having the light blocking member arranged to cover the entire base layer BL and without any holes, as the teachings of Jeong, Xu, and Hiroki do not describe a imaging device disposed underneath.
Therefore, the claimed subject matter of “wherein an area occupied by all of the third plurality of light-emitting elements is fully covered with an area occupied by the first conductive film” would have been obvious to one of ordinary skill in the art.
Regarding Claim 13 , The combination of Jeong, Xu, Hiroki, and Zhang teaches further comprising third first base, wherein the first conductive film is between the bonding layer and the first base (Jeong: Figure 2E, 8, and 9; [0053-0055]; [0070]; [0112-0161]; Xu: Abstract; Figure 4; [0043]; [0070]; Hiroki: Figure 6A and 6B; [0122]; the light blocking member BKL is between the bonding layer and the base layer BL).
Regarding Claim 14, The combination of Jeong, Xu, Hiroki, and Zhang teaches further comprising:
a fourth region (Jeong: Figure 2C and 2E; [0053-0055]; the examiner considers a “fourth region” as an area to the left edge of the display device to the first bending axis BX1, as seen in Figure 2C); and
a fifth region between the first region and the fourth region (Jeong: Figure 2E and 9; [0053-0055]; [0132-0161]; the examiner considers a “fifth region” to be between said “first region” and “fourth region” that includes bending axis BX1),
wherein the fifth region has a first flexural rigidity (Jeong: Figure 2E and 9; [0053-0055]; [0132-0161]; the “fifth region” has a “first flexural rigidity”),
wherein the third region comprises a third base (Jeong: Figure 2E and 9; [0053-0055]; [0132-0161]; the “third region” has the base layer BL),
wherein the first conductive film is between the third bonding layer and the second base (Jeong: Figure 2E, 8, and 9; [0053-0055]; [0070]; [0112-0161]; Xu: Abstract; Figure 4; [0043]; [0070]; the light blocking member BKL is between the bonding layer and the base layer BL),
wherein the third region has a second flexural rigidity (Jeong: Figure 2E and 9; [0053-0055]; [0132-0161]; the “third region” has a “second flexural rigidity”), and
wherein the second flexural rigidity is higher than the first flexural rigidity (Jeong: Figure 2E and 9; [0053-0055]; [0132-0161]; the portion with the second bending axis BX2 has a rigidity great than the portion with the first bending axis BX1).
Regarding Claim 15, The combination of Jeong, Xu, Hiroki, and Zhang teaches wherein the third region is bent such that the first conductive film is on the outer side than the functional layer, with the center of a circle of curvature that appears at the bending as the reference (Jeong: Figure 2E, 8, and 9; [0053-0055]; [0070]; [0112-0161]; Xu: Abstract; Figure 4; [0043]; [0070]; the “third area” in in-foldable and out-foldable, where when it is it in-foldable the light block layer is on the outsider side of the circuit layer CL, with the “center of a circle of curvature” that appears at the bending as the reference), and
wherein the fifth region is bendable in a direction opposite to a bending direction of the third region (Jeong: Figure 2E, 8, and 9; [0053-0055]; [0070]; [0112-0161]; Xu: Abstract; Figure 4; [0043]; [0070]; the “fifth region” is only in-foldable, which is a direction opposite to the “third region” out-foldable).
Regarding Claim 16, The combination of Jeong, Xu, Hiroki, and Zhang teaches further comprising a first pixel, wherein the circuit comprises a first pixel circuit, wherein the first pixel comprises a light-emitting element and the first pixel circuit (Jeong: Figure 6; [0073]; [0086-0103]; each pixel comprises of a pixel circuit CC and an OLED), and
wherein the light-emitting element is electrically connected to the first pixel circuit (Jeong: Figure 6; [0073]; [0086-0103]; the OLED is electrically connected to the pixel circuit CC).
Regarding Claim 17, The combination of Jeong, Xu, Hiroki, and Zhang doesn’t explicitly teach further comprising a second pixel, wherein the second pixel comprises a second pixel circuit and a photoelectric conversion element, and wherein the photoelectric conversion element is electrically connected to the second pixel circuit.
However, Hiroki teaches a second pixel, wherein the second pixel comprises a second pixel circuit and a photoelectric conversion element (Figure 18B; [0284-0294]; the display portion 301 includes a plurality of imaging pixels 308 and a plurality of pxiels 302. Each imaging pixel includes a photoelectric connection element and image pixel circuits), and wherein the photoelectric conversion element is electrically connected to the second pixel circuit (Figure 18B; [0284-0294]; Each imaging pixel includes a photoelectric connection element connected to the image pixel circuits).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the combinational disclosure of Jeong, Xu, and Hiroki to further utilize the teachings of Hiroki in order to provide further comprising a second pixel, wherein the second pixel comprises a second pixel circuit and a photoelectric conversion element, and wherein the photoelectric conversion element is electrically connected to the second pixel circuit. The motivation to combine these analogous arts is to provide a display that also includes imaging pixels to sense a touch or a finger or the like on the display portion (Hiroki: [0289];).
Regarding Claim 19, The combination of Jeong, Xu, Hiroki, and Zhang teaches wherein the first conductive film is overlapped by the photoelectric conversion element (Jeong: Figure 2E, 8, and 9; [0053-0055]; [0070]; [0112-0161]; Xu: Abstract; Figure 4; [0070]; Hiroki: Figure 18B; [0284-0294]; the light blocking member BKL (first conductive film) is located to be between the buffer layer BFL and the base layer BL, and is used to provide a capacitance with the active part of transistor ACL in a pixel circuit. Therefore, the imaging pixel, that includes the photoelectric connection element, which is in the same plane as the pixel, overlaps the light blocking member BKL).
Regarding Claim 20, The combination of Jeong, Xu, Hiroki, and Zhang teaches wherein the first conductive film covers the whole of the third region (Jeong: Figure 1, 2C, 2E and 9; [0040]; [0053-0055]; [0070]; [0112-0161]; Xu: Abstract; Figure 4; [0070]; Zhang: Figure 3B and 3C; [0081-0082]; [0105-0106]; the light blocking member BKL covers the entire base layer BL, thus covering the whole “third region”).
Regarding Claim 21, The combination of Jeong, Xu, Hiroki, and Zhang teaches wherein each of the first region, the second region, and the third region is configured to display an image (Jeong: Figure 1, 2C, 2E and 9; [0040]; [0053-0055]; [0112-0161]; the first, second, and third region are configured to display an image, as seen in Figure 1 where an image IM is displayed )
Claims 7 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Jeong, US Patent Publication 2020/0159287, in further view of Xu et al., US Patent Publication 2021/0367026, henceforth known as Xu, in further view of Hiroki, US Patent Publication 2016/0118616, in further view of Zhang, US Patent Publication 2021/0366933, and in further view of Koyama, US Patent publication 2001/0002703.
Regarding Claim 7, The combination of Jeong, Xu, Hiroki, and Zhang teaches wherein the functional layer comprises the first pixel circuit (Jeong: Figure 6, 8, and 9; [0053-0055]; [0070]; [0112-0161]; the “functional layer” comprises of the circuit layer CL that comprises of the first pixel circuit),
wherein the first pixel circuit comprises a first transistor (Jeong: Figure 6; [0073]; [0086-0103]; transistor T1),
wherein the functional layer comprises the second pixel circuit, wherein the second pixel circuit comprises a second transistor (Hiroki: Figure 18B; [0284-0294]; Each imaging pixel includes a photoelectric connection element connected to the image pixel circuits, the image pixel circuit includes transistor 308t),
wherein the functional layer comprises a driver circuit (Jeong: Figure 6, 8, and 9; [0053-0055]; [0070]; [0077]; [0112-0161]; the “functional layer” includes scan driving unit, and data driving unit 200. The scan driving unit 100 includes a plurality of thin-film transistors formed through a same process as the driving circuit of each of the pixels),
wherein the driver circuit comprises a third transistor (Jeong: [0077]; The scan driving unit 100 includes a plurality of thin-film transistors formed through a same process as the driving circuit of each of the pixels),
wherein the first transistor comprises a semiconductor film (Jeong: Figure 6, 8, and 9; [0053-0055]; [0070]; [0112-0161]; the transistors includes an active part ACL (semiconductor film)),
wherein the second transistor comprises a semiconductor film (Jeong: Figure 6, 8, and 9; [0053-0055]; [0070]; [0112-0161]; Hiroki: Figure 18B; [0284-0294]; the transistors includes an active part ACL (semiconductor film), and
wherein the third transistor comprises a semiconductor film (Jeong: Figure 6, 8, and 9; [0053-0055]; [0070]; [0112-0161]; Hiroki: Figure 18B; [0284-0294]; the transistors includes an active part ACL (semiconductor film) .
wherein the second transistor comprises a semiconductor film (Jeong: Figure 6, 8, and 9; [0053-0055]; [0070]; [0112-0161]; the transistors includes an active part ACL (semiconductor film)), and
wherein the third transistor comprises a semiconductor film (Jeong: [0077]; The scan driving unit 100 includes a plurality of thin-film transistors formed through a same process as the driving circuit of each of the pixels, thus they have a active part ACL (semiconductor film)).
However, the combination of Jeong, Xu, Hiroki, and Zhang doesn’t explicitly teach wherein the second transistor comprises a semiconductor film that is formed in a step of forming the semiconductor film of the first transistor, and wherein the third transistor comprises a semiconductor film that is formed in the step of forming the semiconductor film of the first transistor.
Koyama, US Patent publication 2001/0002703, teaches a method of simultaneously manufacturing switching TFTs of a pixel portion, an EL driving TFT and driving circuit portion TFTs formed in the periphery portion of the power source control TFT and the pixel portion ([0288-0333]; Figure 13A-16C).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the combinational disclosure of Jeong, Xu, Hiroki, and Zhang to further include the teachings of Koyama in order to provide wherein the second transistor comprises a semiconductor film that is formed in a step of forming the semiconductor film of the first transistor, and wherein the third transistor comprises a semiconductor film that is formed in the step of forming the semiconductor film of the first transistor. The motivation to combine these analogous arts is because Koyama teaches a method of simultaneous manufacturing TFTs (Koyama: [0288];) and Jeong teaches what the thin-film transistors of the scan driving unit 100 are formed through a same process as the driving circuit of each of the pixels (Jeong: [0077];).
Regarding Claim 18, The combination of Jeong, Xu, Hiroki, and Zhang teaches wherein the functional layer comprises the first pixel circuit (Jeong: Figure 6, 8, and 9; [0053-0055]; [0070]; [0112-0161]; the “functional layer” comprises of the circuit layer CL that comprises of the first pixel circuit),
wherein the first pixel circuit comprises a first transistor (Jeong: Figure 6; [0073]; [0086-0103]; transistor T1),
wherein the functional layer comprises the second pixel circuit, wherein the second pixel circuit comprises a second transistor (Hiroki: Figure 18B; [0284-0294]; Each imaging pixel includes a photoelectric connection element connected to the image pixel circuits, the image pixel circuit includes transistor 308t),
wherein the functional layer comprises a driver circuit (Jeong: Figure 6, 8, and 9; [0053-0055]; [0070]; [0077]; [0112-0161]; the “functional layer” includes scan driving unit, and data driving unit 200. The scan driving unit 100 includes a plurality of thin-film transistors formed through a same process as the driving circuit of each of the pixels),
wherein the driver circuit comprises a third transistor (Jeong: [0077]; The scan driving unit 100 includes a plurality of thin-film transistors formed through a same process as the driving circuit of each of the pixels),
wherein the first transistor comprises a semiconductor film (Jeong: Figure 6, 8, and 9; [0053-0055]; [0070]; [0112-0161]; the transistors includes an active part ACL (semiconductor film)),
wherein the second transistor comprises a semiconductor film (Jeong: Figure 6, 8, and 9; [0053-0055]; [0070]; [0112-0161]; Hiroki: Figure 18B; [0284-0294]; the transistors includes an active part ACL (semiconductor film), and
wherein the third transistor comprises a semiconductor film (Jeong: Figure 6, 8, and 9; [0053-0055]; [0070]; [0112-0161]; Hiroki: Figure 18B; [0284-0294]; the transistors includes an active part ACL (semiconductor film) .
wherein the second transistor comprises a semiconductor film (Jeong: Figure 6, 8, and 9; [0053-0055]; [0070]; [0112-0161]; the transistors includes an active part ACL (semiconductor film)), and
wherein the third transistor comprises a semiconductor film (Jeong: [0077]; The scan driving unit 100 includes a plurality of thin-film transistors formed through a same process as the driving circuit of each of the pixels, thus they have a active part ACL (semiconductor film)).
However, the combination of Jeong, Xu, Hiroki, and Zhang doesn’t explicitly teach wherein the second transistor comprises a semiconductor film that is formed in a step of forming the semiconductor film of the first transistor, and wherein the third transistor comprises a semiconductor film that is formed in the step of forming the semiconductor film of the first transistor.
Koyama, US Patent publication 2001/0002703, teaches a method of simultaneously manufacturing switching TFTs of a pixel portion, an EL driving TFT and driving circuit portion TFTs formed in the periphery portion of the power source control TFT and the pixel portion ([0288-0333]; Figure 13A-16C).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the combinational disclosure of Jeong, Xu, Hiroki, and Zhang to further include the teachings of Koyama in order to provide wherein the second transistor comprises a semiconductor film that is formed in a step of forming the semiconductor film of the first transistor, and wherein the third transistor comprises a semiconductor film that is formed in the step of forming the semiconductor film of the first transistor. The motivation to combine these analogous arts is because Koyama teaches a method of simultaneous manufacturing TFTs (Koyama: [0288];) and Jeong teaches what the thin-film transistors of the scan driving unit 100 are formed through a same process as the driving circuit of each of the pixels (Jeong: [0077];).
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Jeong, US Patent Publication 2020/0159287, in further view of Xu et al., US Patent Publication 2021/0367026, henceforth known as Xu, in further view of Hiroki, US Patent Publication 2016/0118616, in further view of Zhang, US Patent Publication 2021/0366933, in further view of Yamazaki et al., US Patent Publication 2018/0095559, and in further view of Iwaki, US Patent publication 2014/0152685.
Regarding Claim 8, The combination of Jeong, Xu, Hiroki, and Zhang teaches a display device (Jeong: Abstract; a display device) comprising:
the functional panel according to claim 5 (see Claim 5).
However, the combination of Jeong, Xu, Hiroki, and Zhang doesn’t explicitly teach a control portion,
wherein the control portion is supplied with image data and control data.
wherein the control portion generates data on the basis of the image data,
wherein the control portion generates a control signal on the basis of the control data,
wherein the control portion supplies the data and the control signal,
wherein the functional panel is supplied with the data and the control signal, and
wherein the first pixel emits light on the basis of the data.
Yamazaki et al., US Patent Publication 2018/0095559, teaches a control portion ( [0378-0387]; a control portion 238),
wherein the control portion is supplied with image data and control data ([0378-0387]; the control portion receives image data V1 and control data SS).
wherein the control portion generates data on the basis of the image data ([0378-0387]; the control portion generates data V11 and V12 on the basis of image data V1),
wherein the control portion supplies the data ([0378-0387]; the control portion generates data V11 and V12 and supplies it to the display panel),
wherein the functional panel is supplied with the data ([0378-0387]; the display panel receives the signals V11 and V12), and
wherein the first pixel emits light on the basis of the data ([0378-0387]; the pixels perform the function of performing the display on the basis of data V11 and V12).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the combinational disclosure of Jeong, Xu, Hiroki, and Zhang to further include the teachings of Yamazaki. The motivation to combine these analogous arts is because Yamazaki discloses that a display device includes a control portion that has a function of generating data on the basis of received image date (Yamazaki: [0378-0380];).
However, The combination of Jeong, Xu, Hiroki, Zhang, and Yamazaki doesn’t explicitly teach wherein the control portion generates a control signal on the basis of the control data,
wherein the control portion supplies the control signal,
wherein the functional panel is supplied with the control signal.
Iwaki, US Patent publication 2014/0152685, teaches wherein a control circuit 300 receives an image signal Video and a synchronization signal Sync for controlling updating of the screen, and outputs control signals SSP, SCLK, GSP and GCLK to the circuit block 121, as seen in Figure 4A (Figure 4A; [0083-0088];).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the combinational disclosure of Jeong, Xu, Hiroki, Zhang, and Yamazaki to further include the teachings of Iwaki in order to provide wherein the control portion generates a control signal on the basis of the control data, wherein the control portion supplies the control signal, wherein the functional panel is supplied with the control signal. The motivation to combine these analogous arts is because the control circuit 300 controls the whole display unit 120 (Iwaki: [0086];).
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Jeong, US Patent Publication 2020/0159287, in further view of Xu et al., US Patent Publication 2021/0367026, henceforth known as Xu, in further view of Hiroki, US Patent Publication 2016/0118616, in further view of Zhang, US Patent Publication 2021/0366933, and in further view of Yamazaki et al., US Patent Publication 2018/0095559.
Regarding Claim 10. The combination of Jeong, Xu, Hiroki, and Zhang discloses a data processing device (Jeong: Abstract; a display device).
However, the combination of Jeong, Xu, Hiroki, and Zhang doesn’t explicitly teach an arithmetic device; and
an input/output device,
wherein the arithmetic device is supplied with input data or sensing data,
wherein the arithmetic device generates control data and image data on the basis of the input data or the sensing data,
wherein the arithmetic device supplies the control data and the image data,
wherein the input/output device supplies the input data and the sensing data,
\wherein the input/output device is supplied with the control data and the image data,
wherein the input/output device comprises a display portion, an input portion, and a sensor portion, wherein the display portion comprises the functional panel according to claim 5,
wherein the display portion displays the image data on the basis of the control data,
wherein the input portion generates the input data, and
wherein the sensor portion generates the sensing data.
Yamazaki, US Patent Publication 2018/0095559, teaches a data processing device (Figure 20A; [0505-0535]; a data processing device), comprising:
an arithmetic device (Figure 20A; [0505-0535]; an arithmetic device 210); and
an input/output device (Figure 20A; [0505-0535]; an input/output device 220 ),
wherein the arithmetic device is supplied with input data or sensing data (Figure 20A; [0505-0535]; the arithmetic device 210 receives positional data P1 or sensing data S1),
wherein the arithmetic device generates control data and image data on the basis of the input data or the sensing data (Figure 20A; [0505-0535]; the arithmetic device 210 provides the image data V1 and control data SS, and operates on the basis of the positional data P1 or sensing data S1) ,
wherein the arithmetic device supplies the control data and the image data (Figure 20A; [0505-0535]; the arithmetic device 210 provides the image data V1 and control data SS),
wherein the input/output device supplies the input data and the sensing data (Figure 20A; [0505-0535]; the input/output device 220 has a function of supplying the positional data P1 or sensing data D1, where Figure 20 shows both being supplied),
wherein the input/output device is supplied with the control data and the image data (Figure 20A; [0505-0535]; the arithmetic device 210 provides the image data V1 and control data SS to the input/output device 220) ,
wherein the input/output device comprises a display portion, an input portion, and a sensor portion (Figure 20A; [0505-0535]; the input/output device 220 comprises a display portion 230, a input portion 240, and a sensor portion 250).
wherein the display portion displays the image data on the basis of the control data (Figure 20A; [0505-0535]; the display portion 230 has a function of displaying an image on the basis of the image data V1. The display portion 230 has a function of displaying an image on the basis of the control data SS. ),
wherein the input portion generates the input data (Figure 20A; [0505-0535]; The input portion 240 has a function of supplying the positional data P1), and
wherein the sensor portion generates the sensing data (Figure 20A; [0505-0535]; the sensor portion 250 has a function of supplying the sensing data S1. The sensor portion 250 has a function of sensing the illuminance of the environment where the data processing device 200 is used and a function of supplying illuminance data).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the combinational disclosure of Jeong, Xu, Hiroki, and Zhang to further include the teachings of Yamazaki in order to provide an arithmetic device; and an input/output device, wherein the arithmetic device is supplied with input data or sensing data, wherein the arithmetic device generates control data and image data on the basis of the input data or the sensing data, wherein the arithmetic device supplies the control data and the image data, wherein the input/output device supplies the input data and the sensing data, wherein the input/output device is supplied with the control data and the image data, wherein the input/output device comprises a display portion, an input portion, and a sensor portion, wherein the display portion comprises the functional panel according to claim 5, wherein the display portion displays the image data on the basis of the control data, wherein the input portion generates the input data, and wherein the sensor portion generates the sensing data. The motivation to combine these analogous arts is because Yamazaki discloses a structural example of a data processing device and all of the individual components in it necessary for a novel display panel (Yamzaki; Abstract; [0505]; [0514];).
Allowable Subject Matter
The following claims are drafted by the examiner and considered to distinguish patentably over the art of record in this application, Claims 1-18 (which are based on the original claims of 6/18/2020) are presented to applicant for consideration:
1. (Currently Amended) A functional panel comprising:
a first region;
a second region; [[and]]
a third region between the first region and the second region;[[,]]
a fourth region;
a fifth region between the first region and the fourth region; and
a first base
wherein the third region and the fifth region are [[is]] bendable,
wherein the third region and the fifth region comprises a functional layer, a first conductive film, and a bonding layer between the functional layer and the first conductive film,
wherein the functional layer comprises a circuit and an insulating film,
wherein the circuit comprises a second conductive film,
wherein the insulating film is between the first conductive film and the second conductive film, [[and]]
wherein the first conductive film and the second conductive film form a capacitor,
wherein the first conductive film is between the bonding layer and the first base,
wherein the fifth region has a first flexural rigidity,
wherein the third region further comprises a second base, and a second bonding layer,
wherein the first conductive film is between the bonding layer and the second base,
wherein the third region has a second flexural rigidity,
wherein the second flexural rigidity is higher than the first flexural rigidity,
wherein, in the third region, the second bonding layer is directly between the second base and the first base, and
wherein, in the fifth region, the first conductive film is directly between the bonding layer and the first base.
2. (Cancelled).
3. (Cancelled).
4. (Currently Amended) The functional panel according to claim [[3]] 1, wherein the third region is bent such that the first conductive film is on the outer side than the functional layer, with the center of a circle of curvature that appears at the bending as the reference, and wherein the fifth region is bendable in a direction opposite to a bending direction of the third region.
5. (Original)The functional panel according to claim 1, further comprising a first pixel, wherein the circuit comprises a first pixel circuit, wherein the first pixel comprises a light-emitting element and the first pixel circuit, and wherein the light-emitting element is electrically connected to the first pixel circuit.
6. (Original)The functional panel according to claim 5, further comprising a second pixel, wherein the second pixel comprises a second pixel circuit and a photoelectric conversion element, and wherein the photoelectric conversion element is electrically connected to the second pixel circuit.
7. (Original)The functional panel according to claim 6, wherein the functional layer comprises the first pixel circuit, wherein the first pixel circuit comprises a first transistor, wherein the functional layer comprises the second pixel circuit, wherein the second pixel circuit comprises a second transistor, wherein the functional layer comprises a driver circuit, wherein the driver circuit comprises a third transistor, wherein the first transistor comprises a semiconductor film, wherein the second transistor comprises a semiconductor film that is formed in a step of forming the semiconductor film of the first transistor, and wherein the third transistor comprises a semiconductor film that is formed in the step of forming the semiconductor film of the first transistor.
8. (Currently Amended) A display device comprising: the functional panel according to claim 5; and a control portion, wherein the control portion is supplied with image data and control data,[[.]] wherein the control portion generates data on the basis of the image data, wherein the control portion generates a control signal on the basis of the control data, wherein the control portion supplies the data and the control signal, wherein the functional panel is supplied with the data and the control signal, and wherein the first pixel emits light on the basis of the data.
9. (Original) An input/output device comprising: an input portion; and a display portion, wherein the display portion comprises the functional panel according to claim 5, wherein the input portion comprises a sensing region, wherein the input portion senses an object approaching the sensing region, and wherein the sensing region comprises a region overlapping with the first pixel.
10. (Original) A data processing device comprising: an arithmetic device; and an input/output device, wherein the arithmetic device is supplied with input data or sensing data, wherein the arithmetic device generates control data and image data on the basis of the input data or the sensing data, wherein the arithmetic device supplies the control data and the image data, wherein the input/output device supplies the input data and the sensing data, wherein the input/output device is supplied with the control data and the image data, wherein the input/output device comprises a display portion, an input portion, and a sensor portion, wherein the display portion comprises the functional panel according to claim 5, wherein the display portion displays the image data on the basis of the control data, wherein the input portion generates the input data, and wherein the sensor portion generates the sensing data.
11. (Original) A data processing device comprising: the functional panel according to claim 5; and at least one of a keyboard, a hardware button, a pointing device, a touch sensor, an illuminance sensor, an imaging device, an audio input device, an eye-gaze input device, and an attitude sensing device.
12. (Currently Amended) A semiconductor device comprising:
a housing; and
a functional panel comprising a first region, a second region, [[and]] a third region between the first region and the second region, a fourth region, a fifth region between the first region and the fourth region, and a first base,
wherein the third region and the fifth region are [[is]] bendable,
wherein the third region and the fifth region comprises a functional layer, a first conductive film, and a bonding layer between the functional layer and the first conductive film,
wherein the functional layer comprises a circuit and an insulating film, wherein the circuit comprises a second conductive film,
wherein the insulating film is between the first conductive film and the second conductive film,
wherein the first conductive film and the second conductive film form a capacitor,
wherein the first conductive film is between the bonding layer and the first base,
wherein the fifth region has a first flexural rigidity,
wherein the third region further comprises a second base, and a second bonding layer,
wherein the first conductive film is between the bonding layer and the second base,
wherein the third region has a second flexural rigidity,
wherein the second flexural rigidity is higher than the first flexural rigidity,
wherein, in the third region, the second bonding layer is directly between the second base and the first base,
wherein, in the fifth region, the first conductive film is directly between the bonding layer and the first base,
wherein the housing comprises a first plane, a second plane, and a third plane between the first plane and the second plane,
wherein the first plane and the first region overlap with each other,
wherein the second plane and the second region overlap with each other,
wherein a distance is provided between the third plane and the third region, and
wherein the distance is changed by bending of the third region.
13. (Cancelled)
14. (Cancelled)
15. (Currently Amended) The semiconductor device according to claim [[14]] 12, wherein the third region is bent such that the first conductive film is on the outer side than the functional layer, with the center of a circle of curvature that appears at the bending as the reference, and wherein the fifth region is bendable in a direction opposite to a bending direction of the third region.
16. (Original) The semiconductor device according to claim 12, further comprising a first pixel, wherein the circuit comprises a first pixel circuit, wherein the first pixel comprises a light-emitting element and the first pixel circuit, and wherein the light-emitting element is electrically connected to the first pixel circuit.
17. (Original) The semiconductor device according to claim 16, further comprising a second pixel, wherein the second pixel comprises a second pixel circuit and a photoelectric conversion element, and wherein the photoelectric conversion element is electrically connected to the second pixel circuit.
18. (Original) The semiconductor device according to claim 17, wherein the functional layer comprises the first pixel circuit, wherein the first pixel circuit comprises a first transistor, wherein the functional layer comprises the second pixel circuit, wherein the second pixel circuit comprises a second transistor, wherein the functional layer comprises a driver circuit, wherein the driver circuit comprises a third transistor, wherein the first transistor comprises a semiconductor film, wherein the second transistor comprises a semiconductor film that is formed in a step of forming the semiconductor film of the first transistor, and wherein the third transistor comprises a semiconductor film that is formed in the step of forming the semiconductor film of the first transistor.
Response to Arguments
Applicant's arguments filed 3/25/2026 have been fully considered but they are not persuasive.
The examiner respectfully disagrees with the applicants remarks towards the rejection of Claim 1.
The applicant disagrees with the examiners assertion that the combination of Jeong and Xu teaches “the third region comprises a first conductive film”. As stated above in the rejection, the examiner is relying on the teachings of Xu which describes the use of light shielding layer LS that is between a buffer layer 20 and a base substrate 10, that is forms a minimal additional capacitance between the light shielding layer LS and the gate electrode disposed above the buffer layer 20. The light shielding layer also being electrically connected to at least one or more power supply lines (Abstract; Figure 4; [0070];).
The examiner considers the light shielding layer as being inherently made of a conductive material in order for it be electrically connected to the one or more power supply lines. As such, when it Xu teachings are combined with Jeong, the light shielding layer BKL of Jeong will inherently comprise of a conductive material in order for it to be electrically connected to the power supply lines.
In response to the applicants arguments towards the motivation to combine Xu with Jeong, the examiner disagrees and reiterates that Xu teachings is describing that the light shielding layer is to be electrically connected to a power supply line in order to form a capacitance between the light shielding layer and a gate electrode of the one of the plurality of driving thin film transistors for the purposes of preventing data loss. The light shielding layer inherently comprises of a conductive layer in order of it to be electrically connected and provide said capacitance.
With regards to applicants remarks towards the examiners notation of the similarity between the combination of Jeong and Xu and the applicants invention, the examiner points out that the notation is not being relied on to teach the limitation, but merely to show the similarity between the combination and the applicants invention.
With regards to applicant remarks with respect to the limitation of “wherein an area occupied by all of the third plurality of light-emitting elements is fully covered with an area occupied by the first conductive film”, the examiner disagree with the applicants remarks for the same reasons as stated above.
Therefore, for the reasons stated above, the examiner maintains the rejection of Claim 1.
The rejection of Claim 12, which recites similar features to Claim 1, is also maintained for the same reasoning.
Claims 2-11, 13-18, 20, and 21, which are dependent form Claims 1 and 12, are also maintained for the same rationale.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PATRICK F MARINELLI whose telephone number is (571)270-3383. The examiner can normally be reached Monday - Friday: 8:00AM - 5:00PM PST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, George Eng can be reached at (571)-272-7495. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/PATRICK F MARINELLI/Primary Examiner, Art Unit 2699
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