Prosecution Insights
Last updated: May 29, 2026
Application No. 16/937,644

Power Semiconductor Device and Manufacturing Method

Final Rejection §112
Filed
Jul 24, 2020
Priority
Jul 24, 2019 — DE 102019120017.2
Examiner
ISAAC, STANETTA D
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Infineon Technologies AG
OA Round
10 (Final)
85%
Grant Probability
Favorable
11-12
OA Rounds
0m
Est. Remaining
48%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
816 granted / 955 resolved
+17.4% vs TC avg
Minimal -38% lift
Without
With
+-37.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
26 currently pending
Career history
1010
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
63.5%
+23.5% vs TC avg
§102
34.7%
-5.3% vs TC avg
§112
1.5%
-38.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 955 resolved cases

Office Action

§112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-6 and 23-25 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. In claim 1, lines 5-6 the electrically conducting second layer, electrically conducting first layer, and semiconductor substrate are external layers to each other. However, the later part of the claim appears to claim that the electrically conducting first layer and electrically conducting second layer are part of the substrate. In claim 1, lines 10-11, it is unclear regarding “a wiring portion on the semiconductor substrate” and “a wiring portion of the semiconductor substrate” In claim 1, line 13, it is unclear as to which “the semiconductor device” is referring back to a power semiconductor device or the semiconductor chip. REASONS FOR ALLOWANCE Claims 1-6 and 23-26 is allowed over the prior art of record. Claims 1-6 and 23-25 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action. The following is an examiner’s statement of reasons for allowance: The closest prior art of record and to the examiner’s knowledge as best understood does not suggest or render obvious a power semiconductor device particularly characterized by wherein the semiconductor chip and the carrier are joined together by a joining material, and wherein the joining material comprises the phase change material; wherein the pores are at least partially filled with a phase change material, as detailed in claim 1. Claims 2-6 and 23-25 depend from claim 1. The closest prior art of record based on applicant’s persuasive arguments and after the examiner’s further consideration and/or search, does not teach or render obvious the claimed invention. Specifically, wherein at least part of the electrically conducting first layer comprises pores, wherein the pores are at least partially filled with a phase change material; wherein the phase material includes at least one of a chalcogenide, a salt and an organic phase change material, as detailed in claim 26. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Response to Arguments Applicant’s arguments with respect to claim(s) 1-6 and 23-25 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Applicant’s amendment has necessitated new grounds of rejection. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to STANETTA D ISAAC whose telephone number is (571)272-1671. The examiner can normally be reached M-F 10-6. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Leonard Chang can be reached at 571-270-3691. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /STANETTA D ISAAC/Examiner, Art Unit 2898 April 22, 2026 /Leonard Chang/Supervisory Patent Examiner, Art Unit 2898
Read full office action

Prosecution Timeline

Show 17 earlier events
Dec 19, 2024
Final Rejection mailed — §112
Feb 19, 2025
Response after Non-Final Action
Mar 19, 2025
Notice of Allowance
Mar 19, 2025
Response after Non-Final Action
May 15, 2025
Response after Non-Final Action
Oct 14, 2025
Non-Final Rejection mailed — §112
Jan 13, 2026
Response Filed
Apr 30, 2026
Final Rejection mailed — §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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HEAT SPREADING ISOLATION STRUCTURE FOR SEMICONDUCTOR DEVICES
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Patent 12628624
MANUFACTURING METHOD FOR FORMING SEMICONDUCTOR DEVICE
4y 2m to grant Granted May 12, 2026
Patent 12616039
ELECTRONIC SYSTEM HAVING INTERMETALLIC CONNECTION STRUCTURE WITH CENTRAL INTERMETALLIC MESH STRUCTURE AND MESH-FREE EXTERIOR STRUCTURES
3y 9m to grant Granted Apr 28, 2026
Patent 12604706
APPARATUS INCLUDING TRANSPARENT MATERIAL FOR TRANSPARENT PROCESS PERFORMANCE AND METHOD USING THEREOF
4y 2m to grant Granted Apr 14, 2026
Patent 12604715
ISOLATION STRUCTURE AND MEMORY DEVICE
2y 0m to grant Granted Apr 14, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

11-12
Expected OA Rounds
85%
Grant Probability
48%
With Interview (-37.6%)
2y 5m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 955 resolved cases by this examiner. Grant probability derived from career allowance rate.

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