DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is in response to the amendment filed on 10/07/25. Claims 1, 3-20, and 26-30 are pending.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 3-11, 14, 15, and 17-19 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lin et al. (US PGPub 2017/0162530, hereinafter referred to as “Lin”).
Lin discloses the semiconductor method as claimed. See figures 1A-9E, with emphasis on figures 9A-9E, and corresponding text, where Lin teaches, in claim 1, a method, comprising:
performing a non-screen printing process (907) that deposits solder (705) on one of a lead frame (200) and (figure 9A; [0046])
or on conductive features (104) of a semiconductor die (304) or wafer; (figure 9A; [0046])
after performing the non-screen printing process and before engaging the semiconductor die to the lead frame, depositing flux on the deposited solder; ([0015])
engaging the semiconductor die to the lead frame (200);
performing a thermal process that reflows the solder (figure 9D; [0051]);
performing a molding process (308) that forms a package structure, which encloses the semiconductor die (304) and a portion of the lead frame (200); and
separating the package structure a packaged electronic device from a remaining portion of the lead frame (figure 9E; [0052]).
Lin teaches, in claim 3, wherein depositing the flux on the solder comprises performing a second non-screen printing process that deposits the flux on the solder. (figure 9C-1; [0015], [0049])
Lin teaches, in claim 4, wherein the non-screen printing process deposits the solder mixed with flux. (figure 9C-1; [0015], [0049])
Lin teaches, in claim 5, wherein the non-screen printing process deposits the solder as an alloy of tin (Sn), silver (Ag), and copper (Cu). (figure 9C-1; [0015], [0049])
Lin teaches, in claim 6, a method, comprising: (figures 9A-9E; [0046-0053])
performing a non-screen printing process (907) that deposits solder on one of a lead frame (200) and or on conductive features (104) of a semiconductor die (304) or wafer, wherein the non-screen printing process (907) deposits the solder (705) as an alloy mixture of melted particles using a heated print head;
engaging the semiconductor die (304) to the lead frame (200);
performing a thermal process that reflows the solder (figure 9D; [0051]);
performing a molding process (308) that forms a package structure which encloses the semiconductor die (304) and a portion of the lead frame (200); and
separating the package structure (700);
a packaged electronic device from a remaining portion of the lead frame (200).
Lin teaches, in claim 7, wherein the non-screen printing process deposits the solder as particles in a solvent. (figures 9A-9E; [0046-0053])
Lin teaches, in claim 8, wherein the non-screen printing process deposits the solder as an alloy of tin (Sn), silver (Ag), and copper (Cu). (figures 9A-9E; [0046-0053])
Lin teaches, in claim 9, wherein the non-screen printing process deposits the solder using: a first print head that deposits tin particles in a first solvent; a second print head that deposits silver particles in a second solvent; and a third print head that deposits copper particles in a third solvent. (figures 9A-9E; [0046-0053])
Lin teaches, in claim 10, a method, comprising: (figures 9A-9E; [0046-0053])
performing a non-screen printing process (907) that deposits solder (702) on one of a lead frame (200) and or on conductive features (104) of a semiconductor die (304) or wafer, wherein the non- screen printing process (907) deposits the solder as an alloy by printing melted first particles using a heated first print head and printing melted second particles using a heated second print head;
engaging the semiconductor die to the lead frame;
performing a thermal process that reflows the solder;
performing a molding process (308) that forms a package structure which encloses the semiconductor die (304) and a portion of the lead frame (200); and
separating the package structure a packaged electronic device from a remaining portion of the lead frame.
Lin teaches, in claim 11, wherein the non-screen printing process is an inkjet printing process. (figures 9A-9E; [0046-0053])
Lin teaches, in claim 13, a method, comprising: (figures 9A-9E; [0046-0053])
performing a non-screen printing process (907) that deposits solder (702) on one of a lead frame (200) and or on conductive features of a semiconductor die (304) or wafer, wherein the non-screen printing process (907) deposits the solder using: a first print head (907) that deposits first particles in a first solvent; and
a second print head that deposits second particles in a second solvent;
engaging the semiconductor die to the lead frame;
performing a thermal process that reflows the solder;
performing a molding process that forms a package structure, which encloses the semiconductor die and a portion of the lead frame; and
separating the package structure a packaged electronic device from a remaining portion of the lead frame.
Lin teaches, in claim 14, a method, comprising: (figures 9A-9E; [0046-0053])
performing a non-screen printing process (907) that deposits solder on a stepped surface of a lead frame or on a tapered surface of a lead of a packaged electronic device.
Lin teaches, in claim 15, wherein the non-screen printing process is an inkjet printing process. (figures 9A-9E; [0046-0053])
Lin teaches, in claim 17, wherein performing the non-screen printing process comprises:
controlling a spacing distance between a print head and the uneven surface of the lead frame or the uneven surface of the lead of the packaged electronic device according to a contour of the uneven surface.
Lin teaches, in claim 18, a method, comprising: (figures 9A-9E; [0046-0053])
performing a non-screen printing process that deposits solder on or in a conductive via of a laminate structure.
Lin teaches, in claim 19, wherein the non-screen printing process is an inkjet printing process. (figures 9A-9E; [0046-0053])
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 12, 20 and 26-30 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (US PGPub 2017/0162530, hereinafter referred to as “Lin”) in view of Zhang et al. (US PGPub 2020/0381390, hereinafter referred to as “Zhang”).
Lin discloses the semiconductor method substantially as claimed. See figures 1A-9E, with emphasis on figures 9A-9E, and corresponding text, where Lin shows, in claim 12, a method, comprising: (figures 9A-9E; [0046-0053])
performing an 0printing process that deposits solder on one of a lead frame and or on conductive features of a semiconductor die or wafer;
engaging the semiconductor die to the lead frame;
performing a thermal process that reflows the solder;
performing a molding process that forms a package structure which encloses the semiconductor die and a portion of the lead frame; and
separating the package structure a packaged electronic device from a remaining portion of the lead frame.
However, Lin fails to show, in claim 12, performing an electrostatic printing process.
Zhang teaches, in claim 12, that it is known in the art of printing ink performing an electrostatic printing process ([0023]). In addition, provides the advantages of improving ink adhesion ([0019]).
Therefore, it would have been obvious to one of ordinary skill in the art before the filing date of the claimed invention, to incorporate performing an electrostatic printing process, in the method of Lin, according to the teachings of Zhang, with the motivation of improving ink adhesion using conventional techniques known in the art.
Lin shows, in claim 20, a method, comprising: (figures 9A-9E; [0046-0053])
performing a non-screen printing process that deposits solder on or in a conductive via of a laminate structure, wherein the non-screen printing process.
However, Lin fails to show, in claim 20, performing an electrostatic printing process.
Zhang teaches, in claim 20, that it is known in the art of printing ink performing an electrostatic printing process ([0023]). In addition, provides the advantages of improving ink adhesion ([0019]).
Therefore, it would have been obvious to one of ordinary skill in the art before the filing date of the claimed invention, to incorporate performing an electrostatic printing process, in the method of Lin, according to the teachings of Zhang, with the motivation of improving ink adhesion using conventional techniques known in the art.
Lin shows, in claim 26, a method, comprising: (figures 9A-9E; [0046-0053])
providing a conductive structure of a lead frame or semiconductor die or wafer or substrate; and
forming a solder layer on the conductive structure, the solder layer comprising co- diffused metallic nanoparticles of two metals,.
Lin fails to show, in claim 26, the nanoparticles having respective diameters of 20 nm or more and 20 um or less.
Zhang teaches, in claim 26, a plurality of metal particles to range from 10 um to 150 um ([0022]).
Therefore, it would have been obvious to one of ordinary skill in the art before the filing date of the claimed invention, to incorporate, the nanoparticles having respective diameters of 20 nm or more and 20 um or less, in the method of Lin, according to the teachings of Zhang, with the motivation of improving ink adhesion using conventional techniques known in the art.
Lin in view of Zhang shows, in claim 27, wherein a ratio of concentrations of the two metals in the solder layer varies along at least one direction. (figures 9A-9E; [0046-0053])
Lin in view of Zhang shows, in claim 28, wherein: (figures 9A-9E; [0046-0053])
the solder layer comprises co-diffused metallic nanoparticles of tin, silver, and copper; and
a ratio of concentrations of two of tin, silver, and copper in the solder layer varies along the at least one direction.
Lin in view of Zhang shows, in claim 29, wherein the ratio of concentrations of the two of tin, silver, and copper in the solder layer varies along two or more mutually orthogonal directions. (figures 9A-9E; [0046-0053])
Lin in view of Zhang shows, in claim 30, wherein a ratio of concentrations of the two metals in the solder layer varies along two or more mutually orthogonal directions. (figures 9A-9E; [0046-0053])
Response to Arguments
Applicant’s arguments with respect to claim(s) 1, 3-20, and 26-30 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
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/STANETTA D ISAAC/Examiner, Art Unit 2898 February 21, 2026