DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The amendment filed on 09/13/2025 has been entered. Claims 1-3 and 14 have been amended. Claims 7-12 and 14-20 were previously withdrawn under 37 CFR 1.142(b) as being directed to a nonelected invention. Applicant’s amendments to the claims are noted. Therefore, claims 1-6 and 13 remain pending in the application.
Response to Arguments
Applicant's arguments filed on 09/13/2025 have been fully considered but they are not persuasive. Regarding the arguments on pages 11-15, Son (US20200168683A1) teaches the one side end surface among the plurality of side end surfaces that is farther away from the substrate is closer to the display region compared with another side end surface among the plurality of side end surfaces that is adjacent to the substrate (Fig, 10, second side of the interlayer insulating film 102a is closer to the display region EA compared to the first side of gate insulating film 116); and
the light emitting layer is continuous in a horizontal projection over the base substrate while discontinuous vertically with discontinuous edges aligned at least at a position having one of the plurality of indented structures and directly above the one of the plurality of indented structures (Para [0051-0053] and Fig. 3A, the light emitting stack 134 is continuous in a horizontal view while vertically disconnected).
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 1 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, because the specification, while being enabling for an isolation pillar having a simple layered configurations, does not reasonably provide enablement for a broad scope of “multi-layer structure” encompassing various combinations of materials, thicknesses and arrangements. The specification does not enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the invention commensurate in scope with these claims.
Claims 2-6 and 13 are also rejected being dependent on rejected claim 1.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim(s) 1-6 and 13 is/are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites term “a plurality of side end surfaces”, which is indefinite because specification does not define what constitutes a “side end” relative to the substrate or other structural element.
Claim 1 also recites the term “a plurality of indented structures”, which is vague because the specification does not clearly describe the extent shape, or purpose of such indentation.
Claim 1 also recites the term “a structural layer”, which is indefinite because the specification does not clearly describe what the structural layer comprises or how it is distinguished from other layers, such as a substrate, buffer layer, or barrier layer.
Claim 1 also recite the term “a side of the side end surface”, which is indefinite because it is unclear which portion of the plurality of side end surface is being referred to or what direction or boundary constitute the side.
Claims 2-6 and 13 are also rejected being dependent on rejected claim 1.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 3-6, and 13 is/are rejected under 35 U.S.C. 102(a)(1)/102(a)(2) as being anticipated by Son (US20200168683A1).
Regarding claim 1, Son teaches a display substrate (substrate 101), comprising: a cut-out area (hole area HA);
a display region surrounding the cut-out area (Para [0057], emission area EA surrounding the hole area HA); and
an isolation region surrounding the cut-out area being located between the cut-out area and the display area (Para [0064], bezel area BA between the hole area HA and emission area EA), the isolation region comprising at least one isolation pillar (structure between blocking hole 110 in the brezel area BA) and at least two packing dams (inner dam 105 in the brezel area BA);
wherein the display substrate further comprises:
a base substrate (substrate 101) having a barrier layer (multi-buffer layer 112);
a buffer layer on the base substrate (active buffer layer 114);
a first gate insulation layer on the buffer layer (gate insulating film 116);
a second gate insulation layer on the first gate insulation layer (first interlayer insulating films 102a); and
an interlayer insulation layer on the second gate insulation layer (second interlayer insulating layer 102b);
wherein:
the at least one isolation pillar is formed of a portion of the barrier layer, a portion of the buffer layer, a portion of the first gate insulation layer, a portion of the second gate insulation layer, and a portion of the interlayer insulation layer (Para [0068] and Fig. 10, structure between blocking hole 110 in the brezel area BA);
the at least one isolation pillar comprising a multi-layer structure having a plurality of side end surface being provided in the isolation region (Fig. 10, structure between blocking hole 10 including a multi-layer structure).
a plurality of indented structures are formed at least along part of the plurality of side end surfaces of the at least one isolation pillar, wherein a side of the side end surface proximal to the substrate is indented inward compared to the side facing away from the substrate (Fig, 10, first side of gate insulating film 116 is indented toward the substrate 101 compared to the second side of the interlayer insulating film 102a);
a light emitting layer is provided on a side of a structural layer facing away from the substrate (Fig. 10, light emitting element 130);
wherein one side end surface among the plurality of side end surfaces that is farther away from the substrate is closer to the display region compared with another side end surface among the plurality of side end surfaces that is adjacent to the substrate (Fig, 10, second side of the interlayer insulating film 102a is closer to the display region EA compared to the first side of gate insulating film 116).
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Regarding claim 3, Son teaches the display substrate according to claim 1, wherein the plurality of indented structures are formed at any single layer or combination of the barrier layer, the buffer layer, the first gate insulation layer, the second gate insulation layer, and the interlayer insulation layer (Para [0047] and Fig. 3A, blocking hole 110 is disposed between each inner dam 108 and the substrate hole 120).
Regarding claim 4, Son teaches the display substrate according to claim 1, wherein a first layer of the at least one isolation pillar is formed having a first etching pattern (Para [0065-0068 and Figs. 5A-5C], selectively etching process of the first to third interlayer insulating films 102a, 102b, and 102c, the gate insulating film 116 and the active buffer layer 114, the first and third interlayer insulating films 102 a and 102c (or the second interlayer insulating film 102b)).
Regarding claim 5, Son teaches the display substrate according to claim 4, wherein a second layer of the at least one isolation pillar is formed having a second etching pattern (Para [0065-0068 and Figs. 5A-5C], selectively etching process of the first to third interlayer insulating films 102a, 102b, and 102c, the gate insulating film 116 and the active buffer layer 114, the first and third interlayer insulating films 102 a and 102c (or the second interlayer insulating film 102b)).
Regarding claim 6, Son teaches the display substrate according to claim 1, wherein the cut-out area comprises a cutting opening (substrate hole 120 in the hole area HA) and a plurality of layers surrounding the cutting opening, and the plurality of layers are in a same layer with the barrier layer, the buffer layer, the first gate insulation layer, the second gate insulation layer and the interlayer insulation layer (Para [0056], through hole 170 is formed to pass through portions of the inorganic insulating layers 112, 114, 116, and 102, the light emitting stack 134, the cathode 136, and the inorganic encapsulation layers 142 and 146 disposed in the hole area HA and an area disposed therearound, thereby exposing an upper surface of the substrate 101.).
Regarding claim 13, Son teaches the display substrate according to claim 1, further comprising:
a circuit structure within the display region (Para [0026], pixel driving circuit includes a switching transistor TS, a driving transistor TD, and a storage capacitor Cst.);
a pixel-defining structure provided above the circuit structure within the display region (Fig. 1, unit pixel);
an anode provided above the pixel-defining area (Para [0035], the anode 132 is electrically connected to the drain electrode 158 of the driving transistor (TD) 150 exposed through a pixel contact hole 126 passing through a planarization layer 104 disposed on the driving transistor (TD) 150), wherein the light-emitting layer is disposed above the anode (Para [0026], Unit pixels, each of which includes a light emitting element 130, are disposed in the emission areas EA); and
a cathode being provided above the light-emitting layer (Para [0038], The cathode 136 is formed on upper surfaces and side surfaces of the light emitting stack 134 and the bank 138, to face the anode 132 under the condition that the light emitting stack 134 is interposed between the anode 132 and the cathode 136).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Son (US20200168683A1) as applied to claim 1 above, and further in view of Won (US20200194714A1).
Regarding claim 2, Son teaches the display substrate according to claim 1, wherein the base substrate comprises:
a first layer (substrate 101); and
a first barrier layer on the first polyimide layer (Para [0032] and Fig. 3A, bottom layer of the multi-buffer layer 112 which delay diffusion of moisture and/or oxygen); wherein the barrier layer and the buffer layer are above the first barrier layer (top layer of the multi-buffer layer 112 and the active buffe layer 114);
the light emitting layer is continuous in a horizontal projection over the base substrate while discontinuous vertically with discontinuous edges aligned at least at a position having one of the plurality of indented structures and directly above the one of the plurality of indented structures (Para [0051-0053] and Fig. 3A, the light emitting stack 134 is continuous in a horizontal view while vertically disconnected).
But Son does not specify a first polyimide layer.
However, Won teaches a first polyimide layer (Para [0059], substrate 101 is made of polyimide).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to modify a display device of Son (US20200168683A1) and further include an alternative material of a display device by Won (US20200194714A1). The display device that involves the combination of familiar elements can reduce the size of the display device by minimizing the bezel area in the active and non-active area of the display panel (Para [0057] in Won).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAHAE KIM whose telephone number is (571)270-1844. The examiner can normally be reached M-F 9-5.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Fernando Toledo can be reached at (571) 271-1867. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/FERNANDO L TOLEDO/Supervisory Patent Examiner, Art Unit 2897
/JAHAE KIM/Examiner, Art Unit 2897