Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
2. Claims 31-34 are added. Claims 1-34 are pending.
Response to Arguments
With regards to applicant’s arguments, filed on 2/12/2026, have been fully considered but they are not persuasive. The applicant asserts, with respect to claims 1-30 that combination of Intel and Wang does not teach or suggest: “convert the data from the second data format of the second vendor to the first data format of the first vendor to communicate the data from the one or more MAC 5G-NR network layers to the one or more PHY 5G-NR network layers”. Examiner respectfully disagrees.
The combination of Intel and Wang, specifically Intel teaches Intel discloses methods using a MAC-PHY interface between a distributed unit of a New Radio base station and a central unit of a New Radio base station. (See Intel; Par. [2]-[3]) The method enables a medium access control layer (MAC) and physical layer (PHY) split (MAC-PHY split) in a long term evolution (LTE) and/or LTE New Radio (LTE NR [5G]) protocol stack of a radio access network (RAN) node between a central unit (CU) and a distributed unit (DU). For example, a single CU can communicate MAC scheduling information to multiple DUs [in the PHY Layer] over a MAC-PHY interface. An interface between the MAC entity in a CU and the PHY entities in DUs can be defined [Therefore, between the MAC entity in the CU and the PHY entities in DUs. A centralized MAC scheduler controlling multiple DUs [Multiple PHY entities] and having the radio information for multiple cells. The interface between the CU and DUs may be designed so that the scheduling operation through bi-directional interactions between the MAC entity in the CU and the PHY entities] (See Intel; Par. [16] – [17], [105] and Fig. 2)
Intel, further teaches that the MAC entity in the CU may be connected to multiple DUs each comprising at least part of the PHY layer and RF components. Interfaces 218 and 220 between the controller 210 in the CU 202 and the PHY entities 214 and 216 in the DUs 204 and 206 can be called MAC-PHY interfaces. In some embodiments, the interface between the controller and the MAC entity within the CU is an ideal interface (Proprietary) [As known in the art, is a software library interface "specific to one device or, more likely to a number of devices within a particular manufacturer's product range. The motivation for using a proprietary API can be vendor lock-in (Vendor-Specific). Proprietary Interface is an Interface developed by Vendor for Interoperability between Vendor Components. Since Interfaces 218 and 220 between the controller 210 in the CU 202 and the PHY entities 214 and 216 in the DUs 204 and 206. And since the Interfaces 218 and 220 are proprietary, then the interface communicate data between two vendors] (See Intel; Par. [20] – [24] and Fig. 2)
On the other hand, Wang teaches an Access Node (AN) 208 may communicate with the Core Network (CN) 202 (via a backhaul interface). The AN 208 may communicate with the AMF 204 via an N2 interface. The AN 208 may communicate with the UPF 208 via an N3 interface. In a wireless communication network, a packet of information may flow through several sub-layers of the communication protocol stack as it travels from one node to another. As shown in FIG. 7, the 5G new radio (NR) protocol stack is illustrated with the higher layers on top, such that an internet protocol (IP) packet progresses downward through the stack. The packet enters the protocol stack through the service data adaptation protocol (SDAP) layer and travels down the protocol stack through a PDCP layer, a RLC layer, and a MAC layer. Each protocol layer may manipulate the data by adding header or sub-header information, converting the data into different formats, and/or combining packets to form larger packets. The MAC layer generates a MAC protocol data unit (PDU) which may include multiple MAC SDUs or only one MAC SDU. Essentially, the MAC PDU becomes the PHY SDU when transmitted to the PHY layer. When the receiving node receives the data, the data may work its way back up through a protocol stack at the receiving node. The protocol at each layer may reverse the processing that was done by the corresponding layer by the transmitting node; headers may be removed, data may be converted back to its original format, packets that were split into smaller packets may be recombined into larger messages, and so on. The packet may again progress downward through the protocol layers such that the TB is in a format supported by a link between the relay node and a destination node. Thus, when the packet reaches the PHY layer, it may again be sent to a destination node [Therefore, each protocol layer may manipulate the data by adding header or sub-header information, converting the data into different formats. The MAC layer generates a MAC protocol data unit (PDU) which may include multiple MAC SDUs or only one MAC SDU [Has the MAC data format]. The MAC PDU becomes the PHY SDU [Has the PHY data format]when transmitted to the PHY layer]. (See Wang; Par. [52] – [53], [72] – [74] and Fig. 7)
Therefore, and for the reasons set above, combination of Intel and Wang teaches the claimed invention. The rejection of claims 1-30 is sustained.
Claim Rejections - 35 USC § 103
3. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
4. Claims 1, 9-10, 17, 22-24, 29-31 and 34 are rejected under 35 U.S.C. 103 as being unpatentable over the PCT application of Intel (PCT Pub. No. WO 2018/063998 A1, referred to as Intel and admitted by the applicant’s IDS filed on 8/17/2022) in view of Wang et al. (US. Pub. No. 2022/0132553 A1).
Regarding claim 1, Intel discloses one or more processors (See Intel; Fig.9; Hardware resources 900 including one or more processor 910) comprising: circuitry (See Intel; Fig.9; one or more communication resources 930) to obtain data to be communicated using a first interface (See Fig. 2; 2018 & 220; MAC-PHY interface(s)) between one or more physical (PHY) Fifth Generation New Radio (5G-NR) network layers and one or more medium access control (MAC) 5G-NR network layers (See Par. [3], [16]-[17], [105] and Fig. 2 of Intel for a reference to a new radio (NR) BS for providing a set of UEs access to a 5G Core network. Data is exchanged between a set of distributing units (DUs) [Fig. 2; 204 & 206], comprising a physical layer (PHY) entity and a central unit (CU) [Fig. 2; 202], comprising a medium access control layer (MAC) entity).
Intel does not explicitly disclose that one or more physical 5G-NR layers having a first data format specific to a first vendor and one or more (MAC) 5G-NR network layers having a second data format specific to a second vendor that is different from the first vendor, and convert the data from the second data format of the second vendor to the first data format of the first vendor to communicate the data from the one or more MAC 5G-NR network layers to the one or more PHY 5G-NR network layers.
However, Wang discloses one or more physical 5G-NR layers having a first data format specific to a first vendor and one or more (MAC) 5G-NR network layers having a second data format specific to a second vendor that is different from the first vendor (See Par. [52]-[53], [73] and Fig. 2 of Wang for a reference to the F1-C interface that connects the gNB one or more central unit (CU) to one or more gNB distributed unit (DU) [DUs and CUs represent different vendors implementing different layer protocols] The MAC layer has a MAC protocol data unit (PDU) which may include multiple MAC SDUs or only one MAC SDU of a specific format, while the physical Layer has a PHY SDU of a different format), and convert the data from the second data format of the second vendor to the first data format of the first vendor to communicate the data from the one or more MAC 5G-NR network layers to the one or more PHY 5G-NR network layers (See Par. [72]-[73] and Fig. 7 of Wang for a reference to that each protocol layer may manipulate the data by adding header or sub-header information, converting the data into different formats. The MAC layer generates a MAC protocol data unit (PDU) which may include multiple MAC SDUs or only one MAC SDU [Has the MAC data format]. The MAC PDU becomes the PHY SDU [Has the PHY data format]when transmitted to the PHY layer).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Wang to Intel. The motivation of combination would be improving the system’s performance, by providing improved communications between access points and stations in a wireless network through providing a common protocol that enables different wireless devices to communicate on a municipal, national, regional, and even global level. (Wang; Par.[5]-[7]).
Regarding claim 9, the claim is interpreted and rejected for the same reasons as set forth in claim 1, including a system comprising: one or more processors (See Intel; Fig.9; Hardware resources 900 including one or more processor 910).
Regarding claim 10, the combination of Intel and Wang, specifically Intel discloses wherein the first interface translates the data to be communicated between the one or more PHY 5G-NR network layers and the one or more MAC 5G-NR network layers (See Par. [44], [90], [124], [139] and Fig. 4 of Intel for a reference to the MAC layer performs mapping between logical channels and transport channels, multiplexing of MAC SDUs from one or more logical channel onto transport blocks to be transferred to the PHY layer via transport channels over an API).
Regarding claim 17, the claim is interpreted and rejected for the same reasons as set forth in claim 1, including a non-transitory machine-readable medium having stored thereon a set of instructions (See Intel; Par. [139] for a reference to a machine- readable storage medium wherein, when the program code is loaded into and executed by a machine).
Regarding claim 22, the combination of Intel and Wang, specifically Intel discloses translate, using the first interface, the data to be communicated from one or more second interfaces for each of the one or more MAC 5G-NR network layers to a third interface corresponding to the one or more PHY 5G-NR network layers (See Par. [44], [90], [124], [139] and Fig. 4 of Intel for a reference to the MAC layer performs mapping between logical channels and transport channels, multiplexing of MAC SDUs from one or more logical channel onto transport blocks to be transferred to the PHY layer via transport channels over an API).
Regarding claim 23, the combination of Intel and Wang, specifically Intel discloses translate, using the first interface, the data to be communicated from a second interface corresponding to the one or more PHY 5G-NR network layers to one or more third interfaces for each of the one or more MAC 5G-NR network layers (See Par. [44], [90], [124], [139] and Fig. 4 of Intel for a reference to the MAC layer performs mapping between logical channels and transport channels, multiplexing of MAC SDUs from one or more logical channel onto transport blocks to be transferred to the PHY layer via transport channels over an API).
Regarding claim 24, the claim is interpreted and rejected for the same reasons as set forth in claim 1.
Regarding claim 29, the combination of Intel and Wang, specifically Intel discloses translating, by the first interface, the data received from one or more second interfaces for each of the one or more MAC 5G-NR network layers to a third interface corresponding to the one or more PHY 5G-NR network layers (See Par. [44], [90], [124], [139] and Fig. 4 of Intel for a reference to the MAC layer performs mapping between logical channels and transport channels, multiplexing of MAC SDUs from one or more logical channel onto transport blocks to be transferred to the PHY layer via transport channels over an API).
Regarding claim 30, the combination of Intel and Wang, specifically Intel discloses translating, by the first interface, the data received from a second interface corresponding to the one or more PHY 5G-NR network layers to one or more third interfaces for each of the one or more MAC 5G-NR network layers (See Par. [44], [90], [124], [139] and Fig. 4 of Intel for a reference to the MAC layer performs mapping between logical channels and transport channels, multiplexing of MAC SDUs from one or more logical channel onto transport blocks to be transferred to the PHY layer via transport channels over an API).
Regarding claim 31, Intel does not explicitly disclose wherein the data is to be converted by translation of vendor-specific interface messaging between the MAC 5G-NR network layers and the PHY 5G-NR network layers into a common PHY interface format.
However, Wang discloses wherein the data is to be converted by translation of vendor-specific interface messaging between the MAC 5G-NR network layers and the PHY 5G-NR network layers into a common PHY interface format (See Par. [5], [72]-[74] and Fig. 7 of Wang for a reference to that each protocol layer may manipulate the data by adding header or sub-header information, converting the data into different formats. The MAC layer generates a MAC protocol data unit (PDU) which may include multiple MAC SDUs or only one MAC SDU [Has the MAC data format]. The MAC PDU becomes the PHY SDU [Has the PHY data format]when transmitted to the PHY layer).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Wang to Intel. The motivation of combination would be improving the system’s performance, by providing improved communications between access points and stations in a wireless network through providing a common protocol that enables different wireless devices to communicate on a municipal, national, regional, and even global level. (Wang; Par.[5]-[7]).
Regarding claim 34, the claim is interpreted and rejected for the same reasons as set forth in claim 31.
5. Claims 2-8, 11-16, 18-21, 25-28 and 32-33 are rejected under 35 U.S.C. 103 as being unpatentable over Intel in view of Wang et al. and further in view of Bakalash et al. (US. Pub. No. 2008/0165198 A1).
Regarding claim 2, the combination of Intel and Wang does not explicitly disclose the one or more processors of claim 1, further comprising: a PHY 5G-NR driver to provide an application programming interface to the first interface; one or more signal processing libraries accessible through the application programming interface; and one or more parallel processing units accessible through the application programming interface.
However, Bakalash discloses a PHY 5G-NR driver to provide an application programming interface to the first interface (See Par. [48], [63]-[64] and Figs. 1, 6 & 7 of Bakalash for a reference to the CPU 120 comprises a vendor’s graphic processing unit (GPU) driver for allowing the GPUs to interact with the graphic libraries through the software hub driver 123 [mapped to an API]);
one or more signal processing libraries accessible through the application programming interface (See Par. [28], [31], [48], [51] of Bakalash for a reference to the CPU 120 comprises one or more graphics libraries 122 for storing data used to implement the graphic commands. GPU drivers allow GPUs to interact with graphics libraries through the software hub driver 123 [mapped to the API]); and
one or more parallel processing units accessible through the application programming interface (See Par. [48], [50], [76]-[78] and Fig. 1 of Bakalash for a reference to the hardware hub of the CPU is interfaced with a plurality (Cluster) of graphic processing units (GPUs) 130, arranged in a parallel architecture and support parallel processing. The software hub 110 [API] composites graphic output for display according to parallel mode).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Wang. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 3, the combination of Intel specifically Intel discloses wherein the first interface translates the data communicated by the one or more MAC 5G-NR network layers and provides the data to the PHY 5G-NR driver through the application programming interface (See Par. [44], [90], [124], [139] and Fig. 4 of Intel for a reference to the MAC layer performs mapping between logical channels and transport channels, multiplexing of MAC SDUs from one or more logical channel onto transport blocks to be transferred to the PHY layer via transport channels over an API).
Intel does not explicitly disclose the first interface interfaces with a plurality of different data formats specific to different vendors, the plurality of different data formats comprising the second data format of the second vendor.
However Wang discloses the first interface interfaces with a plurality of different data formats specific to different vendors, the plurality of different data formats comprising the second data format of the second vendor (See Par. [52]-[53], [72]-[73] and Fig. 7 of Wang for a reference to that each protocol layer may manipulate the data by adding header or sub-header information, converting the data into different formats. The MAC layer generates a MAC protocol data unit (PDU) which may include multiple MAC SDUs or only one MAC SDU [Has the MAC data format]. The MAC PDU becomes the PHY SDU [Has the PHY data format]when transmitted to the PHY layer. The F1-C interface that connects the gNB one or more central unit (CU) to one or more gNB distributed unit (DU) [DUs and CUs represent different vendors implementing different layer protocols]).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Wang to Intel. The motivation of combination would be improving the system’s performance, by providing improved communications between access points and stations in a wireless network through providing a common protocol that enables different wireless devices to communicate on a municipal, national, regional, and even global level. (Wang; Par.[5]-[7]).
Regarding claim 4, the combination of Intel and Wang does not explicitly disclose wherein the one or more MAC 5G-NR network layers use the first interface to communicate data to one or more functions provided by one or more signal processing libraries to be performed by one or more parallel processing units.
However, Bakalash discloses wherein the one or more MAC 5G-NR network layers use the first interface to communicate data to one or more functions provided by one or more signal processing libraries to be performed by one or more parallel processing units (See Par. [32], [50], [52] of Bakalash for a reference to the hardware hub 110 distributes data streams and graphics between GPUs and composites graphics output for display according to the parallel mode. Hardware hub controls the application 121 along with the graphic library 122).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Wang. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 5, the combination of Intel and Wang does not explicitly disclose wherein the one or more PHY 5G-NR network layers comprise an application programming interface to perform parallel computing accessible through the first interface.
However, Bakalash discloses wherein the one or more PHY 5G-NR network layers comprise an application programming interface to perform parallel computing accessible through the first interface (See Par. [48], [51], [61] and Figs. 6 & 7 of Bakalash for a reference to software hub driver 123 [Mapped to the API] determines and forwards graphics commands [Functions] and data streams to the cluster of GPUs 130 to perform parallel processing via the CPU interface).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Wang. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 6, the combination of Intel and Wang does not explicitly disclose wherein the one or more PHY 5G-NR network layers comprise one or more signal processing libraries implementing operations to be performed by one or more parallel processing units, the operations invoked using the first interface.
However, Bakalash discloses wherein the one or more PHY 5G-NR network layers comprise one or more signal processing libraries implementing operations to be performed by one or more parallel processing units, the operations invoked using the first interface (See Par. [48], [50]-[51], [76]-[78] of Bakalash for a reference to the CPU 120 comprises one or more graphics libraries 122 for storing data used to implement the graphic commands. GPU drivers allow GPUs to interact with graphics libraries through the software hub driver 123 [mapped to the API]. he hardware hub of the CPU is interfaced with a plurality (Cluster) of graphic processing units (GPUs) 130, arranged in a parallel architecture and support parallel processing. The software hub 110 [API] composites graphic output for display according to parallel mode).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Wang. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 7, the combination of Intel and Wang does not explicitly disclose wherein the one or more PHY 5G-NR network layers comprise a second interface to access one or more parallel processing units, the second interface usable by the first interface to communicate the data from the one or more MAC 5G-NR network layers to the one or more parallel processing units.
However, Bakalash discloses wherein the one or more PHY 5G-NR network layers comprise a second interface to access one or more parallel processing units, the second interface usable by the first interface to communicate the data from the one or more MAC 5G-NR network layers to the one or more parallel processing units (See Par. [32], [50], [52] of Bakalash for a reference to the hardware hub 110 distributes data streams and graphics between GPUs and composites graphics output for display according to the parallel mode. Hardware hub controls the application 121 along with the graphic library 122).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Wang. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 8, the combination of Intel and Wang does not explicitly disclose wherein the first interface indicates one or more signal processing operations to be performed by the one or more parallel processing units using the second interface.
However, Bakalash discloses wherein the first interface indicates one or more signal processing operations to be performed by the one or more parallel processing units using the second interface (See Par. [64] and Fig. 7 of Bakalash for a reference to OS interface [First interface] is responsible for the interception of graphic commands from the graphics library, forwarding and creating graphic commands [functions] to vendor’s GPU driver, and controlling the hardware hub [Second interface], which distributes data streams and commands to the plurality of GPUs for parallel processing).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Wang. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 11, the combination of Intel and Wang does not explicitly disclose wherein: the one or more PHY 5G-NR network layers comprise a driver to access one or more signal processing libraries; the driver provides an application programming interface; and the first interface translates the data to be communicated based, at least in part, on the signal processing libraries accessible by the application programming interface.
However, Bakalash discloses wherein: the one or more PHY 5G-NR network layers comprise a driver to access one or more signal processing libraries (See Par. [48], [51], [63]-[64] and Figs. 1, 6 & 7 of Bakalash for a reference to the CPU 120 comprises a vendor’s graphic processing unit (GPU) driver for allowing the GPUs to interact with the graphic libraries through the software hub driver 123 [mapped to an API]. The CPU 120 comprises one or more graphics libraries 122 for storing data used to implement the graphic commands. GPU drivers allow GPUs to interact with graphics libraries through the software hub driver 123);
the driver provides an application programming interface (See Par. [48], [51], [61] and Figs. 6 & 7 of Bakalash for a reference to software hub driver 123 [Mapped to the API] determines and forwards graphics commands [Functions] and data streams to the cluster of GPUs 130 to perform parallel processing via the CPU interface); and
the first interface translates the data to be communicated based, at least in part, on the signal processing libraries accessible by the application programming interface (See Par. [48], [50], [76]-[78] and Fig. 1 of Bakalash for a reference to the hardware hub of the CPU is interfaced with a plurality (Cluster) of graphic processing units (GPUs) 130, arranged in a parallel architecture and support parallel processing. The software hub 110 [API] composites graphic output for display according to parallel mode).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Wang. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 12, the combination of Intel and Wang does not explicitly disclose wherein the one or more PHY 5G-NR network layers comprise one or more signal processing libraries and the first interface determines one or more operations of the one or more signal processing libraries to be performed by one or more parallel processing units based, at least in part, on the data to be communicated.
However, Bakalash discloses wherein the one or more PHY 5G-NR network layers comprise one or more signal processing libraries and the first interface determines one or more operations of the one or more signal processing libraries to be performed by one or more parallel processing units based, at least in part, on the data to be communicated (See Par. [48], [50]-[51], [76]-[78] of Bakalash for a reference to the CPU 120 comprises one or more graphics libraries 122 for storing data used to implement the graphic commands. GPU drivers allow GPUs to interact with graphics libraries through the software hub driver 123 [mapped to the API]. he hardware hub of the CPU is interfaced with a plurality (Cluster) of graphic processing units (GPUs) 130, arranged in a parallel architecture and support parallel processing. The software hub 110 [API] composites graphic output for display according to parallel mode).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Wang. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 13, the combination of Intel and Wang does not explicitly disclose wherein the one or more PHY 5G-NR network layers comprise a second interface to access one or more parallel processing units, and the first interface accesses the one or more parallel processing units through the second interface.
However, Bakalash discloses wherein the one or more PHY 5G-NR network layers comprise a second interface to access one or more parallel processing units (See Par. [32], [50], [52] of Bakalash for a reference to the hardware hub 110 distributes data streams and graphics between GPUs and composites graphics output for display according to the parallel mode. Hardware hub controls the application 121 along with the graphic library 122), and the first interface accesses the one or more parallel processing units through the second interface (See Par. [64] and Fig. 7 of Bakalash for a reference to OS interface [First interface] is responsible for the interception of graphic commands from the graphics library, forwarding and creating graphic commands [functions] to vendor’s GPU driver, and controlling the hardware hub [Second interface], which distributes data streams and commands to the plurality of GPUs for parallel processing).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Wang. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 14, the combination of Intel and Wang does not explicitly disclose wherein the one or more PHY 5G-NR network layers comprise a second interface, and the first interface indicates one or more signal processing functions to be performed by one or more parallel processing units using the second interface.
However, Bakalash discloses wherein the one or more PHY 5G-NR network layers comprise a second interface (See Par. [32], [50], [52] of Bakalash for a reference to the hardware hub 110 distributes data streams and graphics between GPUs and composites graphics output for display according to the parallel mode. Hardware hub controls the application 121 along with the graphic library 122), and the first interface indicates one or more signal processing functions to be performed by one or more parallel processing units using the second interface (See Par. [64] and Fig. 7 of Bakalash for a reference to OS interface [First interface] is responsible for the interception of graphic commands from the graphics library, forwarding and creating graphic commands [functions] to vendor’s GPU driver, and controlling the hardware hub [Second interface], which distributes data streams and commands to the plurality of GPUs for parallel processing).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Wang. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 15, the combination of Intel and Wang, specifically Intel discloses wherein: the first interface translates the data to be communicated from the one or more second interfaces to the one or more third interfaces (See Par. [44], [90], [124], [139] and Fig. 4 of Intel for a reference to the MAC layer performs mapping between logical channels and transport channels, multiplexing of MAC SDUs from one or more logical channel onto transport blocks to be transferred to the PHY layer via transport channels over an API).
the combination of Intel and Wang does not explicitly disclose each of the one or more MAC 5G-NR network layers comprise one or more second interfaces; each of the one or more PHY 5G-NR network layers comprise one or more third interfaces.
However, Bakalash discloses each of the one or more MAC 5G-NR network layers comprise one or more second interfaces (See Par. [32], [50], [52] of Bakalash for a reference to the hardware hub 110 distributes data streams and graphics between GPUs and composites graphics output for display according to the parallel mode. Hardware hub controls the application 121 along with the graphic library 122); each of the one or more PHY 5G-NR network layers comprise one or more third interfaces (See Par. [32], [50], [52] of Bakalash for a reference to the hardware hub 110 distributes data streams and graphics between GPUs and composites graphics output for display according to the parallel mode. Hardware hub controls the application 121 along with the graphic library 122).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Wang. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 16, the combination of Intel and Wang, specifically Intel discloses wherein: the first interface translates the data to be communicated from the one or more second interfaces to the one or more third interfaces (See Par. [44], [90], [124], [139] and Fig. 4 of Intel for a reference to the MAC layer performs mapping between logical channels and transport channels, multiplexing of MAC SDUs from one or more logical channel onto transport blocks to be transferred to the PHY layer via transport channels over an API).
the combination of Intel and Wang does not explicitly disclose each of the one or more PHY 5G-NR network layers comprise one or more second interfaces; each of the one or more MAC 5G-NR network layers comprise one or more third interfaces.
However, Bakalash discloses each of the one or more PHY 5G-NR network layers comprise one or more second interfaces (See Par. [32], [50], [52] of Bakalash for a reference to the hardware hub 110 distributes data streams and graphics between GPUs and composites graphics output for display according to the parallel mode. Hardware hub controls the application 121 along with the graphic library 122); each of the one or more MAC 5G-NR network layers comprise one or more third interfaces (See Par. [32], [50], [52] of Bakalash for a reference to the hardware hub 110 distributes data streams and graphics between GPUs and composites graphics output for display according to the parallel mode. Hardware hub controls the application 121 along with the graphic library 122).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Wang. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 18, the combination of Intel and Wang does not explicitly disclose determine one or more signal processing operations corresponding to the one or more PHY 5G-NR network layers to be performed by one or more parallel processing units; communicate the data using the first interface to a second interface, the second interface corresponding to the one or more parallel processing units; and perform the one or more signal processing operations on the data using the one or more parallel processing units.
However, Bakalash discloses determine one or more signal processing operations corresponding to the one or more PHY 5G-NR network layers to be performed by one or more parallel processing units (See Par. [48], [50], [76]-[78] and Fig. 1 of Bakalash for a reference to the hardware hub of the CPU is interfaced with a plurality (Cluster) of graphic processing units (GPUs) 130, arranged in a parallel architecture and support parallel processing. The software hub 110 [API] composites graphic output for display according to parallel mode); communicate the data using the first interface to a second interface, the second interface corresponding to the one or more parallel processing units (See Par. [64] and Fig. 7 of Bakalash for a reference to OS interface [First interface] is responsible for the interception of graphic commands from the graphics library, forwarding and creating graphic commands [functions] to vendor’s GPU driver, and controlling the hardware hub [Second interface], which distributes data streams and commands to the plurality of GPUs for parallel processing); and
perform the one or more signal processing operations on the data using the one or more parallel processing units (See Par. [32], [50], [52] of Bakalash for a reference to the hardware hub 110 distributes data streams and graphics between GPUs and composites graphics output for display according to the parallel mode. Hardware hub controls the application 121 along with the graphic library 122).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Wang. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 19, Intel does not explicitly disclose wherein the one or more MAC 5G- NR network layers comprise one or more third interfaces associated with second data format, and the first interface translates the data to be communicated from the one or more third interfaces to the second interface.
However, Wang discloses wherein the one or more MAC 5G- NR network layers comprise one or more third interfaces associated with second data format, and the first interface translates the data to be communicated from the one or more third interfaces to the second interface (See Par. [71]-[73], [114] of Wang for a reference to the PLCP Sublayer of PHY layer takes data from the MAC layer and translates it into a PHY frame format. [This implies that translation is performed between two different formats. PHY layer supports a different data format than the data format supported by the MAC layer]).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Wang. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 20, the combination of Intel and Wang does not explicitly disclose wherein the one or more PHY 5G-NR network layers comprise a second interface to access one or more parallel processing units usable by the one or more PHY 5G-NR network layers, and the first interface uses the second interface to communicate the data from the one or more MAC 5G-NR network layers to the one or more parallel processing units.
However, Bakalash discloses wherein the one or more PHY 5G-NR network layers comprise a second interface to access one or more parallel processing units usable by the one or more PHY 5G-NR network layers, and the first interface uses the second interface to communicate the data from the one or more MAC 5G-NR network layers to the one or more parallel processing units (See Par. [32], [50], [52] of Bakalash for a reference to the hardware hub 110 distributes data streams and graphics between GPUs and composites graphics output for display according to the parallel mode. Hardware hub controls the application 121 along with the graphic library 122).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Wang. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 21, the combination of Intel and Wang does not explicitly disclose wherein the one or more PHY 5G-NR network layers comprise an application programming interface to perform parallel computing accessible through the first interface.
However, Bakalash discloses wherein the one or more PHY 5G-NR network layers comprise an application programming interface to perform parallel computing accessible through the first interface (See Par. [48], [51], [61] and Figs. 6 & 7 of Bakalash for a reference to software hub driver 123 [Mapped to the API] determines and forwards graphics commands [Functions] and data streams to the cluster of GPUs 130 to perform parallel processing via the CPU interface).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Wang. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 25, the combination of Intel and Wang, specifically Intel discloses receiving, by the first interface, the data (See Par. [3], [16]-[17], [105] and Fig. 2 of Intel for a reference to a new radio (NR) BS for providing a set of UEs access to a 5G Core network. Data is exchanged between a set of distributing units (DUs) [Fig. 2; 204 & 206], comprising a physical layer (PHY) entity and a central unit (CU) [Fig. 2; 202], comprising a medium access control layer (MAC) entity);
the combination of Intel and Wang does not explicitly disclose determining, by the first interface, one or more tasks to be performed by one or more parallel processing units corresponding to a second interface of the one or more PHY 5G- NR network layers; instructing, by the first interface through the second interface, the one or more parallel processing units to perform the one or more tasks; receiving, by the first interface, a request for results corresponding to the one or more tasks; and transmitting, by the second interface to the first interface, the results corresponding to the one or more tasks.
However, Bakalash discloses determining, by the first interface, one or more tasks to be performed by one or more parallel processing units corresponding to a second interface of the one or more PHY 5G- NR network layers (See Par. [48], [50], [76]-[78] and Fig. 1 of Bakalash for a reference to the hardware hub of the CPU is interfaced with a plurality (Cluster) of graphic processing units (GPUs) 130, arranged in a parallel architecture and support parallel processing. The software hub 110 [API] composites graphic output for display according to parallel mode);
instructing, by the first interface through the second interface, the one or more parallel processing units to perform the one or more tasks (See Par. [32], [50], [52] of Bakalash for a reference to the hardware hub 110 distributes data streams and graphics between GPUs and composites graphics output for display according to the parallel mode. Hardware hub controls the application 121 along with the graphic library 122);
receiving, by the first interface, a request for results corresponding to the one or more tasks (See Par. [57] of Bakalash for a reference to the control unit accepts processing commands [Request] from the software hub driver. Commands are transmitted to GPUs for processing); and transmitting, by the second interface to the first interface, the results corresponding to the one or more tasks (See Par. [57] of Bakalash for a reference to the processing results of the GPUs are transmitted to the CPU interface for display using the hardware hub);
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Wang. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 26, the combination of Intel and Wang does not explicitly disclose wherein the second interface comprises an application programming interface to facilitate interaction with the one or more parallel processing units.
However, Bakalash discloses wherein the second interface comprises an application programming interface to facilitate interaction with the one or more parallel processing units (See Par. [48], [51], [61] and Figs. 6 & 7 of Bakalash for a reference to software hub driver 123 [Mapped to the API] determines and forwards graphics commands [Functions] and data streams to the cluster of GPUs 130 to perform parallel processing via the CPU interface).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Wang. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 27, the combination of Intel and Wang does not explicitly disclose wherein the PHY 5G-NR network layers comprise a second interface to facilitate interaction between the first interface and one or more parallel processing units usable to perform one or more signal processing operations corresponding to the PHY 5G-NR network layers.
However, Bakalash discloses wherein the PHY 5G-NR network layers comprise a second interface to facilitate interaction between the first interface and one or more parallel processing units usable to perform one or more signal processing operations corresponding to the PHY 5G-NR network layers (See Par. [32], [50], [52] of Bakalash for a reference to the hardware hub 110 distributes data streams and graphics between GPUs and composites graphics output for display according to the parallel mode. Hardware hub controls the application 121 along with the graphic library 122).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Wang. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 28, the combination of Intel and Wang does not explicitly disclose wherein the PHY 5G-NR network layers comprise an application programming interface to perform parallel computing operations, and the first interface communicates the data based, at least in part, on the application programming interface.
However, Bakalash discloses wherein the PHY 5G-NR network layers comprise an application programming interface to perform parallel computing operations, and the first interface communicates the data based, at least in part, on the application programming interface (See Par. [48], [51], [61] and Figs. 6 & 7 of Bakalash for a reference to software hub driver 123 [Mapped to the API] determines and forwards graphics commands [Functions] and data streams to the cluster of GPUs 130 to perform parallel processing via the CPU interface).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Wang. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 32, the claim is interpreted and rejected for the same reasons as set forth in claim 31.
Regarding claim 33, the claim is interpreted and rejected for the same reasons as set forth in claim 31.
Conclusion
6. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Rothman et al, (US. Pub. No. 2019/0104199 A1) discloses a system of multi-modal transmission of packetized data in a voice activated data packet based computer network environment.
LaBosco et al. (US. Pub. No. 2018/0139330 A1) discloses systems, methods, and modes for providing a distributed bidirectional-communications network speaker system for the transport of digital audio information.
Wieland (US. Pub. No. 2017/0339256 A1) discloses a method and apparatus of performing bidirectional data transmission between electronic devices or its components that use different communication methods (CM) .
7. THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
8. Any inquiry concerning this communication from the examiner should be directed to RASHA FAYED whose telephone number is (571) 270-3804. The examiner can normally be reached on M-F 8:00AM-4:30PM.
If attempts to reach the examiner by telephone are unsuccessful, the supervisory Examiner, Un Cho can be reached on (571)272-7919. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/R.K.F/Examiner, Art Unit 2413
/UN C CHO/Supervisory Patent Examiner, Art Unit 2413