DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Status
Claims 1-7, 9-25 and 27-34 are amended. Claims 1-34 are pending.
Continued Examination Under 37 CFR 1.114
3. A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 8/7/2026 has been entered.
Response to Arguments
Applicant’s arguments, filed on 8/7/2026 with respect to claims 1-34, have been considered but are moot in view of new grounds of rejection.
Claim Rejections - 35 USC § 103
4. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
5. Claims 1, 9-10, 17, 22-24, 29-31 and 34 are rejected under 35 U.S.C. 103 as being unpatentable over the PCT application of Intel (PCT Pub. No. WO 2018/063998 A1, referred to as Intel and admitted by the applicant’s IDS filed on 8/17/2022) in view of Ohana (US. Pub. No. 2015/0296057 A1).
Regarding claim 1, Intel discloses one or more processors (See Intel; Fig.9; Hardware resources 900 including one or more processor 910) comprising: circuitry (See Intel; Fig.9; one or more communication resources 930) to obtain data to be communicated using a first interface (See Fig. 2; 2018 & 220; MAC-PHY interface(s)) between one or more wireless network physical (PHY) layers and one or more medium access control (MAC) layers (See Par. [3], [16]-[17], [105] and Fig. 2 of Intel for a reference to a new radio (NR) BS for providing a set of UEs access to a 5G Core network. Data is exchanged between a set of distributing units (DUs) [Fig. 2; 204 & 206], comprising a physical layer (PHY) entity and a central unit (CU) [Fig. 2; 202], comprising a medium access control layer (MAC) entity).
Intel does not explicitly disclose that one or more wireless network physical (PHY) layers having a first data format specific to a first vendor and one or more medium access control (MAC) layers having a second data format specific to a second vendor that is different from the first vendor, and convert vendor-specific interface messaging of the data from the second data format of the second vendor into a common PHY interface format corresponding to the first data format of the first vendor to communicate the data from the one or more wireless network MAC layers to the one or more wireless network PHY layers.
However, Ohana discloses one or more wireless network physical (PHY) layers having a first data format specific to a first vendor and one or more medium access control (MAC) layers having a second data format specific to a second vendor that is different from the first vendor (See Par. [44], [91], [99] of Ohana for a reference to that different devices operate using different message types and can also be based on proprietary communication protocols, including include vendor/manufacturer specific parameters [Formats], coordinated across the interface), and convert vendor-specific interface messaging of the data from the second data format of the second vendor into a common PHY interface format corresponding to the first data format of the first vendor to communicate the data from the one or more wireless network MAC layers to the one or more wireless network PHY layers (See Par. [46], [64], [66], [91] and Fig. 5E of Ohana for a reference to the device 110 generates, based on the MAC message, a (PHY) message for the device 114, and transmits the PHY message to device 114 for use to configure PHY operational parameter(s). MAC-side content is converted into a common PHY-formatted message and delivered toward the PHY layer. Messages carry vendor/manufacturer specific parameters that are placed into the common PMI packet/trailer format, confirming that vendor-specific content is packaged into the common PHY/MAC message format).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Ohana to Intel. The motivation of combination would be improving the system’s performance, by providing improved and better ways to effectuate communication between devices, operating using different message types, within communication systems through enabling coordination among different devices. (Ohana; Par.[6]).
Regarding claim 9, the claim is interpreted and rejected for the same reasons as set forth in claim 1, including a system comprising: one or more processors (See Intel; Fig.9; Hardware resources 900 including one or more processor 910).
Regarding claim 10, the combination of Intel and Ohana, specifically Intel discloses wherein the first interface translates the data to be communicated between the one or more wireless network PHY layers and the one or more wireless network MAC layers (See Par. [44], [90], [124], [139] and Fig. 4 of Intel for a reference to the MAC layer performs mapping between logical channels and transport channels, multiplexing of MAC SDUs from one or more logical channel onto transport blocks to be transferred to the PHY layer via transport channels over an API).
Regarding claim 17, the claim is interpreted and rejected for the same reasons as set forth in claim 1, including a non-transitory machine-readable medium having stored thereon a set of instructions (See Intel; Par. [139] for a reference to a machine- readable storage medium wherein, when the program code is loaded into and executed by a machine).
Regarding claim 22, the combination of Intel and Ohana, specifically Intel discloses translate, using the first interface, the data to be communicated from one or more second interfaces for each of the one or more MAC 5G-NR network layers to a third interface corresponding to the one or more PHY 5G-NR network layers (See Par. [44], [90], [124], [139] and Fig. 4 of Intel for a reference to the MAC layer performs mapping between logical channels and transport channels, multiplexing of MAC SDUs from one or more logical channel onto transport blocks to be transferred to the PHY layer via transport channels over an API).
Regarding claim 23, the combination of Intel and Ohana, specifically Intel discloses translate, using the first interface, the data to be communicated from a second interface corresponding to the one or more PHY 5G-NR network layers to one or more third interfaces for each of the one or more MAC 5G-NR network layers (See Par. [44], [90], [124], [139] and Fig. 4 of Intel for a reference to the MAC layer performs mapping between logical channels and transport channels, multiplexing of MAC SDUs from one or more logical channel onto transport blocks to be transferred to the PHY layer via transport channels over an API).
Regarding claim 24, the claim is interpreted and rejected for the same reasons as set forth in claim 1.
Regarding claim 29, the combination of Intel and Ohana, specifically Intel discloses translating, by the first interface, the data received from one or more second interfaces for each of the one or more wireless network MAC layers to a third interface corresponding to the one or more wireless network PHY layers (See Par. [44], [90], [124], [139] and Fig. 4 of Intel for a reference to the MAC layer performs mapping between logical channels and transport channels, multiplexing of MAC SDUs from one or more logical channel onto transport blocks to be transferred to the PHY layer via transport channels over an API).
Regarding claim 30, the combination of Intel and Ohana, specifically Intel discloses translating, by the first interface, the data received from a second interface corresponding to the one or more wireless network PHY layers to one or more third interfaces for each of the one or more wireless network MAC layers (See Par. [44], [90], [124], [139] and Fig. 4 of Intel for a reference to the MAC layer performs mapping between logical channels and transport channels, multiplexing of MAC SDUs from one or more logical channel onto transport blocks to be transferred to the PHY layer via transport channels over an API).
Regarding claim 31, Intel does not explicitly disclose wherein the data is to be converted by translation of vendor-specific interface messaging between the wireless network MAC layers and the wireless network PHY layers into a common PHY interface format.
However, Ohana discloses wherein the data is to be converted by translation of vendor-specific interface messaging between the wireless network MAC layers and the wireless network PHY layers into a common PHY interface format (See Par. [46], [64], [66], [91] and Fig. 5E of Ohana for a reference to the device 110 generates, based on the MAC message, a (PHY) message for the device 114, and transmits the PHY message to device 114 for use to configure PHY operational parameter(s). MAC-side content is converted into a common PHY-formatted message and delivered toward the PHY layer. Messages carry vendor/manufacturer specific parameters that are placed into the common PMI packet/trailer format, confirming that vendor-specific content is packaged into the common PHY/MAC message format).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Ohana to Intel. The motivation of combination would be improving the system’s performance, by providing improved and better ways to effectuate communication between devices, operating using different message types, within communication systems through enabling coordination among different devices. (Ohana; Par.[6]).
Regarding claim 34, the claim is interpreted and rejected for the same reasons as set forth in claim 31.
6. Claims 2-8, 11-16, 18-21, 25-28 and 32-33 are rejected under 35 U.S.C. 103 as being unpatentable over Intel in view of Ohana and further in view of Bakalash et al. (US. Pub. No. 2008/0165198 A1).
Regarding claim 2, the combination of Intel and Ohana does not explicitly disclose the one or more processors of claim 1, further comprising: a wireless PHY driver to provide an application programming interface to the first interface; one or more signal processing libraries accessible through the application programming interface; and one or more parallel processing units accessible through the application programming interface.
However, Bakalash discloses a wireless PHY driver to provide an application programming interface to the first interface (See Par. [48], [63]-[64] and Figs. 1, 6 & 7 of Bakalash for a reference to the CPU 120 comprises a vendor’s graphic processing unit (GPU) driver for allowing the GPUs to interact with the graphic libraries through the software hub driver 123 [mapped to an API]);
one or more signal processing libraries accessible through the application programming interface (See Par. [28], [31], [48], [51] of Bakalash for a reference to the CPU 120 comprises one or more graphics libraries 122 for storing data used to implement the graphic commands. GPU drivers allow GPUs to interact with graphics libraries through the software hub driver 123 [mapped to the API]); and
one or more parallel processing units accessible through the application programming interface (See Par. [48], [50], [76]-[78] and Fig. 1 of Bakalash for a reference to the hardware hub of the CPU is interfaced with a plurality (Cluster) of graphic processing units (GPUs) 130, arranged in a parallel architecture and support parallel processing. The software hub 110 [API] composites graphic output for display according to parallel mode).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Ohana. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 3, the combination of Intel specifically Intel discloses wherein the first interface translates the data communicated by the one or more wireless network MAC layers and provides the data to the wireless PHY driver through the application programming interface (See Par. [44], [90], [124], [139] and Fig. 4 of Intel for a reference to the MAC layer performs mapping between logical channels and transport channels, multiplexing of MAC SDUs from one or more logical channel onto transport blocks to be transferred to the PHY layer via transport channels over an API).
Intel does not explicitly disclose the first interface interfaces with a plurality of different data formats specific to different vendors, the plurality of different data formats comprising the second data format of the second vendor.
However Ohana discloses the first interface interfaces with a plurality of different data formats specific to different vendors, the plurality of different data formats comprising the second data format of the second vendor (See Par. [44], [91], [99] of Ohana for a reference to that different devices operate using different message types and can also be based on proprietary communication protocols, including include vendor/manufacturer specific parameters [Formats], coordinated across the interface).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Ohana to Intel. The motivation of combination would be improving the system’s performance, by providing improved and better ways to effectuate communication between devices, operating using different message types, within communication systems through enabling coordination among different devices. (Ohana; Par.[6]).
Regarding claim 4, the combination of Intel and Ohana does not explicitly disclose wherein the one or more wireless network MAC layers use the first interface to communicate data to one or more functions provided by one or more signal processing libraries to be performed by one or more parallel processing units.
However, Bakalash discloses wherein the one or more wireless network MAC network layers use the first interface to communicate data to one or more functions provided by one or more signal processing libraries to be performed by one or more parallel processing units (See Par. [32], [50], [52] of Bakalash for a reference to the hardware hub 110 distributes data streams and graphics between GPUs and composites graphics output for display according to the parallel mode. Hardware hub controls the application 121 along with the graphic library 122).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Ohana. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 5, the combination of Intel and Ohana does not explicitly disclose wherein the one or more wireless network PHY layers comprise an application programming interface to perform parallel computing accessible through the first interface.
However, Bakalash discloses wherein the one or more wireless network PHY layers comprise an application programming interface to perform parallel computing accessible through the first interface (See Par. [48], [51], [61] and Figs. 6 & 7 of Bakalash for a reference to software hub driver 123 [Mapped to the API] determines and forwards graphics commands [Functions] and data streams to the cluster of GPUs 130 to perform parallel processing via the CPU interface).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Ohana. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 6, the combination of Intel and Ohana does not explicitly disclose wherein the one or more wireless network PHY layers comprise one or more signal processing libraries implementing operations to be performed by one or more parallel processing units, the operations invoked using the first interface.
However, Bakalash discloses wherein the one or more wireless network PHY layers comprise one or more signal processing libraries implementing operations to be performed by one or more parallel processing units, the operations invoked using the first interface (See Par. [48], [50]-[51], [76]-[78] of Bakalash for a reference to the CPU 120 comprises one or more graphics libraries 122 for storing data used to implement the graphic commands. GPU drivers allow GPUs to interact with graphics libraries through the software hub driver 123 [mapped to the API]. he hardware hub of the CPU is interfaced with a plurality (Cluster) of graphic processing units (GPUs) 130, arranged in a parallel architecture and support parallel processing. The software hub 110 [API] composites graphic output for display according to parallel mode).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Ohana. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 7, the combination of Intel and Ohana does not explicitly disclose wherein the one or more wireless network PHY layers comprise a second interface to access one or more parallel processing units, the second interface usable by the first interface to communicate the data from the one or more wireless network MAC layers to the one or more parallel processing units.
However, Bakalash discloses wherein the one or more wireless network PHY layers comprise a second interface to access one or more parallel processing units, the second interface usable by the first interface to communicate the data from the one or more wireless network MAC layers to the one or more parallel processing units (See Par. [32], [50], [52] of Bakalash for a reference to the hardware hub 110 distributes data streams and graphics between GPUs and composites graphics output for display according to the parallel mode. Hardware hub controls the application 121 along with the graphic library 122).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Ohana. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 8, the combination of Intel and Ohana does not explicitly disclose wherein the first interface indicates one or more signal processing operations to be performed by the one or more parallel processing units using the second interface.
However, Bakalash discloses wherein the first interface indicates one or more signal processing operations to be performed by the one or more parallel processing units using the second interface (See Par. [64] and Fig. 7 of Bakalash for a reference to OS interface [First interface] is responsible for the interception of graphic commands from the graphics library, forwarding and creating graphic commands [functions] to vendor’s GPU driver, and controlling the hardware hub [Second interface], which distributes data streams and commands to the plurality of GPUs for parallel processing).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Ohana. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 11, the combination of Intel and Ohana does not explicitly disclose wherein: the one or more wireless network PHY layers comprise a driver to access one or more signal processing libraries; the driver provides an application programming interface; and the first interface translates the data to be communicated based, at least in part, on the signal processing libraries accessible by the application programming interface.
However, Bakalash discloses wherein: the one or more wireless network PHY layers comprise a driver to access one or more signal processing libraries (See Par. [48], [51], [63]-[64] and Figs. 1, 6 & 7 of Bakalash for a reference to the CPU 120 comprises a vendor’s graphic processing unit (GPU) driver for allowing the GPUs to interact with the graphic libraries through the software hub driver 123 [mapped to an API]. The CPU 120 comprises one or more graphics libraries 122 for storing data used to implement the graphic commands. GPU drivers allow GPUs to interact with graphics libraries through the software hub driver 123);
the driver provides an application programming interface (See Par. [48], [51], [61] and Figs. 6 & 7 of Bakalash for a reference to software hub driver 123 [Mapped to the API] determines and forwards graphics commands [Functions] and data streams to the cluster of GPUs 130 to perform parallel processing via the CPU interface); and
the first interface translates the data to be communicated based, at least in part, on the signal processing libraries accessible by the application programming interface (See Par. [48], [50], [76]-[78] and Fig. 1 of Bakalash for a reference to the hardware hub of the CPU is interfaced with a plurality (Cluster) of graphic processing units (GPUs) 130, arranged in a parallel architecture and support parallel processing. The software hub 110 [API] composites graphic output for display according to parallel mode).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Ohana. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 12, the combination of Intel and Ohana does not explicitly disclose wherein the one or more wireless network PHY layers comprise one or more signal processing libraries and the first interface determines one or more operations of the one or more signal processing libraries to be performed by one or more parallel processing units based, at least in part, on the data to be communicated.
However, Bakalash discloses wherein the one or more wireless network PHY layers comprise one or more signal processing libraries and the first interface determines one or more operations of the one or more signal processing libraries to be performed by one or more parallel processing units based, at least in part, on the data to be communicated (See Par. [48], [50]-[51], [76]-[78] of Bakalash for a reference to the CPU 120 comprises one or more graphics libraries 122 for storing data used to implement the graphic commands. GPU drivers allow GPUs to interact with graphics libraries through the software hub driver 123 [mapped to the API]. he hardware hub of the CPU is interfaced with a plurality (Cluster) of graphic processing units (GPUs) 130, arranged in a parallel architecture and support parallel processing. The software hub 110 [API] composites graphic output for display according to parallel mode).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Ohana. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 13, the combination of Intel and Ohana does not explicitly disclose wherein the one or more wireless network PHY layers comprise a second interface to access one or more parallel processing units, and the first interface accesses the one or more parallel processing units through the second interface.
However, Bakalash discloses wherein the one or more wireless network PHY layers comprise a second interface to access one or more parallel processing units (See Par. [32], [50], [52] of Bakalash for a reference to the hardware hub 110 distributes data streams and graphics between GPUs and composites graphics output for display according to the parallel mode. Hardware hub controls the application 121 along with the graphic library 122), and the first interface accesses the one or more parallel processing units through the second interface (See Par. [64] and Fig. 7 of Bakalash for a reference to OS interface [First interface] is responsible for the interception of graphic commands from the graphics library, forwarding and creating graphic commands [functions] to vendor’s GPU driver, and controlling the hardware hub [Second interface], which distributes data streams and commands to the plurality of GPUs for parallel processing).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Ohana. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 14, the combination of Intel and Ohana does not explicitly disclose wherein the one or more wireless network PHY layers comprise a second interface, and the first interface indicates one or more signal processing functions to be performed by one or more parallel processing units using the second interface.
However, Bakalash discloses wherein the one or more wireless network PHY layers comprise a second interface (See Par. [32], [50], [52] of Bakalash for a reference to the hardware hub 110 distributes data streams and graphics between GPUs and composites graphics output for display according to the parallel mode. Hardware hub controls the application 121 along with the graphic library 122), and the first interface indicates one or more signal processing functions to be performed by one or more parallel processing units using the second interface (See Par. [64] and Fig. 7 of Bakalash for a reference to OS interface [First interface] is responsible for the interception of graphic commands from the graphics library, forwarding and creating graphic commands [functions] to vendor’s GPU driver, and controlling the hardware hub [Second interface], which distributes data streams and commands to the plurality of GPUs for parallel processing).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Ohana. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 15, the combination of Intel and Ohana, specifically Intel discloses wherein: the first interface translates the data to be communicated from the one or more second interfaces to the one or more third interfaces (See Par. [44], [90], [124], [139] and Fig. 4 of Intel for a reference to the MAC layer performs mapping between logical channels and transport channels, multiplexing of MAC SDUs from one or more logical channel onto transport blocks to be transferred to the PHY layer via transport channels over an API).
the combination of Intel and Ohana does not explicitly disclose each of the one or more wireless network MAC layers comprise one or more second interfaces; each of the one or more wireless network PHY layers comprise one or more third interfaces.
However, Bakalash discloses each of the one or more wireless network MAC layers comprise one or more second interfaces (See Par. [32], [50], [52] of Bakalash for a reference to the hardware hub 110 distributes data streams and graphics between GPUs and composites graphics output for display according to the parallel mode. Hardware hub controls the application 121 along with the graphic library 122); each of the one or more wireless network PHY layers comprise one or more third interfaces (See Par. [32], [50], [52] of Bakalash for a reference to the hardware hub 110 distributes data streams and graphics between GPUs and composites graphics output for display according to the parallel mode. Hardware hub controls the application 121 along with the graphic library 122).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Ohana. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 16, the combination of Intel and Ohana, specifically Intel discloses wherein: the first interface translates the data to be communicated from the one or more second interfaces to the one or more third interfaces (See Par. [44], [90], [124], [139] and Fig. 4 of Intel for a reference to the MAC layer performs mapping between logical channels and transport channels, multiplexing of MAC SDUs from one or more logical channel onto transport blocks to be transferred to the PHY layer via transport channels over an API).
the combination of Intel and Ohana does not explicitly disclose each of the one or more wireless network PHY layers comprise one or more second interfaces; each of the one or more wireless network MAC layers comprise one or more third interfaces.
However, Bakalash discloses each of the one or more wireless network PHY layers comprise one or more second interfaces (See Par. [32], [50], [52] of Bakalash for a reference to the hardware hub 110 distributes data streams and graphics between GPUs and composites graphics output for display according to the parallel mode. Hardware hub controls the application 121 along with the graphic library 122); each of the one or more wireless network MAC layers comprise one or more third interfaces (See Par. [32], [50], [52] of Bakalash for a reference to the hardware hub 110 distributes data streams and graphics between GPUs and composites graphics output for display according to the parallel mode. Hardware hub controls the application 121 along with the graphic library 122).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Ohana. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 18, the combination of Intel and Ohana does not explicitly disclose determine one or more signal processing operations corresponding to the one or more wireless network PHY layers to be performed by one or more parallel processing units; communicate the data using the first interface to a second interface, the second interface corresponding to the one or more parallel processing units; and perform the one or more signal processing operations on the data using the one or more parallel processing units.
However, Bakalash discloses determine one or more signal processing operations corresponding to the one or more wireless network PHY layers to be performed by one or more parallel processing units (See Par. [48], [50], [76]-[78] and Fig. 1 of Bakalash for a reference to the hardware hub of the CPU is interfaced with a plurality (Cluster) of graphic processing units (GPUs) 130, arranged in a parallel architecture and support parallel processing. The software hub 110 [API] composites graphic output for display according to parallel mode); communicate the data using the first interface to a second interface, the second interface corresponding to the one or more parallel processing units (See Par. [64] and Fig. 7 of Bakalash for a reference to OS interface [First interface] is responsible for the interception of graphic commands from the graphics library, forwarding and creating graphic commands [functions] to vendor’s GPU driver, and controlling the hardware hub [Second interface], which distributes data streams and commands to the plurality of GPUs for parallel processing); and
perform the one or more signal processing operations on the data using the one or more parallel processing units (See Par. [32], [50], [52] of Bakalash for a reference to the hardware hub 110 distributes data streams and graphics between GPUs and composites graphics output for display according to the parallel mode. Hardware hub controls the application 121 along with the graphic library 122).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Ohana. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 19, Intel does not explicitly disclose wherein the one or more wireless network MAC layers comprise one or more third interfaces associated with second data format, and the first interface translates the data to be communicated from the one or more third interfaces to the second interface.
However, Ohana discloses wherein the one or more wireless network MAC layers comprise one or more third interfaces associated with second data format, and the first interface translates the data to be communicated from the one or more third interfaces to the second interface (See Par. [46], [64], [66], [91] and Fig. 5E of Ohana for a reference to the device 110 generates, based on the MAC message, a (PHY) message for the device 114, and transmits the PHY message to device 114 for use to configure PHY operational parameter(s). MAC-side content is converted into a common PHY-formatted message and delivered toward the PHY layer. Messages carry vendor/manufacturer specific parameters that are placed into the common PMI packet/trailer format, confirming that vendor-specific content is packaged into the common PHY/MAC message format).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Ohana to Intel. The motivation of combination would be improving the system’s performance, by providing improved and better ways to effectuate communication between devices, operating using different message types, within communication systems through enabling coordination among different devices. (Ohana; Par.[6]).
Regarding claim 20, the combination of Intel and Ohana does not explicitly disclose wherein the one or more wireless network PHY layers comprise a second interface to access one or more parallel processing units usable by the one or more wireless network PHY layers, and the first interface uses the second interface to communicate the data from the one or more wireless network MAC layers to the one or more parallel processing units.
However, Bakalash discloses wherein the one or more wireless network PHY layers comprise a second interface to access one or more parallel processing units usable by the one or more wireless network PHY layers, and the first interface uses the second interface to communicate the data from the one or more wireless network MAC layers to the one or more parallel processing units (See Par. [32], [50], [52] of Bakalash for a reference to the hardware hub 110 distributes data streams and graphics between GPUs and composites graphics output for display according to the parallel mode. Hardware hub controls the application 121 along with the graphic library 122).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Ohana. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 21, the combination of Intel and Ohana does not explicitly disclose wherein the one or more wireless network PHY layers comprise an application programming interface to perform parallel computing accessible through the first interface.
However, Bakalash discloses wherein the one or more wireless network PHY layers comprise an application programming interface to perform parallel computing accessible through the first interface (See Par. [48], [51], [61] and Figs. 6 & 7 of Bakalash for a reference to software hub driver 123 [Mapped to the API] determines and forwards graphics commands [Functions] and data streams to the cluster of GPUs 130 to perform parallel processing via the CPU interface).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Ohana. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 25, the combination of Intel and Ohana, specifically Intel discloses receiving, by the first interface, the data (See Par. [3], [16]-[17], [105] and Fig. 2 of Intel for a reference to a new radio (NR) BS for providing a set of UEs access to a 5G Core network. Data is exchanged between a set of distributing units (DUs) [Fig. 2; 204 & 206], comprising a physical layer (PHY) entity and a central unit (CU) [Fig. 2; 202], comprising a medium access control layer (MAC) entity);
the combination of Intel and Ohana does not explicitly disclose determining, by the first interface, one or more tasks to be performed by one or more parallel processing units corresponding to a second interface of the one or more wireless network PHY layers; instructing, by the first interface through the second interface, the one or more parallel processing units to perform the one or more tasks; receiving, by the first interface, a request for results corresponding to the one or more tasks; and transmitting, by the second interface to the first interface, the results corresponding to the one or more tasks.
However, Bakalash discloses determining, by the first interface, one or more tasks to be performed by one or more parallel processing units corresponding to a second interface of the one or more wireless network PHY layers (See Par. [48], [50], [76]-[78] and Fig. 1 of Bakalash for a reference to the hardware hub of the CPU is interfaced with a plurality (Cluster) of graphic processing units (GPUs) 130, arranged in a parallel architecture and support parallel processing. The software hub 110 [API] composites graphic output for display according to parallel mode);
instructing, by the first interface through the second interface, the one or more parallel processing units to perform the one or more tasks (See Par. [32], [50], [52] of Bakalash for a reference to the hardware hub 110 distributes data streams and graphics between GPUs and composites graphics output for display according to the parallel mode. Hardware hub controls the application 121 along with the graphic library 122);
receiving, by the first interface, a request for results corresponding to the one or more tasks (See Par. [57] of Bakalash for a reference to the control unit accepts processing commands [Request] from the software hub driver. Commands are transmitted to GPUs for processing); and transmitting, by the second interface to the first interface, the results corresponding to the one or more tasks (See Par. [57] of Bakalash for a reference to the processing results of the GPUs are transmitted to the CPU interface for display using the hardware hub);
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Ohana. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 26, the combination of Intel and Ohana does not explicitly disclose wherein the second interface comprises an application programming interface to facilitate interaction with the one or more parallel processing units.
However, Bakalash discloses wherein the second interface comprises an application programming interface to facilitate interaction with the one or more parallel processing units (See Par. [48], [51], [61] and Figs. 6 & 7 of Bakalash for a reference to software hub driver 123 [Mapped to the API] determines and forwards graphics commands [Functions] and data streams to the cluster of GPUs 130 to perform parallel processing via the CPU interface).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Ohana. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 27, the combination of Intel and Ohana does not explicitly disclose wherein the wireless network PHY layers comprise a second interface to facilitate interaction between the first interface and one or more parallel processing units usable to perform one or more signal processing operations corresponding to the wireless network PHY layers.
However, Bakalash discloses wherein the wireless network PHY layers comprise a second interface to facilitate interaction between the first interface and one or more parallel processing units usable to perform one or more signal processing operations corresponding to the wireless network PHY layers (See Par. [32], [50], [52] of Bakalash for a reference to the hardware hub 110 distributes data streams and graphics between GPUs and composites graphics output for display according to the parallel mode. Hardware hub controls the application 121 along with the graphic library 122).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Ohana. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 28, the combination of Intel and Ohana does not explicitly disclose wherein the wireless network PHY layers comprise an application programming interface to perform parallel computing operations, and the first interface communicates the data based, at least in part, on the application programming interface.
However, Bakalash discloses wherein the wireless network PHY layers comprise an application programming interface to perform parallel computing operations, and the first interface communicates the data based, at least in part, on the application programming interface (See Par. [48], [51], [61] and Figs. 6 & 7 of Bakalash for a reference to software hub driver 123 [Mapped to the API] determines and forwards graphics commands [Functions] and data streams to the cluster of GPUs 130 to perform parallel processing via the CPU interface).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bakalash to the combination of Intel and Ohana. The motivation of combination is improving the system’s efficiency, by improving the performance of the GPU when implementing the parallel processing of graphics. (Bakalash; Par. [14]).
Regarding claim 32, the claim is interpreted and rejected for the same reasons as set forth in claim 31.
Regarding claim 33, the claim is interpreted and rejected for the same reasons as set forth in claim 31.
Conclusion
7. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Kummetz et al. (US 2022/0038126 A1) discloses a universal digital card (UDC) for use in a subrack of a node of a distributed antenna system (DAS).
Loehr et al. (US 2020/03148819 A1) discloses a method and an apparatus for multiple radio access technology communications.
Pan et al. (US 2019/0108286 A1) discloses a method for the search and analysis of data, including the creation, update or use of concept networks in searching and analyzing data.
8. Any inquiry concerning this communication from the examiner should be directed to RASHA FAYED whose telephone number is (571) 270-3804. The examiner can normally be reached on M-F 8:00AM-4:30PM.
If attempts to reach the examiner by telephone are unsuccessful, the Primary Examiner, Shah M. Rahman can be reached on (571)272-8951. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/R. F./
Examiner, Art Unit 2413
/UN C CHO/Supervisory Patent Examiner, Art Unit 2413
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