The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA
DETAILED ACTION
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 13 and 16-22, as best understood, are rejected under 35 U.S.C. 103 as being unpatentable over Park et al. (2017/0104000), in view of Toyama et al. (2017/0179026).Regarding claim 13, Park et al. teach in figure 33 and related text a semiconductor device, comprising: a staircase that is formed over a substrate 100 and has a plurality of steps extending in a first horizontal direction, each step of the plurality of steps including a first insulating layer 106 (106a) and a second layer (located directly under numeral 210) arranged over the first insulating layer, the second layer including an insulating portion (the top horizontal part of gate dielectric 160) and a conductive portion (the bottom horizontal part of element 210) that is arranged side by side with the insulating portion in a horizontal direction,
wherein the horizontal direction is perpendicular to a stacking direction of a stack of the first insulating layer and the second layer;
and a plurality of contact pads (220 and 220/210), etch contact pad being arranged over the insulating portion (the top horizontal part of gate dielectric 160) and the conductive portion of the second layer of a corresponding step of the plurality of steps;
two slit structures 140b (see figures 1, 2C and 16) extending along the first horizontal direction; and
a first wall and second wall (the walls located to the left of element 128) positioned on a side of the staircase along a second horizontal direction, each wall being formed of alternating wall-region first insulating layers and conductive layers that are vertically stacked over the substrate,
where the wall-region first insulating layers of the first wail and the first insulating layers of the second wall are extensions of the first insulating layers of the plurality of steps on opposite sides along the second horizontal direction, respectively,
wherein, along the second horizontal direction, the first wall is between the staircase and one of the two slit structures, and the second wall is between the staircase and another one of the two slit structures.
Park et al. do not teach using wiring 220 as part of a contact pad structure, and wherein the two walls positioned on opposite sides of the staircase.
Park et al. teach using element 128 as part of a contact pad structure.
Toyama et al. teach in figure 73 and related text two walls positioned on opposite sides of the staircase and comprising alternating first insulating layers and conductive layers that are vertically stacked over the substrate.
Toyama et al. and Park et al. are analogous art because they are directed to memory devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Park et al. because they are from the same field of endeavor.
It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to position the two walls on opposite sides of the staircase, as taught by Toyama et al., and to use connection line BCL and wiring 220 as part of a contact pad structure in the device of Park et al., respectively, in order to provide better reliable external connections to the device.
Regarding claim 15, by defining the staircase as being the structure located in the middle of the device of Park et al., then Park et al. teach two walls (the parts of the structure which are located on opposite sides of the defined staircase) positioned on opposite sides of the staircase, the two walls being formed of alternating first insulating layers and conductive layers that are vertically stacked over the substrate, where the first insulating layers of the walls are an extension of a corresponding first insulating layer of the step in two opposite directions.
Regarding claim 16, Park et al. teach substantially the entire claimed structure, as applied to the claims above, including for each step of the plurality of steps: having the conductive portion of the second layer is an extension of a corresponding conductive layers of the first wall and the second wall, but except having the insulating portion of the second layer being a second insulating layer made of a different material than the first insulating layers of the first wall and the second wall.
It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form the insulating portion of the second layer being a second insulating layer made of a different material than the first insulating layers of the first wall and the second wall, in the device of Park et al., in order to improve the insulation in device.
Regarding claim 17, Park et al. teach substantially the entire claimed structure, as applied to the claims above, including a third insulating layer (190 in Park et al.) that is formed over the plurality of contact pads and extends to an upper surface of the first wall and a plurality of contact structures (192 in Park et al.) that extend through the third insulating layer to upper surfaces of the plurality of contact pads.
Regarding claim 18, Park et al. teach an array of channel structures (122 in Park et al.) that are formed in the alternating first insulating layers and conductive layers that are stacked over the substrate.
Regarding claim 19, Park et al. teach in figure 20 and related text two slit structures (the vertical pillars of adjacent cells) on the boundaries of the first wall and the second wall so that the first wall and the second wall and the staircase are sandwiched between the two slit structures and that the insulating portion of the second layer in a step is located between the two slit structures (as depicted in figure 33).
Regarding claim 20, Park et al. teach that the staircase is on a boundary or in the middle of the stack; and an upper surface of each contact pad is between an upper surface and a lower surface of an insulating layer of an adjacent step above the corresponding step.
Regarding claim 21, Park et al. teach in figure 33 and related text that the conductive portion (the bottom horizontal part of element 210) includes a bottom structure that is in direct contact with and partially covered by the corresponding contact pad structure (220 or 220/210), a bottom surface of the bottom structure and the bottom surface of the insulating portion are co-planar, and a top surface of the bottom structure, the top surface of the insulating portion and a bottom surface of the contact pad structure are co-planar (since the contact pad structure is part of the conductive portion).
Regarding claim 22, Park et al. teach in figure 33 and related text that each contact pad structure 220/210 is in direct contact with the top surface of the insulating portion of the second layer of a corresponding step.
Response to Arguments
Applicants argue that prior art does not teach two slit structures extending along the first horizontal direction.
Park et al. teach in figures 1, 2C and 16 two slit structures 140b (since there are plurality of staircases) extending along the first horizontal direction.
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O.N. /ORI NADAV/
4/4/2026 PRIMARY EXAMINER
TECHNOLOGY CENTER 2800
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