Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 8/11/2026 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Rejection Note: Italicized claim limitations indicate limitations that are not explicitly disclosed in the primary reference, but disclosed in the secondary reference(s).
Claims 17-20 and 27 are rejected under 35 U.S.C. 103 as being unpatentable over Lee (US 20180294226 A1) in view of Liebman (US 20210118798 A1).
Fig. 7 is the M2 level, Figs. 1, 2A, and 2B are related to Fig. 7 (see [0048]). Figs. 1/2A/2B teach the perpendicular relation.
Regarding independent claim 17, Lee discloses a device comprising:
a memory instance (Fig. 7: C71 is relied upon here to teach a generic standard cell); and
a power distribution network having buried power rails (PR71-74; these rails being buried in a dielectric, [0075]: “BEOL may include…adding a dielectric, planarizing, forming holes, adding metal layers, forming vias”) routed underneath (selecting positive Z direction as underneath) the memory instance, wherein:
the buried power rails have first rails (See annotated figure) disposed in a first layer (M2) and second rails (PR71-PR74; corresponding to Fig. 1: PR11, PR12) disposed perpendicular to the first rails (perpendicular in the X/Y plane) in a second layer (M1),
the first rails have long rails (See annotated figure) with a first length (as measured in the Y direction) and short rails (See annotated figure) with a second length (as measured in the Y direction) that is less than the first length (“less than” is determined by the long rails extending completely over and beyond the second power rails in the Y direction, while first power rails are fully confined within the cell boundary),
directly adjacent second rails (at least portions of the cited rails are “directly adjacent”, See encircled portions in annotated Fig. 1) in the second layer (the M1 components of PR71/PR73) define a porosity channel (Fig. 7: See annotated figure for the designation of this region) therebetween, and
at least one of the short rails in the first layer terminates (terminates in the Y direction) before extending completely across the porosity channel such that a spatial gap (See annotated figure, a collective gap, with two portions of many gap portions annotated) is maintained within the porosity channel for routing one or more additional second rails in the second layer (the M1 component of PR72 is routed in this channel and overlaps the gap in the Z direction).
Illustrated below are marked and annotated figures of Figs. 1 and 7 of Lee.
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Lee fails to disclose the generic standard cell (Fig. 7: C71) is a memory instance. Thus, Lee fails to disclose “a memory instance”, as recited in the claim.
Liebman discloses a similar device where a standard cell is described as a memory instance ([0031]: “standard cells, such as inverter cells, NAND cells, NOR cells, and the like from a standard cell library”).
Modifying the generic standard cell of Lee to be a memory instance would arrive at the claimed device. Liebman teaches a design incentive for configuring a standard cell as a memory instance in that it would provide a cell according to required circuitry function ([0031]: “active devices, such as logic circuits, analog circuits, memory circuits…configured to perform one or more operations”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have the claimed memory instance because it a design incentive encompassed within the prior art, chosen according to required circuitry function. MPEP 2143 (I)(F).
Regarding claim 18, Lee in view of Liebman discloses the device of claim 17 (Lee: Fig. 7), wherein:
the first rails have a first width (as measured in the X direction), and
the second rails have a second width (as measured in the X direction) that is greater than the first width (greater in the X direction because it extends beyond a full overlap).
Regarding claim 19, Lee in view of Liebman discloses the device of claim 17 (Lee: Fig. 7), wherein:
the long rails and the short rails are separately coupled to the second rails with vias that extend between the first layer and the second layer,
a first set of the long rails (selecting one of the long rails as the first set) in the first layer is coupled to ground ([0023]: “VSS” is ground, consistent with the disclosure, as well as the ordinary and customary meaning of VSS; as reasoned in the claim 17 rejection the claimed coupling configuration is a design choice according to required circuitry configuration),
a second set of the long rails (selecting another of the long rails as the second set) in the first layer is coupled to a first supply ([0023]: “VDD” is the first supply; as reasoned in the claim 17 rejection the claimed coupling configuration is a design choice according to required circuitry configuration),
a first set of the short rails (selecting one of the short rails as the first set) in the first layer is coupled to a second supply ([0023]: “VSS” is the second supply because it supplies a different first rail and therefore is an electrical path different from the path supplying the first set of short rails; as reasoned in the claim 17 rejection the claimed coupling configuration is a design choice according to required circuitry configuration), and
a second set of the short rails (selecting another of the short rails as the second set) in the first layer is coupled to a third supply ([0023]: “VDD” is the third supply because it supplies a different first rail and therefore is an electrical path different from the path supplying the first set of short rails; as reasoned in the claim 17 rejection the claimed coupling configuration is a design choice according to required circuitry configuration).
Lee in view of Liebman discloses the vias and the first and second layers (Lee: Fig. 1: vias, M1, M2) but Lee fails to explicitly illustrate the via configuration for the selected embodiment (Fig. 7). Thus, Lee fails to disclose “the long rails and the short rails are separately coupled to the second rails with vias that extend between the first layer and the second layer”.
However, Lee teaches:
The first rails can be designed to perform the function of power rails ([0049]: “the power rail PR71 may include a pattern L71 of the M2 layer”).
All of the chosen first rails (of the selected Fig. 7 embodiment) overlap the second rails (in the Z direction). Thus, Lee teaches the first rails are spatially capable of coupling to the second rails (of the underlying M1 layer) in situations where a via is included.
The power rail arrangement may be varied as a design choice according to required circuitry configuration (Fig. 7: C71-C79 have varied M2 rail configurations; [0021]: “patterns of the M2 layer and the pattern of the M3 layer may be determined in a routing operation after the standard cells C11 and C12 are placed in a design process of the standard cells”).
Thus, separately coupling the long and short rails (of the first power rails in the M2 layer) to the second rails (of the overlapping M1 layer) with vias used in the same way as those disclosed in the Fig. 1 embodiment would have been obvious to one of ordinary skill in the art before the effective filing date because it is a design choice according to required circuitry configuration. Lee provides a teaching to motivate one to include the claimed coupling configuration in that it would enable improved electrical operation ([0049]: “an IR drop may be mitigated”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date because it is a design choice encompassed by the prior art that would enable improved electrical operation. MPEP 2143 (I)(G). MPEP 2144 (I).
Regarding claim 20, Lee in view of Liebman discloses the device of claim 19 (Lee: Fig. 7), wherein:
a first set of the second rails (PR71) in the second layer is coupled to ground ([0023]: “VSS” is ground, consistent with the disclosure, as well as the ordinary and customary meaning of VSS; as reasoned in the claim 1 rejection the claimed coupling configuration is a design choice according to required circuitry configuration) by way of a via coupled to the first set of the long rails in the first layer (as reasoned in the claim 1 rejection the claimed via configuration is a design choice according to required circuitry configuration),
a second set of the second rails (PR72) in the second layer is coupled to the first supply ([0023]: “VDD” is the first supply; as reasoned in the claim 1 rejection the claimed coupling configuration is a design choice according to required circuitry configuration) by way of another via coupled to the second set of the long rails in the first layer (as reasoned in the claim 1 rejection the claimed via configuration is a design choice according to required circuitry configuration),
a third set of the second rails (PR73) in the second layer is coupled to the second supply by way of a via (selecting the same via reasoned to couple the first set of short rails to VSS, from the claim 19 rejection; both PR71 and PR73 would be coupled to VSS thus meeting the claim) coupled to the first set of the short rails in the first layer (as reasoned in the claim 17 rejection the claimed via configuration is a design choice according to required circuitry configuration), and
a fourth set of the second rails (PR74) in the second layer is coupled to the third supply by way of another via (selecting the same via reasoned to couple the second set of short rails to VDD, from the claim 19 rejection; both PR72 and PR74 would be coupled to VDD thus meeting the claim) coupled to the second set of the short rails in the first layer (as reasoned in the claim 17 rejection the claimed via configuration is a design choice according to required circuitry configuration).
Note that claim 17 was previously addressed above, however, it’s being addressed differently here based on the reading of the reference, particularly to the assignment of the first and second rails in order to address the dependent claim 27.
Regarding independent claim 17, Lee discloses a device comprising:
a memory instance (Fig. 1: C11 is relied upon here to teach a generic standard cell); and
a power distribution network having buried power rails (M1/M2/M3; these rails being buried in a dielectric, [0075]: “BEOL may include…adding a dielectric, planarizing, forming holes, adding metal layers, forming vias”) routed underneath (selecting positive Z direction as underneath) the memory instance, wherein:
the buried power rails have first rails (L22-L25 and all other M2 rails) disposed in a first layer (M2) and second rails (L11-L12 and all other M1 rails) disposed perpendicular to the first rails (perpendicular in the X/Y plane) in a second layer (M1),
the first rails have long rails (L23/L24) with a first length (as measured in the Y direction) and short rails (L25 and all other M2 rails in cell C11) with a second length (as measured in the Y direction) that is less than the first length (“less than” is determined by the long rails extending completely over and beyond the short rails in the Y-direction),
directly adjacent second rails (L11/L12, these rails have portions “directly adjacent”, See encircled portions in annotated Fig. 1) in the second layer (these rails are in the M1 layer) define a porosity channel (Y10) therebetween, and
at least one of the short rails in the first layer terminates (terminates in the Y direction) before extending completely across the porosity channel such that a spatial gap (a Y-direction gap) is maintained within the porosity channel for routing one or more additional second rails in the second layer (additional second rails are the M1 rails between L11/L12).
Lee fails to disclose the generic standard cell (Fig. 7: C71) is a memory instance. Thus, Lee fails to disclose “a memory instance”, as recited in the claim.
Liebman discloses a similar device where a standard cell is described as a memory instance ([0031]: “standard cells, such as inverter cells, NAND cells, NOR cells, and the like from a standard cell library”).
Modifying the generic standard cell of Lee to be a memory instance would arrive at the claimed device. Liebman teaches a design incentive for configuring a standard cell as a memory instance in that it would provide a cell according to required circuitry function ([0031]: “active devices, such as logic circuits, analog circuits, memory circuits…configured to perform one or more operations”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have the claimed memory instance because it a design incentive encompassed within the prior art, chosen according to required circuitry function. MPEP 2143 (I)(F).
Regarding claim 27, Lee in view of Liebman discloses the method device of claim 17 (Lee: Fig. 1), wherein at least one of the long rails in the first layer (L23) extends completely across (“completely across” in the Y direction) the porosity channel between the directly adjacent second rails.
Allowable Subject Matter
Claims 1-6, 11-12, 21-23, and 29-32 are allowed.
The following is a statement of reasons for the indication of allowable subject matter:
The primary reason for the allowable subject matter of claims 1-6, 21-22, and 29-32 is the inclusion of the limitation “determining porosity associated with the second layer by locating empty space corresponding to the spatial gap within the porosity channel; and routing one or more additional second rails within the second layer based on the determined porosity” in combination with the other limitations in the claim. For example, prior art of record fails to teach or be reasonably combined to render obvious the claimed limitations “determining porosity”, and “routing…based on the determined porosity” when considered in combination with all other shapes, arrangements, and limitations in claim 1.
The primary reason for the allowable subject matter of claims 11-12 and 23 is the inclusion of the limitation “determining porosity associated with the second layer by locating empty space corresponding to the spatial gap within the porosity channel; and routing one or more additional second rails within the second layer based on the determined porosity” in combination with the other limitations in the claim. For example, prior art of record fails to teach or be reasonably combined to render obvious the claimed limitations “determining porosity”, and “routing…based on the determined porosity” when considered in combination with all other shapes, arrangements, and limitations in claim 11.
Response to Arguments
Applicant's arguments filed 9/21/2026 have been fully considered but they are not persuasive.
Applicant argues:
Applicant argues with respect to amended claim 17 that “Lee and Liebman do not teach, suggest, nor otherwise disclose…directly adjacent second rails…as recited in amended claim 17”. Remarks at pg. 10.
Examiner’s reply:
The examiner does not find Applicant’s arguments persuasive because after further consideration at least under MPEP 2111: Broadest Reasonable Interpretation, the examiner finds “directly adjacent” encompassing portions of the contended second rails. The rejection is maintained in substantially the same way as before; however, with adjustments to the citations and remarks to promote compact prosecution and clarity of the record.
Applicant argues:
Applicant argues with respect to amended claim 17 that “Lee and Liebman are silent regarding…at least one of the long rails in the first layer extends completely across the porosity channel”. Remarks at pg. 12.
Examiner’s reply:
Applicant’s arguments with respect to claim(s) 27 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. The examiner agrees that the particularly claimed limitation is not shown for the features cited in the claim 17 rejection as previously applied; however, the examiner finds at least one alternative interpretation of the Lee reference reading on the claim. MPEP 2111: Broadest Reasonable Interpretation.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM H ANDERSON whose telephone number is (571)272-2534. The examiner can normally be reached Monday-Friday, 8:00-5:00.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached at (571) 272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/WILLIAM H ANDERSON/Primary Examiner, Art Unit 2817
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