Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment/Arguments
Applicant’s amendment/arguments filed on 10/27/2025 has been carefully reconsidered by the examiner. As a result, claims 1-5, 7-27, 29-37 are allowable and claims 39-46 are objected due to being depended on new ground rejection claim 38.
Allowable Subject Matter
Claims 1-5, 7-27, and 29-37 are allowable.
The following is an examiner’s statement of reasons for allowance: Claim 1 is allowed over the prior art of record. The closet prior art of record, considered individually or in combination, fails to fairly teach or suggest invented features, as amended, structurally and functionally interconnected with other limitations in the manner as cited in the claim and dependent claims.
Claim 19 is allowed over the prior art of record. The closet prior art of record, considered individually or in combination, fails to fairly teach or suggest invented features, which is “current to voltage converter comprise a sample and hold circuit to hold the voltage”, structurally and functionally interconnected with other limitations in the manner as cited in the claim and dependent claims.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim 38 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ge (US 2021/0271732).
Regarding claim 38, Ge discloses an ADC architecture in figures 1-3 that teaches: an analog-to-digital converter (200) for receiving the sequence of currents (203) and converting (by 201, current to voltage converter then convert to output by 221) the sequence of currents (203) into an output comprising a plurality (137) of output (139) bits (see figure 1-3 and descriptions).
Allowable Subject Matter
Claim 39 is objected to as being dependent upon a rejected base claim, but it would be considered for allowable if it is rewritten in independent form including all of the limitations of the base claim and any intervening claims. Closest prior art of record, considered individually or in combination, fails to fairly teach or suggest objected features, which is: wherein each input in the sequence of inputs comprises a pulse, wherein the width of the pulse is proportional to a data value for the input.
Claim 40 is objected to as being dependent upon a rejected base claim, but it would be considered for allowable if it is rewritten in independent form including all of the limitations of the base claim and any intervening claims. Closest prior art of record, considered individually or in combination, fails to fairly teach or suggest objected features, which is: wherein each input in the sequence of inputs comprises a pulse added to an analog bias voltage, wherein the width of the pulse is proportional to a data value for the input.
Claim 41 is objected to as being dependent upon a rejected base claim, but it would be considered for allowable if it is rewritten in independent form including all of the limitations of the base claim and any intervening claims. Closest prior art of record, considered individually or in combination, fails to fairly teach or suggest objected features, which is: wherein each input in the sequence of inputs comprises a sequence of one or more pulses, wherein the number of pulses in the sequence of one or more pulses is proportional to a data value for the input.
Claim 42 is objected to as being dependent upon a rejected base claim, but it would be considered for allowable if it is rewritten in independent form including all of the limitations of the base claim and any intervening claims. Closest prior art of record, considered individually or in combination, fails to fairly teach or suggest objected features, which is: wherein each input in the sequence of inputs comprises a sequence of one or more pulses added to an analog bias voltage, wherein the number of pulses in the sequence of one or more pulses is proportional to a data value for the input.
Claim 44 is objected to as being dependent upon a rejected base claim, but it would be considered for allowable if it is rewritten in independent form including all of the limitations of the base claim and any intervening claims. Closest prior art of record, considered individually or in combination, fails to fairly teach or suggest objected features, which is: wherein each input in the sequence of inputs comprises an analog bias voltage, wherein the magnitude of the analog bias voltage is proportional to a data value for the input.
Claim 45 is objected to as being dependent upon a rejected base claim, but it would be considered for allowable if it is rewritten in independent form including all of the limitations of the base claim and any intervening claims. Closest prior art of record, considered individually or in combination, fails to fairly teach or suggest objected features, which is: wherein each input in the sequence of inputs comprises an analog bias voltage, wherein the magnitude of the analog bias voltage is proportional to a data value for multiple digital bits represented by the input.
Claim 46 is objected to as being dependent upon a rejected base claim, but it would be considered for allowable if it is rewritten in independent form including all of the limitations of the base claim and any intervening claims. Closest prior art of record, considered individually or in combination, fails to fairly teach or suggest objected features, which is: wherein each input in the sequence of inputs comprises an analog bias voltage, wherein the magnitude of the analog bias voltage varies depending on a bit position of a digital bit represented by the input.
Cited References
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Cited references are related to instant application subject matters.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LAM T MAI whose telephone number is (571)272-1807. The examiner can normally be reached Monday-Friday 6am-2pm eastern time.
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/LAM T MAI/Primary Examiner, Art Unit 2845
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