Prosecution Insights
Prosecution Insights
10 pending office actions • 7 art units • 9 examiners • 0 of 10 (0%) have an AI response strategy ready • 26 patents granted in the last 365 days
Based on the USPTO statutory response window for each pending office action. 10 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.
Every pending office action with a known statutory deadline, placed on a days-until-due axis. Dots left of Today are overdue; the further right, the more runway. Cases that share a deadline window stack vertically. 10 of the docket's apps have a known mailing date.
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| §103 only | 9 (90%) |
| §102 only | 1 (10%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| COON, BRADLEY SCOTT | 2 | 92.9% | +19.2% |
| HOANG, HUAN | 1 | 93.2% | +5.6% |
| TZENG, FRED | 1 | 86.8% | +3.9% |
| LEBOEUF, JEROME LARRY | 1 | 85.1% | +7.4% |
| HO, HOAI V | 1 | 92.6% | +5.5% |
| CYGIEL, GARY W | 1 | 76.1% | +9.5% |
| BERMUDEZ LOZADA, ALFREDO | 1 | 89.1% | +1.9% |
| DE LA GARZA, CARLOS HEBERTO | 1 | 69.2% | +44.4% |
| ZECHER, CORDELIA P K | 1 | 48.7% | +26.1% |
Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 7 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 17893071 | Testing Circuitry And Methods For Analog Neural Memory In Artificial Neural Network | BERMUDEZ LOZADA, ALFREDO | 28d overdue |
| 18125703 | SPLIT ARRAY ARCHITECTURE FOR ANALOG NEURAL MEMORY IN A DEEP LEARNING ARTIFICIAL NEURAL NETWORK | HO, HOAI V | 6d |
| 18782018 | HIGH VOLTAGE GENERATION BLOCK WITH TRIMMING CIRCUIT | TZENG, FRED | 22d |
| 18135664 | MULTIPLEXORS FOR NEURAL NETWORK ARRAY | COON, BRADLEY SCOTT | 28d |
| 18419079 | ERASING OF A WORD OR A PAGE OF NON-VOLATILE MEMORY CELLS IN AN ANALOG NEURAL MEMORY SYSTEM | COON, BRADLEY SCOTT | 30d |
| 18782022 | ARRAY OF MULTI-VALUE NON-VOLATILE MEMORY CELLS | HOANG, HUAN | 39d |
| 18435943 | PROGRAMMABLE LOGIC BLOCK COMPRISING FLASH MEMORY ARRAY TO STORE CONFIGURATION DATA FOR PROGRAMMABLE LOGIC | LEBOEUF, JEROME LARRY | 61d |
Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 4 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 17848381 | ARTIFICIAL NEURAL NETWORK COMPRISING REFERENCE ARRAY FOR ARRAY BIAS CONFIGURATION | ZECHER, CORDELIA P K | 4d overdue |
| 17847486 | VECTOR-BY-MATRIX-MULTIPLICATION ARRAY UTILIZING ANALOG INPUTS | DE LA GARZA, CARLOS HEBERTO | 7d |
| 18135664 | MULTIPLEXORS FOR NEURAL NETWORK ARRAY | COON, BRADLEY SCOTT | 28d |
| 18419079 | ERASING OF A WORD OR A PAGE OF NON-VOLATILE MEMORY CELLS IN AN ANALOG NEURAL MEMORY SYSTEM | COON, BRADLEY SCOTT | 30d |
| Art Unit | Apps |
|---|---|
| 2827 | 4 |
| 2625 | 1 |
| 2824 | 1 |
| 2137 | 1 |
| 2825 | 1 |
| 2182 | 1 |
| 2100 | 1 |
| App # | Title | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|
| 18782022 | ARRAY OF MULTI-VALUE NON-VOLATILE MEMORY CELLS | HOANG, HUAN | 2827 | §103 | Non-Final OA | 39d | Pending | Jul 23, 2024 |
| 18782018 | HIGH VOLTAGE GENERATION BLOCK WITH TRIMMING CIRCUIT | TZENG, FRED | 2625 | §103 | Non-Final OA | 22d | Pending | Jul 23, 2024 |
| 18435943 | PROGRAMMABLE LOGIC BLOCK COMPRISING FLASH MEMORY ARRAY TO STORE CONFIGURATION DATA FOR PROGRAMMABLE LOGIC | LEBOEUF, JEROME LARRY | 2824 | §103 | Final Rejection | 61d | Pending | Feb 07, 2024 |
| 18419079 | ERASING OF A WORD OR A PAGE OF NON-VOLATILE MEMORY CELLS IN AN ANALOG NEURAL MEMORY SYSTEM | COON, BRADLEY SCOTT | 2827 | §103 | Non-Final OA | 30d | Pending | Jan 22, 2024 |
| 18135664 | MULTIPLEXORS FOR NEURAL NETWORK ARRAY | COON, BRADLEY SCOTT | 2827 | §103 | Non-Final OA | 28d | Pending | Apr 17, 2023 |
| 18125703 | SPLIT ARRAY ARCHITECTURE FOR ANALOG NEURAL MEMORY IN A DEEP LEARNING ARTIFICIAL NEURAL NETWORK | HO, HOAI V | 2827 | §102 | Non-Final OA | 6d | Pending | Mar 23, 2023 |
| 18077686 | INPUT CIRCUIT FOR ARTIFICIAL NEURAL NETWORK ARRAY | CYGIEL, GARY W | 2137 | §103 | Non-Final OA | 29d | Pending | Dec 08, 2022 |
| 17893071 | Testing Circuitry And Methods For Analog Neural Memory In Artificial Neural Network | BERMUDEZ LOZADA, ALFREDO | 2825 | §103 | Non-Final OA | 28d overdue | Pending | Aug 22, 2022 |
| 17847486 | VECTOR-BY-MATRIX-MULTIPLICATION ARRAY UTILIZING ANALOG INPUTS | DE LA GARZA, CARLOS HEBERTO | 2182 | §103 | Non-Final OA | 7d | Pending | Jun 23, 2022 |
| 17848381 | ARTIFICIAL NEURAL NETWORK COMPRISING REFERENCE ARRAY FOR ARRAY BIAS CONFIGURATION | ZECHER, CORDELIA P K | 2100 | §103 | Final Rejection | 4d overdue | Pending | Jun 23, 2022 |
IP Author helps IP teams respond to office actions faster with AI-generated responses, examiner analytics, and prosecution intelligence.
Start Free Trial