DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
In addressing the rejection ground, each claim may not have been separately discussed to the extent the claimed features are the same as or similar to the previously-discussed features; the previous discussion is construed to apply for the other claims in the same or similar way.
In the office action, “/” should be read as and/or as generally understood. For example, “A/B” means A and B, or A or B.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 08/29/2025 has been entered.
Election/Restrictions
Claims 9-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 10/04/2022.
Claim Rejections - 35 USC § 112
Claim 23 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 23 recites the phrase “a seventh coupled between the first filter output and the ground terminal”. The phrase is incomplete.
Further clarification is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 3-4 and 8 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Stahl et al. (hereinafter Stahl; US 2014/0071719)
Regarding claim 1, Stahl discloses a circuit [e.g. fig. 5] comprising: a first filter [e.g. R2, Cy1] having a first filter input [e.g. the upper terminal of Cy1] and a first filter output [e.g. the lower terminal of Cy1], the first filter input coupled to a first conductor [e.g. ground], and the first filter configured to pass a first portion of a first signal on the first conductor to the first filter output, the first signal including a first alternating current (AC) signal [fig. 5 has AC power source, which supplies the voltage to the circuitry. Accordingly, the first signal includes a first AC signal referenced to a ground signal] reference to a ground terminal; a second filter [e.g. R1, C1] having a second filter input [e.g. the lower terminal of C1] and a second filter output [e.g. the upper terminal of R1], the second filter input coupled to a second conductor [e.g. P], and the second filter configured to pass a second portion of a second signal on the second conductor to the second filter output, the second signal including a second AC signal reference to the ground terminal [fig. 5 has AC power source, which supplies the voltage to the circuitry. Accordingly, the first signal includes a first AC signal referenced to a ground signal]; and a summing amplifier [e.g. R5, R4, C2, the two amplifiers/ Cy2] having an amplifier input [e.g. the right terminal of C2] and an amplifier output [e.g. the output of the left amplifier], the amplifier input coupled to the first and second filter outputs to receive a sum of the first portion of the first signal and the second portion of the second signal from the second filter output, the summing amplifier configured to amplify the sum, and the amplifier output coupled to at least one of the first or second conduct to apply an output signal of the summing amplifier to at least one of the first or second conductor [e.g. ground].
Regarding claim 3, Stahl discloses the circuit of claim 1, wherein the summing amplifier includes an operational amplifier.
Regarding claim 4, Stahl discloses the circuit of claim 1, wherein: the first filter includes a first capacitor [e.g. Cy1] coupled between the first conductor and the first filter output, and a first resistor [e.g. R2] coupled between the first filter output and a ground terminal [e.g. ground]; the second filter includes a second capacitor [e.g. C1] coupled between the second conductor and the second filter output, and a second resistor [e.g. R1] coupled between the second filter output and the ground terminal; and the circuit further comprises at least one of: a third capacitor [e.g. Cy3/Cy5] coupled between the amplifier output and the first conductor, or a fourth capacitor coupled between the amplifier output and the second conductor.
Regarding claim 8, Stahl discloses the circuit of claim 4, further comprising: a third resistor [e.g. R4] coupled between the first filter output and the amplifier input; and a fourth resistor [e.g. R1’] coupled between the second filter output and the amplifier input.
Claim(s) 1, 3-4, 6 and 8 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by West (US 6,646,837).
Regarding claim 1, West discloses a circuit [e.g. fig. 5] comprising: a first filter [e.g. C3/R3] having a first filter input [e.g. the right terminal of C3/R3] and a first filter output [e.g. the left terminal of C3], the first filter input coupled to a first conductor [e.g. the conductor at the right terminal of R3?C3], and the first filter configured to pass a first portion of a first signal on the first conductor to the first filter output, the first signal including a first alternating current (AC) signal reference to a ground terminal [e.g. GND/42; or see at least fig. 5]; a second filter [e.g. 44a/34a] having a second filter input [e.g. the left terminal of C1] and a second filter output [e.g. the right terminal of R1], the second filter input coupled to a second conductor [e.g. a first conductor of grounded N-phase], and the second filter configured to pass a second portion of a second signal on the second conductor to the second filter output, the second signal including a second AC signal reference to the ground terminal [see at least fig. 5]; and a summing amplifier [e.g. 48, R2] having an amplifier input and an amplifier output, the amplifier input coupled to the first and second filter outputs to receive a sum of the first portion of the first signal and the second portion of the second signal from the second filter output, the summing amplifier configured to amplify the sum, and the amplifier output coupled to at least one of the first or second conduct to apply an output signal of the summing amplifier to at least one of the first or second conductor [e.g. ground].
Regarding claim 3, West discloses the circuit of claim 1, wherein the summing amplifier includes an operational amplifier.
Regarding claim 4, West discloses the circuit of claim 1, wherein: the first filter includes a first capacitor [e.g. C3] coupled between the first conductor and the first filter output, and a first resistor [e.g. R3] coupled between the first filter output and the ground terminal; the second filter includes a second capacitor [e.g. C1/44a] coupled between the second conductor and the second filter output, and a second resistor [e.g. R1/34a] coupled between the second filter output and the ground terminal; and the circuit further comprises at least one of: a third capacitor [e.g. 44c/44n] coupled between the amplifier output and the first conductor, or a fourth capacitor coupled between the amplifier output and the second conductor.
Regarding claim 6, West discloses the circuit of claim 1, further comprising a third filter [e.g. 44b/43b] having a third filter input and a third filter output, the third filter input coupled to a third conductor [e.g. a second conductor of grounded N-phase], in which: the third filter output is coupled to the first and second filter outputs; the first filter is configured to receive the first AC signal at the first conductor; the second filter is configured to receive the second AC signal at the second conductor; the third filter is configured to receive a third AC signal at the third conductor; and the third AC signal is phase shifted with respect to the first and second AC signals [see at least. N-phase voltage source].
Regarding claim 8, West discloses the circuit of claim 4, further comprising: a third resistor [e.g. R2/38a] coupled between the first filter output and the amplifier input; and a fourth resistor [e.g. 34n/34c] coupled between the second filter output and the amplifier input.
Regarding claim 23 (as best understood), West discloses the circuit of claim 8, further comprising: a fifth resistor [e.g. 34c] coupled between the first filter output and the amplifier input; a sixth resistor [e.g. 34d] coupled between the second filter output and the amplifier input; a seventh [e.g. 34e] coupled between the first filter output and the ground terminal; and an eighth resistor [e.g. 34f] coupled between the second filter output and the ground terminal.
Regarding claim 24, West discloses the circuit of claim 3, wherein the operational amplifier includes an inverting input [e.g. the upper input] coupled to the amplifier input [e.g. the left/right terminal of R2 38a/R1 34n], a non-inverting input [e.g. the lower input] coupled to a voltage reference, and an output coupled to the amplifier output, the amplifier including a first capacitor [e.g. 44b] coupled between the amplifier input and the inverting input, and a second capacitor [e.g. 44c] coupled between the inverting input and the amplifier output.
Regarding claim 25, West discloses the circuit of claim 24, wherein the summing amplifier further includes a first resistor [e.g. R1 34b/34c] coupled between the amplifier input and the inverting input, and a second resistor [e.g. R2] coupled between the inverting input and the amplifier output.
Regarding claim 26, West discloses the circuit of claim 1, further comprising: a first inductor [e.g. the right/left inductor of T1] coupled between a first AC input [e.g. V1/V2] and the first conductor; and a second inductor [e.g. the left/right inductor of T1] coupled between a second AC input [e.g. V2/V3] and the second conductor.
Regarding claim 27, West discloses the circuit of claim 26, further comprising: a first capacitor [e.g. 44b/44c] coupled between the first AC input and the ground terminal; a second capacitor [e.g. 44c/44d] coupled between the second AC input and the ground terminal; a third capacitor [e.g. C3] and a first resistor [e.g. R3] coupled between the first conductor and the ground terminal; and a fourth capacitor [e.g. 44a] and a second resistor [e.g. 34a] coupled between the second conductor and the ground terminal.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Stahl et al. (US 2014/0071719) in view of Tucker (US 10,069,480).
Regarding claim 7, Stahl discloses the circuit of claim 1, except wherein: the summing amplifier has a supply voltage input referenced to the ground terminal. However, Tucker discloses an amplifier [see the amplifiers in fig. 6] having a supply voltage input referenced to the ground terminal [e.g. PE; or see figs. 6-7].
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device disclosed by Stahl in accordance with the teaching of Tucker regarding the ground in order to reducing ground current from a source [col 3, lines 64-66].
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over West (US 6,646,837).
Regarding claim 7, West discloses the circuit of claim 1. West does not explicitly disclose the operation amplifier 48 has a supply voltage input referenced to a ground terminal. However, it’s notoriously well-known that an operation amplifier has a supply voltage input referenced to a ground terminal. The official notice of the foregoing fact is hereby taken. For example, US 10,069,480 by Tucker discloses an amplifier [see the amplifiers in fig. 6] having a supply voltage input referenced to a ground terminal [e.g. PE; or see figs. 6-7], such that the combination discloses wherein: the summing amplifier has a supply voltage input referenced to the ground terminal [see at least fig. 5 West; Tucker].
Allowable Subject Matter
Claim 28 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Response to Arguments
After carefully review the Stahl reference, it’s determined that figure 5 discloses the new amendment of the claims 1 and claim 7. Regarding claim 1, Stahl discloses a circuit [e.g. fig. 5] comprising: a first filter [e.g. R2, Cy1] having a first filter input [e.g. the upper terminal of Cy1] and a first filter output [e.g. the lower terminal of Cy1], the first filter input coupled to a first conductor [e.g. ground], and the first filter configured to pass a first portion of a first signal on the first conductor to the first filter output, the first signal including a first alternating current (AC) signal [fig. 5 has AC power source, which supplies the voltage to the circuitry. Accordingly, the first signal includes a first AC signal referenced to a ground signal] reference to a ground terminal; a second filter [e.g. R1, C1] having a second filter input [e.g. the lower terminal of C1] and a second filter output [e.g. the upper terminal of R1], the second filter input coupled to a second conductor [e.g. P], and the second filter configured to pass a second portion of a second signal on the second conductor to the second filter output, the second signal including a second AC signal reference to the ground terminal [fig. 5 has AC power source, which supplies the voltage to the circuitry. Accordingly, the first signal includes a first AC signal referenced to a ground signal]; and a summing amplifier [e.g. R5, R4, C2, the two amplifiers/ Cy2] having an amplifier input [e.g. the right terminal of C2] and an amplifier output [e.g. the output of the left amplifier], the amplifier input coupled to the first and second filter outputs to receive a sum of the first portion of the first signal and the second portion of the second signal from the second filter output.
Applicant’s arguments with respect to claim(s) 1-4, 6-8, and 23-28 have been considered but are moot because the new ground of rejection relies on a new reference, West (US 6,646,837), which was not applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PATRICK C CHEN whose telephone number is (571)270-7207. The examiner can normally be reached M-F Flexible 8:00-16:00.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Regis Betsch can be reached at (571)270-7101. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/PATRICK C CHEN/Primary Examiner, Art Unit 2836
Prosecution Insights