DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on Jan. 29th 2026 has been entered.
Response to Amendment
The amendment filed on Dec. 30th 2025 has been entered. Claims 1, 6-16 and 26 remain pending in the application. Claims 1, 6-8, 11-12, 14-15 and 26 are examined in this office action. Claims 9-10, 13 and 16 are withdrawn from further consideration.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 26 is rejected under 35 U.S.C. 103 as being unpatentable over Choi et al. (US 20210096967 from IDS) in view of Yasuda et al. (US 20110210387).
Regarding claim 26, Son teaches a system (fig. 1, memory system; para. 0042), comprising:
a processor (fig. 2, processor 41; para. 0050) operably coupled to an input device and an output device (fig. 3, data input/output (I/O) devices in circuit 420; para. 0055); and one or more electronic devices (devices in nonvolatile memory device 50; para. 0055) operably coupled to the processor (41), the one or more electronic devices (devices in 50) comprising memory cells (cells in memory cell array 100; para. 0055) in first blocks and in second blocks (memory blocks BLK1 through BLKz; para. 0056) of a single die (fig. 1, 50 in the form of a die), the memory cells (100) comprising:
memory pillars (fig. 5, pillars 113; para. 0071) comprising cell materials (fig. 8A, 8B, charge storage layer CS; para. 0087). a combined thickness of the cell materials (total thickness of CS) of the first blocks (first channel hole CHa of memory block BLKa; para. 0087) differing from a combined thickness of the cell materials (total thickness of CS), respectively, of the second blocks (second channel hole CHb of memory block BLKb; para. 0088).
Choi fails to explicitly teach the cell materials comprising:
a charge blocking material;
a storage nitride material directly adjacent to the charge blocking material; and
a tunnel dielectric material directly adjacent to the storage nitride material;
the tunnel dielectric material of the first blocks exhibiting the same thickness as the tunnel dielectric material of the second blocks.
However, Yasuda teaches the cell materials (Yasuda: fig. 6, first insulating film (tunnel insulating film) 102, charge storage layer 103, second insulating films (block insulating film) 107; para. 0136, similar to CS of Choi) comprising:
a charge blocking material (Yasuda: 107);
a storage nitride material (Yasuda: 103 with silicon nitride film (Si3N4); para. 0133) directly adjacent to the charge blocking material (Yasuda: 107); and
a tunnel dielectric material (Yasuda: 102) directly adjacent to the storage nitride material (Yasuda: 103);
the tunnel dielectric material (Yasuda: 102) of the first blocks (Yasuda: fig. 6, embodiment 1 kind block, similar to BLKa of Choi) exhibiting the same thickness (Yasuda: both 4nm) as the tunnel dielectric material (Yasuda: 102) of the second blocks (Yasuda: fig. 24, embodiment 5 kind block, similar to BLKb of Choi).
Yasuda and Choi are considered to be analogous to the claimed invention because they are in the same field of memory cells.
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to add the charge blocking material, the storage nitride material, and the tunnel dielectric material and the tunnel dielectric material of the first blocks exhibiting the same thickness as the tunnel dielectric material of the second blocks as taught by Yasuda.
Doing so would realize an insulating film structure to reduce the deterioration and suppress dielectric breakdown and improve the reliability (Yasuda: para. 0255).
Allowable Subject Matter
Claims 1, 6-8, 11-12 and 14-15 are allowed
The following is a statement of reasons for the indication of allowable subject matter:
“the memory cells in the first blocks and in the second blocks configured as multilevel memory cells and single level memory cells, respectively;
the storage nitride material continuously extending between the charge blocking material and the tunnel dielectric material, the charge blocking material, the storage nitride material, and the tunnel dielectric material in the first blocks differing in thickness or in material composition from the charge blocking material, the storage nitride material, and the tunnel dielectric material, respectively, in the second blocks, and the thickness of the storage nitride material in the memory cells of the first blocks being less than the thickness of the storage nitride material in the memory cells of the second blocks.” recited in claim 1.
Claims 6-8 and 11 would be also allowable because they are dependent on claim 1.
“memory cells of the first blocks configured as multilevel memory cells and exhibiting different electrical properties relative to memory cells of the second blocks configured as single level memory cells;
each of the memory pillars comprising a charge blocking material between the tiers and a storage nitride material, the storage nitride material directly between the charge blocking material and a tunnel dielectric material, and the tunnel dielectric material between the storage nitride material and a channel material;
the storage nitride material of the second blocks exhibiting a greater thickness than the storage nitride material of the first blocks.” recited in claim 12.
Claims 14-15 would be also allowable because they are dependent on claim 12.
Response to Arguments
Applicant’s arguments with respect to claim 26 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ZHIJUN XU whose telephone number is (571)270-3447. The examiner can normally be reached Monday-Thursday 9am-5pm ET.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/ZHIJUN XU/Examiner, Art Unit 2818
/BRIAN TURNER/Examiner, Art Unit 2818