Attorney’s Docket Number: 2557-003334-US
Filing Date: 5/3/2021
Priority Date: 9/24/2020 (KR 10-2020-0124073)
Inventors: Do et al.
Examiner: Marcos D. Pizarro
DETAILED ACTION
This Office action responds to the amendment filed on 9/2/2025.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for a rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Continued Examination Under 37 CFR 1.114
A request for continued examination (RCE) under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after the final rejection in paper no. 14, mailed on 7/8/2025. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 9/2/2025 has been entered.
Amendment Status
The RCE submission filed on 9/2/2025, as an amendment in reply to the Office action in paper no. 14, has been entered. The present Office action is made with all the suggested amendments being fully considered. Accordingly, pending in this Office action are claims 1-9, 11-17 and 19-22.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-9, 11-14, 16, 17, 19, 21 and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Tu (US2019/0019834) in view of Furusawa (JP2004-253693), Derderian (US2003/0038355), Lua (US2014/0346683), Choi (US2014/0021608) and Kim (US 2007/0229107).
Regarding claim 1, Tu (see, e.g., fig. 9) shows most aspects of the instant invention including an image sensor package 100 comprising:
A circuit board 1
An image sensor chip 2 on the board
A bump structure on the chip and including a first bump
A bonding wire 3 connecting the board to the bump structure
A dam element 52 on the chip, the dam covering both the bump and the wire, and
A molding element 53 on the board contacting the dam and covering both the chip and the wire
wherein:
The dam 52 defines an inner cavity and includes an inner recess portion and an outer portion
The inner portion is adjacent to the cavity and is recessed inwards towards an outer surface of the dam 52
The outer portion is distal from the cavity in relation to the inner portion, and
The bonding wire 3 passes through the outer portion of the dam 52
The outer portion of the dam 52 extends continuously from an upper surface of the chip 2 to a lower surface of an optical element 4, and
The molding element 53 is in contact with the outer portion of the dam 52
Tu, however, fails to show the bump structure also comprising a second bump. Furusawa and Derderian, in similar packages to Tu, teaches the inclusion of a second bump for the purpose of strengthening the bond and protecting the wire. See, e.g., Furusawa: fig. 4 and p.5/ll.30-31, and Derderian: fig. 10 and par. 0068.
Accordingly, it would have been obvious to one of ordinary skill in the art, at the time the invention was made, to incorporate the second bump of Furusawa and Derderian into the package of Tu to strengthen the bond and protect the bonding wire.
Furusawa/Derderian, however, fail to show the first bump having a greatest width extending in a first plane and the second bump having a greatest width extending in a second plane, wherein the second bump is tilted such that the first and second planes intersect each other. Lua, in a similar bump structure to Furusawa/Derderian, teaches that the dimensions of the bump structure may be tailored by heat, mechanical force and ultrasonic energy to flatten and coined the bumps to a desired shape and size (see, e.g., Lua: par.0033/ll.6-15). Choi (see, e.g., fig. 1A), on the other hand, shows a bump structure comprising first 310 and second 430 bumps, wherein the second bump is tilted with respect to the first bump.
Lua and Choi are evidence showing that one of ordinary skill in the art would have appreciated that the bump structure of Furusawa/Derderian would be equivalent to a structure wherein the second bump is tilted with respect to the first bump, and that doing so would result in no change in the performance of the structure. That is, both structures would yield the predictable results of strengthening the bond, protecting the wire and electrically coupling the chip and the board.
Therefore, it would have been obvious at the time of the invention to one of ordinary skill in the art to have the bump structure of Furusawa/Derderian or to have a structure wherein the second bump is tilted, as taught by Choi, because these structures were recognized as equivalents in the art, and both would yield the predictable results of strengthening the bond, protecting the wire and electrically coupling the board and the chip. KSR International Co. v. Teleflex Inc., 550 U.S.--,82 USPQ2d 1385 (2007).
Additionally, Lua (see, e.g., par.0033/ll.6-15) teaches that the specific claimed shapes and dimensions, i.e., a first bump with the greatest width in a first plane and a second bump with the greatest width in a second plane tilted with respect to the first plane, absent any criticality, are only considered to be the “optimum” shapes and dimensions of the bumps disclosed by Tu/Furusawa/Derderian that a person having ordinary skill in the art would have been able to determine using routine experimentation based, among other things, on the desired flattening, manufacturing costs, etc. (see Boesch, 205 USPQ 215 (CCPA 1980)), and since neither non-obvious nor unexpected results, i.e., results which are different in kind and not in degree from the results of the prior art, will be obtained as long as a bump structure including first and second bumps is used, as already suggested by Tu/Furusawa/Derderian.
Accordingly, since the applicants have not established the criticality (see next paragraph below) of the stated relative dimensions and shapes, it would have been obvious to one of ordinary skill in the art to use these in the bump structure of Tu/Furusawa.
CRITICALITY
The specification contains no disclosure of either the critical nature of the claimed dimensions and shapes or any unexpected results arising therefrom. Where patentability is said to be based upon chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Regarding claim 1, Tu discloses that the outer portion is recessed inwardly rather than protruding outwardly from the cavity. Kim, in a package analogous to Tu’s, teaches using a dam element 306 to cover and protect a bump structure; the dam element may have a variety of geometric shapes. See, e.g., Kim: fig. 4 and pars.0038-0039.
The teachings Kim are evidence that one of ordinary skill in the art would have recognized that configuring the outer portion of the dam to protrude outwardly, rather than being recessed inwardly as in Tu, would not result in any unexpected results or diminished performance. Both configurations would predictably achieve the same result, protecting the bonding wire and bump structure.
Accordingly, modifying the shape of the outer portion of Tu’s dam to protrude outwardly, absent any criticality for the protruding shape, would have been an obvious design choice within the routine skill of a person in the art. This is consistent with established case law holding that changes in shape or configuration, where no criticality is shown, are within the level of ordinary skill. See In re Dailey, 149 USPQ 47 (CCPA 1966).
Furthermore, it would have been obvious to one of ordinary skill in the art to configure the outer portion of Tu’s dam to either protrude outwardly or be recessed inwardly, as both configurations were recognized as functional equivalents in the semiconductor packaging art, as evidenced by Kim. The choice between equivalent alternatives that yield the same predictable results is in accordance with the reasoning set forth in KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007).
Regarding claim 2, Furusawa (see, e.g., fig. 4) teaches that the first bump 21 is on the chip 10.
Regarding claim 3, Furusawa (see, e.g., fig. 4 and p.5/ll.7-9) teaches that the first bump 21 and the wire 50 are separate portions of a single, continuous piece of material.
Regarding claim 8, Lua teaches that the first and second bumps may have any of an oval shape (see, e.g., fig. 6C) or a circular shape (see, e.g., fig. 6D).
Regarding claim 9, Lua (see, e.g., fig. 6D) teaches that the width of the first bump is equal to or greater than the width or diameter of the second bump.
Regarding claims 4 and 16, Tu (see, e.g., par.0039) teaches that the dam includes a material different from a material of the molding element.
Regarding claim 5, Tu (see, e.g., fig. 6) shows that the maximum height of the wire 3 is less than the sum of thickness of the chip 1 and the dam 52.
Regarding claims 6 and 12, Tu (see, e.g., figs. 4 and 9) teaches that the dam 52 is adjacent opposite outer surfaces of the chip, and that the optical element 4 is further on the dam.
Regarding claim 7, Tu (see, e.g., fig. 9) shows a ball bump between the wire 3 and a pad 111 of the board.
Regarding claims 21 and 22, Tu (see, e.g., figs. 4 and 9) shows the dam 52 extending through a periphery of the chip 2 such that it isolates the cavity 6 from the molding element 53.
Regarding claim 11, Tu (see, e.g., fig. 9) shows most aspects of the instant invention including an image sensor package 100 comprising:
A circuit board 1
An image sensor chip 2 on the board
A bump structure adjacent to outer surfaces of the chip and including a first bump
A bonding wire 3 connecting the chip to the board
A dam element 52 on the chip, the dam covering both the bump and the wire, and
A molding element 53 located along a periphery of the dam on the board and sealing the chip and the wire
wherein:
A first end of the wire 3 is on the first bump
An opposite second end of the wire is on the board 1
The dam 52 is located along a periphery of the chip
The dam 52 includes at least one inner surface at least partially defining an inner cavity within the dam
wherein:
The dam 52 includes an inner recess portion and an outer portion
The inner recess portion is adjacent to the cavity and is recessed inwards towards an outer surface of the dam 52
The outer portion is distal from the cavity in relation to the inner portion, and
The wire 3 passes through the outer portion of the dam 52
Regarding claim 11, see also the comment stated above in paragraphs 8-15 with respect to claim 1, which are considered repeated here.
Regarding claim 13, Tu (see, e.g., fig. 9) shows the molding element 53 surrounding the optical element 4.
Regarding claim 14, Tu (see, e.g., fig. 4) shows the bump structure is adjacent to opposite outer edges 213 of the chip, and the wire 3 connects the bump structure and the board 1 to each other.
Regarding claim 17, Tu (see, e.g., figs. 4 and 9) shows most aspects of the instant invention including an image sensor package comprising:
A circuit board 1
An image sensor chip 2 on the board
A bump structure adjacent to outer surfaces of the chip and including a first bump
A bonding wire 3 connecting the chip to the board
A dam element 52 on the chip, the dam covering both the bump and the wire, and
An optical element 4 on the dam, and
A molding element 53 sealing the chip and the wire
wherein:
A first end of the wire 3 is on the first bump
An opposite second end of the wire is on the board 1
The dam 52 is adjacent to opposite outer surfaces of the chip
The dam 52 includes at least one inner surface at least partially defining an inner cavity within the dam
The inner cavity exposes a central portion 211 of the chip
The molding element 53 is located on opposite outer surfaces of the optical element
The molding element 53 includes a material different from the dam 52 (see, e.g., par.0039)
The dam 52 includes an inner recess portion and an outer portion
The inner portion is adjacent to the cavity and recessed inwards towards an outer surface of the dam 52
The outer portion is distal from the cavity in relation to the inner portion, and
The wire 3 passes through the outer portion of the dam 52
Regarding claim 17, see also the comments stated above in paragraphs 8-15 with respect to claim 1, which are considered repeated here.
Regarding claim 19, Tu (see, e.g., fig. 9) teaches that an upper surface of the molding element 53 is coplanar with an upper surface of the optical element 4.
Response to Arguments
Applicant’s arguments have been fully considered but are not persuasive.
The applicant argues:
The claims recite an image sensor package comprising an inner cavity and a molding element in contact with an outer portion of a dam. Kim, in figure 4 and par. 0039, teaches a dam 306 surrounded by an adhesive 318. Kim’s adhesive would prevent the molding compound of Tu from contacting the dam as required by the claims. Further, the adhesive of Kim fills the space between the chips, such that the combined teachings of Tu and Kim would not result in a package having an inner cavity.
The examiner responds:
These arguments are not persuasive because they are based on a mischaracterization of the rejection. The rejection does not rely on Kim for the limitations directed to the molding element in contact with the dam or the presence of an inner cavity. Tu, the primary reference, already teaches these features. Specifically, Tu (see, e.g., figure 9) discloses an image sensor package structure 100 including a cavity region 6 above the sensing area, an inherent characteristic of image sensor packages, and a molding element 53 contacting an outer portion of a dam structure 52. Accordingly, the presence of adhesive in Kim has no bearing on these features since they are already taught or suggested by Tu alone.
Kim is relied upon solely to teach that dam structures in semiconductor device packages may assume a variety of geometric configurations. Although Kim’s embodiment may not depict an image sensor package, it nonetheless teaches that the dam geometry can be modified depending on design needs (¶0039). Therefore, it would have been obvious to one of ordinary skill in the art to modify Tu’s dam to include an outwardly protruding outer portion as claimed, as a matter of routine design choice, without adversely affecting device performance or operation.
Furthermore, the modification suggested by Kim would not alter Tu’s inner cavity structure, which is necessary for the optical functionality of Tu’s image sensor. Thus, the combination of Tu and Kim would have yielded the claimed configuration, with predictable results.
Accordingly, Applicant’s arguments do not overcome the prima facie case of obviousness, and the rejection under 35 U.S.C. § 103 is therefore maintained.
All other arguments with respect to the claims have been considered but are moot in view of the new grounds of rejection.
Conclusion
Papers related to this application may be submitted directly to Art Unit 2814 by facsimile transmission. Papers should be faxed to Art Unit 2814 via the Art Unit 2814 Fax Center. The faxing of such papers must conform to the notice published in the Official Gazette, 1096 OG 30 (15 November 1989). The Art Unit 2814 Fax Center number is (571) 273-8300. The Art Unit 2814 Fax Center is to be used only for papers related to Art Unit 2814 applications.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Marcos D. Pizarro at (571) 272-1716 and between the hours of 9:00 AM to 7:00 PM (Eastern Standard Time) Monday through Thursday or by e-mail via Marcos.Pizarro@uspto.gov. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Wael Fahmy, can be reached on (571) 272-1705.
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/Marcos D. Pizarro/Primary Examiner, Art Unit 2814
MDP/mdp
October 8, 2025