Office Action Predictor
Application No. 17/334,178

HIGH SPEED BRIDGE BETWEEN A PACKAGE AND A COMPONENT

Final Rejection §103
Filed
May 28, 2021
Examiner
LASASSO, VICTOR JOSEPH
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Intel Corporation
OA Round
4 (Final)
81%
Grant Probability
Favorable
5-6
OA Rounds
3y 5m
To Grant
72%
With Interview

Examiner Intelligence

81%
Career Allow Rate
21 granted / 26 resolved
Without
With
+-8.3%
Interview Lift
avg trend
3y 5m
Avg Prosecution
22 pending
48
Total Applications
career history

Statute-Specific Performance

§103
56.5%
+16.5% vs TC avg
§102
30.0%
-10.0% vs TC avg
§112
13.5%
-26.5% vs TC avg
Black line = Tech Center average estimate • Based on career data

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s arguments with respect to claim(s) 1-21 have been considered but are moot in view of the newly cited prior art. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-5, 8-9,12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liff et al (USPGPUB 20200098692, hereinafter “Liff”) in view of Lin et al (USPGPUB 20140264928, hereinafter “Lin”). Regarding Claim 1, Liff teaches (Fig. 7A) an apparatus comprising: a bridge (1-104) having a first side (bridge 104, bottom) and a second side (bridge 104, top) opposite the first side (bridge 104, top) , the first side (bridge 104, bottom) of the bridge (104) includes a plurality of electrical contacts (122) that are electrically coupled ([0030], “The bridge structure 104 may be a double-sided structure…”; vias are seen connecting electrical contacts on the top and bottom side of the bridge; [0030], “the bridge structure 104 may be a passive interposer having active and/or passive circuitry and TSVs”), respectively, with a plurality of electrical contacts (124) on the second side (bridge 104, top) of the bridge (104) using a plurality of electrical connectors (vias) within the bridge (104); wherein the plurality of electrical contacts (122) on the first side of the bridge (bridge 104, bottom) are to electrically couple ([0029], “…the conductive contacts 122 at the bottom surface of the bridge structure 104 may be electrically and mechanically coupled to the conductive contacts 146 at the top surface of the package substrate 102 by the PS interconnects 150-1…”) with a plurality of contacts (146) on a package (114-1, 114-2); wherein the plurality of electrical contacts (124) on the second side (bridge 104, top) of the bridge (104) are to electrically couple ([0031], “The dies 114-1, 114-2 may be electrically and mechanically coupled to the bridge structure 104”) with a plurality of contacts (124) on a substrate (Fig. 7A, 102), wherein the substrate (102) is a single continuous substrate (substrate 102 is seen as a single, continuous body) that extends laterally beyond outermost sidewalls of the bridge (the substrate 102 is seen overlapping the sidewalls of bridge 104 on both sides) ; wherein the bridge (104) is positioned between ([0025, “In particular, the bridge structure 104 may include a first surface and an opposing second surface having the first surface of the bridge structure 104 coupled to the package substrate 102, and the second surface of the bridge structure 104 coupled to the first die 114-1 and the second die 114-2, such that the bridge structure 104 is between a surface of the package substrate 102 and the first and second dies 114-1, 114-2”) the package (114-1, 114-2) and the substrate (102) to electrically couple ([0061], “The dies 114-1, 114-2 may be coupled to the bridge structure by DTB interconnects 130, and may be coupled to the package substrate 102 by through dielectric conductive pathways 151…”) the package (114-1, 114-2) with the substrate (102); and wherein a pitch ([0032], “the DTB interconnects may have a pitch between 5 microns and 200 microns”; the pitch of the connectors seen within bridge structure 104 can be seen as equal to the pitch of the DTB interconnects) of the plurality of electrical connectors (vias) within the bridge (104) is less (the pitch of the electrical connectors within the bridge would range from 5 to 200 microns, whereas the pitch of the package-to-substrate interconnects can range from 30 to 800 microns, so the disclosure of Liff anticipates the pitch of the electrical connections within the bridge to be less than that of the couplings outside the bridge) than a pitch ([0032], “the PS interconnects may have a pitch between 30 microns and 800 microns”) of a plurality of couplings (151) outside the bridge (104) that physically couple (couplings 151 are seen physically coupling package 114-1/2 and the substrate 102) the package (114-1, 114-2) with the substrate (102). Liff is silent with regards to the package comprising a glass core having a plurality of plated through holes therein and coupled to the plurality of contacts. Lin teaches the package (Fig. 2H, a package layer, hereinafter PL is seen including semiconductor material 22, and an encapsulant core material 23) comprising a glass core (23, [0049], “…the first encapsulant 23 can be made of a glass material…”) having a plurality of plated ([0053], “The second conductive through holes 220 are made of copper and formed by laser drilling and electroplating…”) through holes (220) therein and coupled to the plurality of contacts (plated through holes 220 are seen coupled to contacts 211 which connect the package to an interposer). It would have been obvious to a person of ordinary skill in the art, absent unexpected results, before the date of effective filing, to incorporate the glass material of and the plated vias being of Lin into the apparatus of Liff in order to arrive at the expected result of taking advantage of the known durability of glass as a structural material with the known benefit of allowing more advanced circuitry setups within the device with reasonable expectation of success. Regarding Claim 2, Liff in view of Lin teaches the apparatus of Claim 1, wherein the bridge is a glass bridge (0030], “The bridge structure 104 may be a double-sided structure…”; vias are seen connecting electrical contacts on the top and bottom side of the bridge; [0030], “the insulating material of a die 114 may include a dielectric material, such as … glass reinforced epoxy matrix materials…” ). Regarding Claim 3, Liff in view of Lin teaches the apparatus of Claim 2, wherein the plurality of electrical connectors of the bridge are, respectively, within a plurality of through hole vias in the glass bridge ((0030], “The bridge structure 104 may be a double-sided structure…”; [0030], “The conductive pathways in a die 114 may include conductive traces and/or conductive vias, and may connect any of the conductive contacts in the die 114 in any suitable manner”). Regarding Claim 4, Liff in view of Lin teaches (Fig. 7B) the apparatus of claim 3, wherein the plurality of electrical connectors (vias) are formed as plated through hole vias ([0060], “The conductive vias or pillars may be formed using any suitable process, including electroplating, sputtering, or electroless plating”) in the glass bridge (104). Regarding Claim 5, Liff in view of Lin teaches the apparatus of claim 3, wherein at least some of the through hole vias have a pitch of less than 10 microns (pm) ([0032], “the DTB interconnects may have a pitch between 5 microns and 200 microns”; the pitch of the connectors seen within bridge structure 104 can be seen as equal to the pitch of the DTB interconnects. A pitch of less than 10 microns would be anticipated.) Regarding Claim 8, Liff in view of Lin teaches the apparatus of claim 3, wherein at least one of the through hole vias (vias) is not circular (Liff Fig. 7A, as can be seen, the via structures are not perfectly vertical, and therefore have irregular shaping and are not circular). Regarding Claim 9, Liff in view of Lin teaches the apparatus of claim 1, wherein the electrical connectors include a selected one of copper or gold ([0039], “The conductive pathways disclosed herein (e.g., conductive traces and/or conductive vias) may be formed of any appropriate conductive material, such as copper, silver, nickel, gold…”) Regarding Claim 12, Liff in view of Lin teaches (Fig. 7A) the apparatus of claim 1, wherein the bridge (104) is positioned at a second level interconnect (the bridge 104 sits at a level between the package 114-1, 114-2 which comprises the first layer and the substrate 102 which makes up the second layer, making it a second level interconnect). Claim(s) 7, 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liff in view of Lin as applied to claim 1 above, and further in view of Otsuka et al (USPGPUB 20040184219, hereinafter “Otsuka”). Regarding Claim 7, Liff in view of Lin teaches the apparatus of Claim 3, but Liff in view of Lin is silent with regards to a system wherein the through hole vias are created using a laser-assisted etching of glass interconnects (LEGIT) process. Otsuka teaches a system wherein the through hole vias (35) are created using a laser-assisted etching of glass interconnects (LEGIT) process ([0165], “through holes … can be realized by using laser beam”). It would have been obvious to a person of ordinary skill in the art at the time of effective filing, absent unexpected results, to apply the laser-assisted etching process of Otsuka to the apparatus of Liff in view of Lin, so as to ensure a more precise system of manufacture. Regarding Claim 10, Liff in view of Lin teaches the apparatus of claim 1, but Liff in view of Lin is silent with regards to a system wherein the plurality of electrical contacts on the first side of the bridge or the plurality of electrical contacts on the second side of the bridge extend above a plane of the first side of the bridge or a plane of the second side of the bridge. Otsuka teaches (Fig. 1) a system wherein the plurality of electrical contacts (37) on the first side (38, bottom side) of the bridge (38) or the plurality of electrical contacts (36) on the second side (38, top side) of the bridge (38) extend (Fig. 1, electrical contacts 37 extend above the second side of the bridge structure 38) above a plane of the first side of the bridge (38, bottom side) or a plane of the second side (38, top side) of the bridge (38). It would have been obvious to a person of ordinary skill in the art at the time of effective filing, absent unexpected results, to use the electrical contact structure of Otsuka in the apparatus of Liff in view of Lin so as to produce the expected result of creating an apparatus whose manufacture does not require the use of additional interconnect structures to physically and electrically couple the bridge to the package or the substrate. Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liff (Fig. 7A) in view of Lin as applied to claim 1 above, and further in view of Liff (Fig.1B embodiment). Regarding Claim 11, Liff in view of Lin teaches (Fig. 7A) the apparatus of claim 1, but is silent with regards to a system wherein a plurality of couplings outside the bridge are ball grid array (BGA) couplings. Liff in view of Lin teaches (Fig. 1B) a system wherein a plurality of couplings (150) outside the bridge (104) are ball grid array (BGA) couplings ([0045], “In some embodiments, a set of PS interconnects 150 may include solder (e.g., solder bumps or balls that are subject to a thermal reflow to form the PS interconnects 150)”). It would have been obvious to a person of ordinary skill in the art before the date of effective filing, absent unexpected results, to use the ball-grid array structure of Liff (Fig. 1B) in the apparatus of Liff (Fig. 7A) in view of Lin so as to allow for manufacture of an apparatus that is more conductive and easier to manufacture and allows for the use of a standard connection array. Claim(s) 13-18, 20-21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liff (Fig. 7A embodiment) in view of Liff (Fig. 1B embodiment) and in further view of Lin. PNG media_image1.png 392 608 media_image1.png Greyscale Fig. 1B of Liff Regarding Claim 13, Liff teaches (Fig. 7A) an apparatus comprising: a package (114-1,2) having a first side (114-1,2, bottom side) and a second side (114-1,2, top side) opposite the first side (114-1, 114-2, bottom side); a substrate (102) with a first side (102, top side) and a second side (102, bottom side) opposite the first side (102, top side), the first side (102, top side) of the substrate (102) physically coupled (interconnects 151 are seen physically coupling the top side of substrate 102 with the bottom side of package 114-1,2) with the second side (102, top side) of the package (114-1, 114-2); a bridge (104) having a first side (104, bottom side) and a second side (104, top side) opposite the first side (104, bottom side), the first side (104, bottom side) of the bridge (104) includes a plurality of electrical contacts (122) that are electrically coupled ([0030], “The bridge structure 104 may be a double-sided structure…”; vias are seen connecting electrical contacts on the top and bottom side of the bridge; [0030], “the bridge structure 104 may be a passive interposer having active and/or passive circuitry and TSVs”), respectively, with a plurality of electrical contacts (124) on the second side (104, top side) of the bridge (104) using a plurality of electrical connectors (vias), wherein the substrate (102) is a single continuous substrate (the substrate 102 is seen as a single, continuous body) that extends laterally beyond outermost sidewalls of the bridge (the substrate 102 is seen overlapping the sidewalls of bridge 104 on both sides); wherein the plurality of electrical contacts (122) on the first side (104, bottom side) of the bridge (104) are physically (contacts 146 on the package 114-1,114-2 are seen physically coupled with contacts 122 on the bottom side of bridge 104 by interconnect structures 150-1) and electrically ([0029], “…the conductive contacts 122 at the bottom surface of the bridge structure 104 may be electrically and mechanically coupled to the conductive contacts 146 at the top surface of the package substrate 102 by the PS interconnects 150-1…”) coupled with a plurality of contacts (146) on a package (114-1, 114-2; wherein the plurality of electrical contacts (124) on the second side (104, top side) of the bridge (104) are physically (contacts 124 on the top side of the bridge are seen physically connected to contacts 124 on the bottom side of the substrate 102 by interconnects 130) and electrically coupled ([0031], “The dies 114-1, 114-2 may be electrically and mechanically coupled to the bridge structure 104”) with a plurality of contacts (124) on a substrate (102); and wherein a distance of a pitch ([0032], “the DTB interconnects may have a pitch between 5 microns and 200 microns”; the pitch of the connectors seen within bridge structure 104 can be seen as equal to the pitch of the DTB interconnects) of the plurality of electrical contacts (122) on the second side (104, top side) of the bridge (104) is less (the pitch of the electrical connectors within the bridge would range from 5 to 200 microns, whereas the pitch of the package-to-substrate interconnects can range from 30 to 800 microns, so the disclosure of Liff anticipates the pitch of the electrical connections within the bridge to be less than that of the couplings outside the bridge) than a distance of the pitch ([0032], “the PS interconnects may have a pitch between 30 microns and 800 microns”) of the PS interconnects. The figure 7A embodiment of Liff is silent with regards the package and the substrate being electrically and physically coupled by a ball grid array (BGA). Liff teaches (Fig. 1B) a system wherein the package (114-1, 114-2) and substrate (102) are physically and mechanically coupled by ball grid array (BGA) couplings ([0045], “In some embodiments, a set of PS interconnects 150 may include solder (e.g., solder bumps or balls that are subject to a thermal reflow to form the PS interconnects 150)”). It would have been obvious to a person of ordinary skill in the art before the date of effective filing, absent unexpected results, to use the ball-grid array structure of Liff (Fig. 1B) in the apparatus of Liff (Fig. 7A) so as to allow for manufacture of an apparatus that is more conductive and easier to manufacture and allows for the use of a standard connection array. Liff in view of Liff is silent with regards to the package comprising a glass core having a plurality of plated through holes therein and coupled to the plurality of contacts. Lin teaches the package (Fig. 2H, a package layer, hereinafter PL is seen including semiconductor material 22, and an encapsulant core material 23) comprising a glass core (23, [0049], “…the first encapsulant 23 can be made of a glass material…”) having a plurality of plated ([0053], “The second conductive through holes 220 are made of copper and formed by laser drilling and electroplating…”) through holes (220) therein and coupled to the plurality of contacts (plated through holes 220 are seen coupled to contacts 211 which connect the package to an interposer). It would have been obvious to a person of ordinary skill in the art, absent unexpected results, before the date of effective filing, to incorporate the glass material of and the plated vias being of Lin into the apparatus of Liff in view of Liff in order to arrive at the expected result of taking advantage of the known durability of glass as a structural material with the known benefit of allowing more advanced circuitry setups within the device with reasonable expectation of success. Regarding Claim 14, Liff in view of Liff and Lin teaches (Lin Fig. 1B) the apparatus of claim 13, wherein the first side (102, top side side) of the substrate (102) is physically (the top side of substrate 102 and the bottom side of package 114-1, 114-2 are seen connected by BGA 150-2) and electrically coupled ([0031], “In particular, the top surface of the package substrate 102 may include a set of conductive contacts 146, and the bottom surface of the dies 114-1, 114-2 may include a set of conductive contacts 122; the conductive contacts 122 at the bottom surface of the dies 114-1, 114-2 may be electrically and mechanically coupled to the conductive contacts 146 at the top surface of the package substrate 102 by the PS interconnects 150-2”) with the second side (114-1, 114-2, bottom side) of the package (114-1, 114-2) with the BGA (150-2). Regarding Claim 15, Liff in view of Liff and Lin teaches the apparatus of claim 13, wherein the bridge (104) is a glass bridge (0030], “The bridge structure 104 may be a double-sided structure…”; vias are seen connecting electrical contacts on the top and bottom side of the bridge; [0030], “the insulating material of a die 114 may include a dielectric material, such as … glass reinforced epoxy matrix materials…”). Regarding Claim 16, Liff in view of Liff and Lin teaches the apparatus of claim 15, wherein the plurality of electrical connectors of the bridge are, respectively, within a plurality of through hole vias in the glass bridge ((0030], “The bridge structure 104 may be a double-sided structure…”; [0030], “The conductive pathways in a die 114 may include conductive traces and/or conductive vias, and may connect any of the conductive contacts in the die 114 in any suitable manner”). Regarding Claim 17, Liff in view of Liff and Lin teaches the apparatus of claim 16, wherein the plurality of electrical connectors (vias) are formed as plated through hole vias ([0060], “The conductive vias or pillars may be formed using any suitable process, including electroplating, sputtering, or electroless plating”) in the glass bridge (104). Regarding Claim 18, Liff in view of Liff and Lin teaches the apparatus of claim 16, wherein at least some of the through hole vias have a pitch of less than 10 microns (pm). Regarding Claim 20, Liff in view of Liff and Lin teaches the apparatus of claim 13, wherein the bridge (104) forms a high speed input/output (I/O) bridge ( [0030], “the bridge structure 104 may be a double-sided die. In this context, a double-sided die refers to a die that has connections on both surfaces. In some embodiments, a double-sided die may include through silicon vias”; [0034], “In some embodiments, the dies 114 in any of the microelectronic assemblies 100 disclosed herein may include on-package memory devices (e.g., random access memory (RAM)), I/O circuitry (e.g., I/O drivers), high bandwidth memory, accelerators,” The bridge structure 104 may be a die in some embodiments, and therefore may have I/O circuitry, high bandwidth memory, and accelerators). Regarding Claim 21, Liff in view of Liff and Lin teaches the apparatus of claim 13, wherein the bridge (104) is a silicon bridge ([0030], “the bridge structure 104 may be a double-sided die. In this context, a double-sided die refers to a die that has connections on both surfaces. In some embodiments, a double-sided die may include through silicon vias”; [0038], “In some embodiments, the insulating material of a die 114 may include a dielectric material, such as silicon dioxide, silicon nitride…”; The bridge structure 104 may be a die in some embodiments, and therefore may comprise silicon). Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liff in view of Lin as applied to claim 3 above, and further in view of Griggio et al (WO 2017087005 hereinafter “Griggio”). Regarding Claim 6, Liff in view of Lin teaches the apparatus of claim 3. Liff in view of Lin is silent to a system wherein at least some of the through hole vias have an aspect ratio of at least 20 to 1. Griggio teaches a system wherein at least some of the through hole vias have an aspect ratio of at least 20 to 1 ([0039], “a via of a metallization stack may have a length L in the range of a 1/100 of a micron to 5000 microns, including all values and ranges therein, a width W in the range of 1/100 micron to 5000 microns including all values and ranges therein, and a height H in a range that provides aspect ratios (H/W) of 0.25 to 100.0 including all values and ranges therein.”). It would have been obvious to a person of ordinary skill in the art before the date of effective filing, absent unexpected results, to apply the aspect ratio of Griggio to the apparatus of Liff in view of Lin in order to achieve the expected result of improving the performance and usability of the semiconductor apparatus. Claim(s) 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liff in view of Liff in further view of Lin as applied to claim 16 above, and further in view of Griggio. Regarding Claim 19, Liff in view of Liff and Lin teaches the apparatus of claim 16. Liff in view of Liff is silent with regards to a system wherein at least some of the through hole vias have an aspect ratio of at least 50 to 1 ([0039], “a via of a metallization stack may have a length L in the range of a 1/100 of a micron to 5000 microns, including all values and ranges therein, a width W in the range of 1/100 micron to 5000 microns including all values and ranges therein, and a height H in a range that provides aspect ratios (H/W) of 0.25 to 100.0 including all values and ranges therein.”). It would have been obvious to a person of ordinary skill in the art before the date of effective filing, absent unexpected results, to apply the aspect ratio of Griggio to the apparatus of Liff in view of Liff and Lin in order to achieve the expected result of improving the performance and usability of the semiconductor apparatus. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to VICTOR J LASASSO whose telephone number is (703)756-5668. The examiner can normally be reached M-F 8-5 EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Manno can be reached on (571) 272-2339. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /V.J.L./ Examiner, Art Unit 2898 /JESSE Y MIYOSHI/ Primary Examiner, Art Unit 2898
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Prosecution Timeline

May 28, 2021
Application Filed
Nov 02, 2021
Response after Non-Final Action
Sep 23, 2024
Non-Final Rejection — §103
Dec 27, 2024
Response Filed
Jan 10, 2025
Final Rejection — §103
Mar 14, 2025
Response after Non-Final Action
Apr 17, 2025
Request for Continued Examination
Apr 21, 2025
Response after Non-Final Action
Apr 22, 2025
Non-Final Rejection — §103
Aug 05, 2025
Response Filed
Sep 25, 2025
Final Rejection — §103
Apr 03, 2026
Response after Non-Final Action

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Prosecution Projections

5-6
Expected OA Rounds
81%
Grant Probability
72%
With Interview (-8.3%)
3y 5m
Median Time to Grant
High
PTA Risk
Based on 26 resolved cases by this examiner