Prosecution Insights
Last updated: April 19, 2026
Application No. 17/340,128

Semiconductor deposition method

Non-Final OA §103
Filed
Jun 07, 2021
Examiner
TRAN, DZUNG
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
United Semiconductor (Xiamen) Co., Ltd.
OA Round
5 (Non-Final)
83%
Grant Probability
Favorable
5-6
OA Rounds
2y 4m
To Grant
88%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allow Rate
846 granted / 1018 resolved
+15.1% vs TC avg
Moderate +5% lift
Without
With
+5.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
87 currently pending
Career history
1105
Total Applications
across all art units

Statute-Specific Performance

§101
4.2%
-35.8% vs TC avg
§103
65.0%
+25.0% vs TC avg
§102
16.0%
-24.0% vs TC avg
§112
10.8%
-29.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1018 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Request for Continued Examination A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 08/27/2025 has been entered. DETAILED ACTION Status of the Claims Applicant’s remarks/amendments of claims 1-17 in the reply filed on August 27th, 2025, are acknowledged. Claim 1 has been amended. Claims 1-17 are pending. Action on merits of claims 1-17 as follows. Claim Objections Claim 1 is objected to because of the following informalities: The limitation as recited in amended claim 1: “without interruption” is not disclosed in specification. Appropriate correction is required. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claims 1-17 are rejected under 35 U.S.C. 103 as being unpatentable over Qin (CN109423621, hereinafter as Qin ‘621) in view of Liu (CN 102747338, hereinafter as Liu ‘338) and further in view of Matsuse (US 5647945, hereinafter as Mats ‘945). Regarding Claim 1, Qin ‘621 teaches an improved semiconductor deposition method, comprising: providing a deposition machine, wherein the deposition machine comprises a chamber (Fig. 1, (1); pp. 2) connected with a pipeline; placing a first wafer into the chamber, and a pipeline cleaning step (S01; pp. 5) is performed, wherein the pipeline cleaning step comprises: closing a plurality of valve switches to cut off the path between the pipeline and the chamber; and introducing a carrier gas (nitrogen gas) from the pipeline to make the carrier gas move along a first path of the pipeline (15); and performing a deposition step (S02; pp. 5) on the first wafer to deposit a first material layer (Al) on the surface of the first wafer, Thus, Qin ‘621 is shown to teach all the features of the claim with the exception of explicitly the limitations: “the deposition step comprises: communicating the path between the pipeline and the chamber by opening the plurality of valve switches; and introducing a deposition gas into the chamber along a second path of the pipeline”. Liu ‘338 teaches the deposition step comprises: communicating the path between the pipeline and the chamber by opening the plurality of valve switches (valve V1 and V4; pp. 2); and introducing a deposition gas (ethyl orthosilicate) into the chamber along a second path of the pipeline (see Figs. 1 and 2). Thus, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify Qin ‘621 by having opening the plurality of valve switches; and introducing a deposition gas into the chamber along a second path of the pipeline for the purpose of reducing the utilization rate of the machine (see pp. 2) as suggested by Liu ‘338. Thus, Qin ‘621 and Liu ‘338 are shown to teach all the features of the claim with the exception of explicitly the limitations: “the carrier gas or deposition gas is continuously introduced into the pipeline without interruption from the pipeline cleaning step to the deposition step”. Mats ‘945 teaches the carrier gas or deposition gas is continuously introduced into the pipeline (see col. 6, lines 50-60) without interruption from the pipeline cleaning step to the deposition step (a cleaning gas is supplied during processing a semiconductor wafer without interrupting the process; see Fig. 4; col. 14, lines 43-58). Thus, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify Qin ‘621 and Liu ‘338 by having the carrier gas or deposition gas is continuously introduced into the pipeline without interruption from the pipeline cleaning step to the deposition step in order to improve the production efficiency of deposition system (see para. [0039]) as suggested by Mats ‘945. Regarding Claim 2, Qin ‘621 teaches the gas moves along the first path, the gas (inert gas; pp.3) does not contain the same composition as the first material layer (Al). Regarding Claim 3, Qin ‘621 teaches the gas moves along the second path (when valve V1 and V4 open), the gas contains the same composition as the first material layer (see Fig. 1; pp. 2). Regarding Claim 4, Qin ‘621 teaches placing a second wafer (3) into the chamber and performing the deposition step to deposit the first material layer on the surface of the second wafer (see Fig. 1). Regarding Claim 5, Liu ‘338 teaches the pipeline cleaning step is performed (after deposition is completed; see pp. 2) in the step between depositing the first material layer on the first wafer surface and depositing the first material layer on the second wafer surface (see pp. 2). Regarding Claim 6, Qin ‘621 teaches after the first wafer is placed into the chamber and before the first material layer is deposited on the surface of the first wafer, a pre-deposition step is performed and the pipeline cleaning step is performed at the same time (Step 01; pp. 11). Regarding Claim 7, Liu ‘338 teaches the pre-deposition step comprises a vacuum step (see pp. 12) and a heating step (low pressure furnace tube; see pp. 2 and 6). Regarding Claim 8, Qin ‘621 teaches the gas contains inert gas (see pp. 11). Regarding Claim 9, Qin ‘621, Liu ‘338 and Mats ‘945 are shown to teach all the features of the claim with the exception of explicitly the limitations: “the flow rate of the gas is greater than 500 sccm”. However, it has been held to be within the general skill of a worker in the art to select the flow rate of the gas is greater than 500 sccm on the basis of it suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. A person of ordinary skills in the art is motivated to select the flow rate of the gas is greater than 500 sccm when this allows a good flow with the other steps in the fabrication process. Regarding Claim 10, Qin ‘621, Liu ‘338 and Mats ‘945 are shown to teach all the features of the claim with the exception of explicitly the limitations: “the first material layer comprises pentakis (dimethyl amine) tantalum (PDMAT)”. However, it has been held to be within the general skill of a worker in the art to select the first material layer comprises pentakis (dimethyl amine) tantalum (PDMAT) on the basis of it suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. A person of ordinary skills in the art is motivated to select the first material layer comprises pentakis (dimethyl amine) tantalum (PDMAT) when this improves the deposition step. Regarding Claim 11, Qin ‘621, Liu ‘338 and Mats ‘945 are shown to teach all the features of the claim with the exception of explicitly the limitations: “a material tank containing the PDMAT gas, and the second path passes through the material tank”. However, it has been held to be within the general skill of a worker in the art to select a material tank containing the PDMAT gas, and the second path passes through the material tank on the basis of it suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. A person of ordinary skills in the art is motivated to select a material tank containing the PDMAT gas, and the second path passes through the material tank when this improves the deposition step. Regarding Claim 12, Liu ‘338 teaches the first path does not pass through the material tank (see Fig. 1). Regarding Claim 13, Liu ‘338 teaches the first path and the second path share a part of the pipeline (see Fig. 1). Regarding Claim 14, Qin ‘621 teaches after depositing the first material layer (aluminum; pp. 12) on the first wafer, a second material layer (oxidant; pp. 13) is deposited on the first wafer. Regarding Claim 15, Qin ‘621 teaches after the first material layer is deposited and before the second material layer is deposited, the pipeline cleaning step (step 04 and step 05) is further performed (see pp. 12). Regarding Claim 16, Qin ‘621 teaches depositing the first material layer on the first wafer (step 02). Qin ‘621, Liu ‘338 and Mats ‘945 are shown to teach all the features of the claim with the exception of explicitly the limitations: “after depositing a part of the first material layer on the first wafer, the deposition step is paused, the parameters of the deposition step are adjusted, and then continue the deposition step to deposit the first material layer on the first wafer”. However, it has been held to be within the general skill of a worker in the art to have after depositing a part of the first material layer on the first wafer, the deposition step is paused, the parameters of the deposition step are adjusted, and then continue the deposition step to deposit the first material layer on the first wafer on the basis of it suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. A person of ordinary skills in the art is motivated to pause the deposition step, the parameters of the deposition step are adjusted, and then continue the deposition step to deposit the first material layer on the first wafer when this improves the deposition step (see para. [0027] of Suzu ‘895). Regarding Claim 17, Qin ‘621 teaches depositing the first material layer on the first wafer (step 02). Mats ‘945 teaches the pipeline cleaning step is performed simultaneously during the deposition step is paused (see col. 9; lines 30-45). Further, it has been held to be within the general skill of a worker in the art to have the pipeline cleaning step is performed simultaneously during the deposition step is paused on the basis of it suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. A person of ordinary skills in the art is motivated to have the pipeline cleaning step is performed simultaneously during the deposition step is paused when this improves the deposition step. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The following patents are cited to further show the state of the art with respect to semiconductor devices: Chang et al. (US 2008/0023084 A1) Wodjenski et al. (US 2005/0109399 A1) Takeshima (US 2003/01111012 A1) For applicant’s benefit portions of the cited reference(s) have been cited to aid in the review of the rejection(s). While every attempt has been made to be thorough and consistent within the rejection it is noted that the PRIOR ART MUST BE CONSIDERED IN ITS ENTIRETY, INCLUDING DISCLOSURES THAT TEACH AWAY FROM THE CLAIMS. See MPEP 2141.02 VI. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DZUNG T TRAN whose telephone number is (571) 270-3911. The examiner can normally be reached on M-F 8 AM-5PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached on (571) 272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DZUNG TRAN/ Primary Examiner, Art Unit 2893
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Prosecution Timeline

Jun 07, 2021
Application Filed
Mar 15, 2024
Non-Final Rejection — §103
Jun 18, 2024
Response Filed
Jul 30, 2024
Final Rejection — §103
Oct 16, 2024
Request for Continued Examination
Oct 22, 2024
Response after Non-Final Action
Feb 10, 2025
Non-Final Rejection — §103
May 11, 2025
Response Filed
Jun 09, 2025
Final Rejection — §103
Aug 27, 2025
Request for Continued Examination
Aug 29, 2025
Response after Non-Final Action
Mar 09, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
83%
Grant Probability
88%
With Interview (+5.4%)
2y 4m
Median Time to Grant
High
PTA Risk
Based on 1018 resolved cases by this examiner. Grant probability derived from career allow rate.

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