DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114 was filed in this application after a decision by the Patent Trial and Appeal Board, but before the filing of a Notice of Appeal to the Court of Appeals for the Federal Circuit or the commencement of a civil action. Since this application is eligible for continued examination under 37 CFR 1.114 and the fee set forth in 37 CFR 1.17(e) has been timely paid, the appeal has been withdrawn pursuant to 37 CFR 1.114 and prosecution in this application has been reopened pursuant to 37 CFR 1.114. Applicant’s submission filed on April 15, 2026 has been entered.
Status of the Claims
Species 2, as shown in FIG. 3, was elected.
Amendment filed on April 15, 2026 is acknowledged. Claims 1 and 10 have been amended. Non-elected Species, claims 8-9 and 17-18 have been withdrawn from consideration. Claims 1, 3, 7-10, 12 and 16-18 are pending.
Action on merits of claims 1, 3, 7, 10, 12 and 16 follows.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
Claims 1, 3, 7, 10, 12 and 16 are rejected under 35 U.S.C. 112(a) as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
There does not appear to be a written description of the claim limitation “wherein a PN junction is formed between the N well and the P-type substrate across the isolation well and the intrinsic substrate” (amended claims 1 and 10 ) (emphasis added) in the application as filed.
Applicant must cancel the un-support new matters in response to the Office Action.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 1, 3, 7, 10, 12 and 16 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Amended independent claims 1 and 10 recite: “wherein a PN junction is formed between the N well and the P-type substrate across the isolation well and the intrinsic substrate”.
How can a PN junction being formed between the N well and the P-type substrate across the isolation well and the intrinsic substrate ?
Note that, the intrinsic substrate is a “P-type” and the P-type substrate is, obviously, P-type, thus, no PN junction therebetween.
Therefore, claims 1, 10 and all dependent claims are indefinite.
The following is a quotation of 35 U.S.C. 112(d):
(d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
Claims 3 and 12 are rejected under 35 U.S.C. 112(d) as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends.
Claims 3 and 12 recites: “the signal isolation apparatus according to claim 1 (10), wherein a P-N junction is formed between the N well and the P-type substrate, wherein the P-N junction is reverse biased”.
However, the independent claim 1 (10) has already claimed “a P-N junction is formed between the N well and the P-type substrate”. Further, since supply voltage is applied to N-type substrate contact formed in the N well and P-type substrate is grounded (claims 1 and 10), thus, “wherein the P-N junction is reverse biased”.
Therefore, claims 3 and 12 fail to further limit the independent claims 1 and 10, respectively.
Applicant may cancel the claim(s), amend the claim(s) to place the claim(s) in proper dependent form, rewrite the claim(s) in independent form, or present a sufficient showing that the dependent claim(s) complies with the statutory requirements.
Claim Rejections - 35 USC § 102/103
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3, 7, 10, 12 and 16 are rejected under 35 U.S.C. 102(a)(1) as anticipated by HUANG et al. (US. Pub. No. 2019/0096886) of record, or, in the alternative, under 35 U.S.C. 103 as obvious over HUANG ‘886, in view of KANNO et al. (US. Pub. No. 2016/0056148).
With respect to claim 1, Insofar as an apparatus is concerned, and as best understood by Examiner, HUANG teaches a signal isolation apparatus substantially as claimed including:
a metal oxide semiconductor (MOS) device (111’), wherein the MOS device is formed on a P-type substrate (102’) and has an N well (105’);
an N-type substrate contact (109’), wherein the N-type substrate contact (109’) is formed in the N well (105’) and connected to supply voltage;
a P-type substrate contact (3072’), wherein the P-type substrate contact is formed on the P-type substrate (102’) and connected to grounding voltage; and
an isolation well (104’) at least partially surrounding the N well (105’), wherein a doping density of an N-type ion in the isolation well (104’) is lower than a doping density of an N type ion in the N well (105’);
an intrinsic substrate (304’) at least partially surrounding the isolation well (104’), wherein a doping density of a P-type ion in the intrinsic substrate (304’) is lower than a doping density of a P-type ion in the P-type substrate (102’), and wherein a PN junction is formed between the N well (105’) and the P-type substrate (102’) across the isolation well (104’) and the intrinsic substrate (305’); and
an electrostatic discharge (ESD) implantation layer (3032’) extending into the P-type substrate (102’) along the P-type substrate contact (3072’), wherein the ESD implantation layer (3032’) is a P-type implantation layer, and wherein a P-type implantation depth of the ESD implantation layer (3032’) is greater than a P-type implantation depth of the P-type substrate contact (3072’). (See FIG. 10A).
For anticipation, since the ESRO’ (104’) is an N-type, thus, PN junction exists between N-type (104’) and P-type substrate (102’).
Therefore, the limitation: “a PN junction is formed between the N well and the P-type substrate across the isolation well and the intrinsic substrate across the isolation well and the intrinsic substrate” is met.
Therefore, claim 1 is being anticipated by HUANG.
For obviousness, HUANG is shown to teach all the features of the claim, as described in claim 1 above, with the exception of explicitly disclosing the PN junction is formed between the N well and the P-type substrate across the isolation well and the intrinsic substrate.
However, KANNO teaches a signal isolation apparatus including:
a metal oxide semiconductor (MOS) device, wherein the MOS device is formed on a P-type substrate (1) and has an N well (2),
an isolation well (4) at least partially surrounding the N well (2),
an intrinsic substrate (5) at least partially surrounding the isolation well (4), wherein a PN junction is formed between the N well (2) and the P-type substrate (1) across the isolation well (4) and the intrinsic substrate (5). (See FIG. 3).
Therefore, it would have been obvious to one having ordinary skill in the art at the time of invention was made to form the PN junction of HUANG between the N well and the P-type substrate across the isolation well and the intrinsic substrate as taught by KANNO for the same intended purpose of inhibit the operation of a parasitic bipolar transistor.
Product by process limitation:
The expression “implantation” is taken to be a product by process limitation and is given no patentable weight. A product by process claim directed to the product per se, no matter how actually made, In re Hirao, 190 USPQ 15 at 17 (footnote 3). See In re Fessman, 180 USPQ 324, 326 (CCPA 1974); In re Marosi et al., 218 USPQ 289, 292 (Fed. Cir. 1983); In re Brown, 459 F.2d 531, 535, 173 USPQ 685, 688 (CCPA 1972); In re Pilkington, 411 F.2d 1345, 1348, 162 USPQ 145, 147 (CCPA 1969); Buono v. Yankee Maid Dress Corp., 77 F.2d 274, 279, 26 USPQ 57, 61 (2d. Cir. 1935); and particularly In re Thorpe, 227 USPQ 964, 966 (Fed. Cir. 1985), all of which make it clear that it is the patentability of the final structure of the product “gleaned” from the process steps, which must be determined in a “product by process” claim, and not the patentability of the process. See also MPEP 2113. Moreover, an old and obvious product produced by a new method is not a patentable product, whether claimed in “product by process” claims or not.
Note that Applicant has burden of proof in such cases as the above case law makes clear.
Since the isolation well 104’, ESD 3032’, substrate contact 3072’, etc., of HUANG being formed with doping type(s), the limitation (product) is met.
With respect to claim 10, As best understood by the Examiner, HUANG teaches a signal isolation method as claimed, including:
forming a metal oxide semiconductor (MOS) device (111’) on a P-type substrate (102’), wherein the MOS device has an N well (105’);
forming an N-type substrate contact (109’) in the N well, wherein the N-type substrate contact is connected to supply voltage;
forming a P-type substrate contact (3072’) on the P-type substrate, wherein the P-type substrate contact is connected to grounding voltage;
adding at least a part of an isolation well (104’) around the N well (105’), wherein a doping density of an N type ion in the isolation well (104’) is lower than a doping density of an N type ion in the N well (105’);
adding at least a part of an intrinsic substrate (304’) around the isolation well (104’), wherein a doping density of a P-type ion in the intrinsic substrate (304’) is lower than a doping density of a P-type ion in the P-type substrate (102’), wherein a PN junction is formed between the N well (105’) and the P-type substrate (102’) across the isolation well (104’) and the intrinsic substrate (305’); and
adding an electrostatic discharge (ESD) implantation layer (3032’) into the P-type substrate (102’) along the P-type substrate contact (3072’), wherein the ESD implantation layer (3032’) is a P-type implantation layer, and wherein a P-type implantation depth of the ESD implantation layer (3032’) is greater than a P-type implantation depth of the P-type substrate contact (3072’). (See FIG. 10A).
For anticipation, since the ESRO’ (104’) is an N-type, thus, PN junction is formed between N-type (104’) and P-type substrate (102’).
Therefore, the limitation: “a PN junction is formed between the N well and the P-type substrate across the isolation well and the intrinsic substrate across the isolation well and the intrinsic substrate” is met.
Therefore, claim 1 is being anticipated by HUANG.
For obviousness, HUANG is shown to teach all the features of the claim, as described in claim 1 above, with the exception of explicitly disclosing the PN junction is formed between the N well and the P-type substrate across the isolation well and the intrinsic substrate.
However, KANNO teaches a signal isolation apparatus including:
a metal oxide semiconductor (MOS) device, wherein the MOS device is formed on a P-type substrate (1) and has an N well (2),
an isolation well (4) at least partially surrounding the N well (2),
an intrinsic substrate (5) at least partially surrounding the isolation well (4), wherein a PN junction is formed between the N well (2) and the P-type substrate (1) across the isolation well (4) and the intrinsic substrate (5). (See FIG. 3).
Therefore, it would have been obvious to one having ordinary skill in the art at the time of invention was made to form the PN junction of HUANG between the N well and the P-type substrate across the isolation well and the intrinsic substrate as taught by KANNO for the same intended purpose of inhibit the operation of a parasitic bipolar transistor.
With respect to claims 3 and 12, As best understood by the Examiner, the P-N junction of HUANG is formed between the N well (105’) and the P-type substrate (102’), wherein the P-N junction is reverse biased.
With respect to claims 7 and 16, the MOS device (111’) of HUANG is a PMOS device.
Response to Arguments
Applicant's arguments filed April 15, 2026 have been fully considered but they are not persuasive.
Applicant argues:
In Huang's configuration, NW 105' (the alleged N-well) and DPW 102' (the alleged P-type substrate) are separated in the vertical direction by ESRO' 104' (the alleged isolation well), while ESR2' 304' (the alleged intrinsic substrate) and ESRO' 104' are arranged along a direction perpendicular to the aforementioned vertical stack of layers. As such, Huang's device structure cannot form a PN junction between the N well and the P-type substrate across the isolation well and the intrinsic substrate, as specificied (sic) by amended claim 1. (Emphasis added).
However, as indicated in the rejection, the N well 105’ with the ESR0’ 104’ of HUANG is N-type and the DPW 102’ is P-type substrate, thus, PN junction is formed between the N well (104’) and P-type substrate (102’) across the isolation well (104’).
Regarding “intrinsic substrate”, the claimed “intrinsic substrate” is P-type (claim 1, lines 11-12), thus cannot form PN junction with the P-type substrate.
Thus, the limitation: a PN junction between the N well and the P-type substrate across the isolation well and the intrinsic substrate is un-supported new matter, indefinite and counterintuitive.
The limitation of claims 1 and 10 are met.
Conclusion
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/ANH D MAI/ Primary Examiner, Art Unit 2893
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