Prosecution Insights
Last updated: October 26, 2026
Application No. 17/353,275

INTEGRATED CIRCUIT STRUCTURES WITH BACKSIDE SELF-ALIGNED CONDUCTIVE PASS-THROUGH CONTACT

Final Rejection §102§103
Filed
Jun 21, 2021
Examiner
HANUMASAGAR, SHAMITA S
Art Unit
2814
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Intel Corporation
OA Round
4 (Final)
77%
Grant Probability
Favorable
5-6
OA Rounds
0m
Est. Remaining
70%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allowance Rate
23 granted / 30 resolved
+8.7% vs TC avg
Minimal -7% lift
Without
With
+-6.8%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
16 currently pending
Career history
72
Total Applications
across all art units

Statute-Specific Performance

§103
50.6%
+10.6% vs TC avg
§102
27.9%
-12.1% vs TC avg
§112
21.5%
-18.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 30 resolved cases

Office Action

§102 §103
Attorney Docket Number: AD3370-US 111548-262278 Filing Date: 06/21/2021 Claimed Priority Date: none Inventors: Guler et al. Examiner: Shamita S. Hanumasagar DETAILED ACTION This Office action responds to the amendment filed on 07/21/2026. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for a rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Amendment Status The amendment filed on 07/21/2026 in reply to the previous Office action mailed on 04/21/2026 has been entered. The present Office action is made with all the suggested amendments being fully considered. Accordingly, pending in this Office action are claims 1-20, with claims 2, 4, and 11-20 remaining withdrawn from consideration. Drawings Applicant has provided no arguments or amendments regarding the objections to the drawings made in the previous Office action mailed on 05/06/2025. Accordingly, the objections to the drawings noted in the previous Office action are maintained. The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the following features must be shown or the features canceled from the claims. No new matter should be entered. A dummy gate electrode laterally between a first stack of nanowires and a second stack of nanowires, as recited in claim 1 A conductive pass-through contact laterally between a first stack of nanowires and a second stack of nanowires, as recited in claim 1 The conductive pass-through contact on and along outermost sidewalls of the dummy gate electrode, as recited in claim 1 The conductive pass-through contact in direct physical contact with the dummy gate electrode, as recited in claim 1 Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 3, and 5-10 are rejected under 35 U.S.C. 103 as being unpatentable over Mannebach (US 2020/0219970) in view of Ganguly (US 2021/0408246), Bomberger (US 2020/0303502), Dewey (US 2022/0102522), and Chang (US 2022/0052157). Regarding claims 6 and 1, Mannebach (see, e.g., figs. 3D and 10 and par.0165/ll.3-7) shows most aspects of the instant invention, including a computing device 1000 comprising: a board 1002; and a component 1004 coupled to the board wherein the component includes an integrated circuit structure comprising: a first sub-fin structure 392 over a first stack of nanowires 350A, 350B, 350C; a second sub-fin structure 392 over a second stack of nanowires 304A, 304B, 304C; a dummy gate electrode 372, 374 laterally between the first and second stack of nanowires; and a conductive pass-through contact 394, the conductive pass-through contact on the dummy gate electrode and in direct physical contact with the dummy gate electrode (see, e.g., pars.0069/ll.6-9 and 0072/ll.6-12) Although Mannebach shows most aspects of the instant invention, Mannebach fails to show that the conductive pass-through contact may be laterally between the first and second stacks of nanowires. Ganguly, in the same field of endeavor and in a similar device to Mannebach, shows a conductive pass-through contact 184 laterally between a first stack of nanowires 109 and a second stack of nanowires 109 (see, e.g., Ganguly: fig. 1H). Similarly, Bomberger, in the same field of endeavor, also shows a conductive pass-through contact 344 laterally between a first stack of nanowires 326 and a second stack of nanowires 326 (see, e.g., Bomberger: fig. 3H). Ganguly and Bomberger are evidence showing that one of ordinary skill in the art would appreciate that a conductive pass-through contact laterally between first and second stacks of nanowires would be equivalent to a conductive pass-through contact not laterally between first and second stacks of nanowires, and that such differences would result in no unexpected changes in the performance of the integrated circuit structure of Mannebach. That is, the conductive pass-through contacts of both Mannebach and Ganguly or Bomberger would yield the predictable result of providing a suitable conductive contact pathway between layers of an integrated circuit structure. Therefore, it would have been obvious at the time of filing the invention to one of ordinary skill in the art to have either a conductive pass-through contact laterally between first and second stacks of nanowires, as taught by Ganguly and Bomberger, or a conductive pass-through contact not laterally between first and seconds stacks of nanowires, as taught by Mannebach, because these were recognized as equivalents in the semiconductor art and would yield the predictable result of providing a suitable conductive contact pathway between layers of an integrated circuit structure. KSR International Co. v. Teleflex Inc., 550 U.S.-- ,82 USPQ2d 1385 (2007). Furthermore, although Mannebach shows most aspects of the instant invention, Mannebach fails to show that the conductive pass-through contact is along outermost sidewalls of the dummy gate electrode. Dewey, in a similar device to Mannebach and in the same field of endeavor, shows a conductive pass-through contact 138B/C both on and along outermost sidewalls of a dummy gate electrode 128 (see, e.g., Dewey: fig. 1B, abs./ll.5-7, and par.0034/ll.9-11). Similarly, Chang, in a similar device to Mannebach and in the same field of endeavor, shows a conductive pass-through contact 130 or 132 both on and along outermost sidewalls of a dummy gate electrode 126. Dewey and Chang are evidence showing that one of ordinary skill in the art would appreciate that a conductive pass-through contact on and along outermost sidewalls of a dummy gate electrode would be equivalent to a conductive pass-through contact on a dummy gate electrode, and that such differences would result in no unexpected changes in the performance of the integrated circuit structure of Mannebach. That is, the conductive pass-through contacts of both Mannebach and Dewey or Chang would yield the predictable result of establishing a conductive pass-through pathway between layers of an integrated circuit structure while connected and adjacent to a dummy gate electrode. Therefore, it would have been obvious at the time of filing the invention to one of ordinary skill in the art to have either a conductive pass-through contact along outermost sidewalls of a dummy gate electrode, as taught by Dewey and Chang, or a conductive pass-through contact only on a dummy gate electrode, as taught by Mannebach, because these were recognized as equivalents in the semiconductor art and would yield the predictable result of establishing a conductive pass-through pathway between layers of an integrated circuit structure while connected and adjacent to a dummy gate electrode. KSR International Co. v. Teleflex Inc., 550 U.S.-- ,82 USPQ2d 1385 (2007). Regarding claim 3, Mannebach (see, e.g., fig. 3D) shows that the conductive pass-through contact 394 has a backside surface co-planar with a backside surface of the first and second sub-fin structures 392. Regarding claim 5, Mannebach (see, e.g., par.0070/ll.4-5) shows that the first and second sub-fin structures 392 are insulator sub-fin structures. Regarding claim 7, Mannebach (see, e.g., fig. 10) shows a memory ROM coupled to the board. Regarding claim 8, Mannebach (see, e.g., fig. 10) shows a communication chip 1006 coupled to the board. Regarding claim 9, Mannebach (see, e.g., par.0165/ll.1-2) shows that the component is a packaged integrated circuit die. Regarding claim 10, Mannebach (see, e.g., pars.0163/ll.1-7, 0165/ll.1-2, 0166/ll.1-2, 0167) shows that the component is selected from the group consisting of a processor, a communications chip, and a digital signal processor. Claims 1 and 5-10 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Wu (US 2022/0310785) in view of Ganguly and Bomberger. Regarding claim 1, Wu (see, e.g., fig. 28A) shows most aspects of the instant invention, including an integrated circuit structure comprising: a first sub-fin structure 132 over a first stack of nanowires 52A/52B/52C/52D; a second sub-fin structure 132 over a second stack of nanowires 52A/52B/52C/52D; a dummy gate electrode 106 laterally between the first and second stack of nanowires; and a conductive pass-through contact 118, the conductive pass-through contact on and along outermost sidewalls of the dummy gate electrode, and the conductive pass-through contact in direct physical contact with the dummy gate electrode Wu shows most aspects of the instant invention (see paragraph 23 above). Wu (see, e.g., par.0105/ll.4-13) further discloses that the device of Wu can include further modifications within the scope of the device, but fails to specify that these modifications may include the conductive pass-through contact being laterally between the first stack of nanowires and the second stack of nanowires. Ganguly, in the same field of endeavor and in a similar device to Wu, shows a conductive pass-through contact 184 laterally between a first stack of nanowires 109 and a second stack of nanowires 109 (see, e.g., Ganguly: fig. 1H). Similarly, Bomberger, in the same field of endeavor and in a similar device to Wu, also shows a conductive pass-through contact 344 laterally between a first stack of nanowires 326 and a second stack of nanowires 326 (see, e.g., Bomberger: fig. 3H). Ganguly and Bomberger are evidence showing that one of ordinary skill in the art would appreciate that a conductive pass-through contact laterally between first and second stacks of nanowires would be equivalent to a conductive pass-through contact not laterally between first and second stacks of nanowires, and that such differences would result in no unexpected changes in the performance of the integrated circuit structure of Wu. That is, the conductive pass-through contacts of both Wu and Ganguly or Bomberger would yield the predictable result of providing a suitable conductive contact pathway between layers of an integrated circuit structure. Therefore, it would have been obvious at the time of filing the invention to one of ordinary skill in the art to have either a conductive pass-through contact laterally between first and second stacks of nanowires, as taught by Ganguly and Bomberger, or a conductive pass-through contact not laterally between first and seconds stacks of nanowires, as taught by Wu, because these were recognized as equivalents in the semiconductor art and would yield the predictable result of providing a suitable conductive contact pathway between layers of an integrated circuit structure. KSR International Co. v. Teleflex Inc., 550 U.S.-- ,82 USPQ2d 1385 (2007). Regarding claim 5, Wu (see, e.g., par.0090/ll.1-2) shows that the first 132 and second 132 sub-fin structures are insulator sub-fin structures. Regarding claim 6, Wu shows most aspects of the instant invention (see paragraph 23 above). Wu (see, e.g., par.0105/ll.4-13) further discloses that the device of Wu can include further modifications within the scope of the device, but fails to specify that these modifications may include a computing device comprising a board and a component coupled to the board. Bomberger, possessing a similar integrated circuit structure to Wu and in the same field of endeavor, teaches that having a computing device, shown to house a board, and having a component (such as a processor) containing an integrated circuit structure may facilitate the processing of electronic data from registers and/or memory and the transformation of said electronic data into other electronic data that may also be stored in registers and/or memory (see, e.g., Bomberger: fig. 10 and pars.0138 and 0141/ll.8-9). Therefore, it would have been obvious at the time of filing the invention to one of ordinary skill in the art to modify the structure of Wu to include the computing device and included component of Bomberger, so as to facilitate the processing, storing, and transformation of data from the device of Wu. Regarding claim 7, Bomberger (see, e.g., Bomberger: fig. 10) shows a memory ROM coupled to the board. Regarding claim 8, Bomberger (see, e.g., Bomberger: fig. 10) shows a communication chip 1006 coupled to the board. Regarding claim 9, Bomberger (see, e.g., Bomberger: par.0138/ll.1-2) shows that the component is a packaged integrated circuit die. Regarding claim 10, Bomberger (see, e.g., Bomberger: pars.0136/ll.1-7, 0138/ll.1-2, 0139/ll.1-2, 0140) shows that the component is selected from the group consisting of a processor, a communications chip, and a digital signal processor. Response to Arguments Applicant has not appeared to have made any amendments or arguments regarding the objections to the drawing put forth in the previous Office action mailed on 04/21/2026 in Applicant’s on-file response on 07/21/2026. Accordingly, the objections to the drawings put forth in the previous Office action are maintained. Applicant’s arguments with respect to the claims have been considered but are moot in view of the new grounds of rejection. Response to Arguments Applicant’s arguments with respect to the claims have been considered but are moot in view of the new grounds of rejection. Conclusion Applicant’s amendment necessitated the new grounds of rejection presented in this Office action. Accordingly, this action is made final. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire three months from the mailing date of this action. In the event a first reply is filed within two months of the mailing date of this final action and the advisory action is not mailed until after the end of the three-month shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than six months from the mailing date of this final action. Papers related to this application may be submitted directly to Art Unit 2814 by facsimile transmission. Papers should be faxed to Art Unit 2814 via the Art Unit 2814 Fax Center. The faxing of such papers must conform to the notice published in the Official Gazette, 1096 OG 30 (15 November 1989). The Art Unit 2814 Fax Center number is (571) 273-8300. The Art Unit 2814 Fax Center is to be used only for papers related to Art Unit 2814 applications. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Shamita Hanumasagar at (703) 756-1521 and between the hours of 7:00 AM to 5:00 PM (Eastern Standard Time) Monday through Thursday or by e-mail via Shamita.Hanumasagar@uspto.gov. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Wael Fahmy, can be reached on (571) 272-1705. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (in USA or Canada) or 571-272-1000. /Shamita S. Hanumasagar/Examiner, Art Unit 2814 /WAEL M FAHMY/Supervisory Patent Examiner, Art Unit 2814
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Prosecution Timeline

Show 3 earlier events
Aug 06, 2025
Response Filed
Nov 06, 2025
Final Rejection mailed — §102, §103
Jan 12, 2026
Response after Non-Final Action
Feb 06, 2026
Request for Continued Examination
Feb 16, 2026
Response after Non-Final Action
Apr 21, 2026
Non-Final Rejection mailed — §102, §103
Jul 21, 2026
Response Filed
Sep 30, 2026
Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
77%
Grant Probability
70%
With Interview (-6.8%)
3y 4m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 30 resolved cases by this examiner. Grant probability derived from career allowance rate.

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