CTFR 17/373,708 CTFR 90697 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Response to Arguments 07-37 AIA Applicant's arguments filed November 30, 2025 have been fully considered but they are not persuasive. As an initial point Applicant ton page 27 of the Remarks states that the “Koyama cannot efficiently recombine and annihilate the electron-hole pairs.” This statement is not the same as saying Koyama cannot recombine and annihilate the electron-hole pairs; rather, this statement means that Koyama does in fact recombine and annihilate the electron-hole pairs just not efficiently. Therefore, according to Applicant Koyama is functionally able to perform the above function . Regarding claims 1 and 10, Applicant’s argument is the prior art cannot perform the claimed function of “when the diode is off and a breakdown voltage is maintained, the first recombination region is provided in a region that no depletion layer reaches.” Examiner retorts that the prior art has the same claimed structure as the claim. Further, as asserted by Applicant Koyama can recombine and annihilate the electron-hole pairs. Therefore, the device of Koyama performs the same functions as claimed. Further, to support their position Applicant list a plurality of elements which affect the above limitation. However, these limitations: doping profile, layer thickness, position of layers, etc., is either not claimed or is claimed and taught by the prior art. Further, Applicant’s argument appears to also rely on the fact that it would be obvious to one of ordinary skill in the art would understand these characteristics would affect the claim limitation. Therefore, it would equally apply that one of ordinary skill in the art would understand that Koyama would be have the claimed characteristics. In the response to this argument Applicant should clearly state whether (A) the above limitation should be treated under 35 USC § 112(f) as means for function such that Examiner should find the structure capable of performing the above limitation in the specification, or whether (B) the above is characteristic of the already claimed structure. Regarding claims 31, As stated, Applicant admits that Koyama can perform the asserted function. However, as stated Applicant admits that it performs the same function just not as efficiently. Regarding claim 37, Applicant asserts that Examiner failed to provide any evidence for the rejection of claim 37. Examiner stated that Applicant’s second crystal defect region is caused by ion implantation. Examiner stated Koyama does not teach how Koyama 39 is formed. Examiner then stated that one of ordinary skill in the art would search for a reference how to form Koyama 39. Examiner now clarifies that ion implantation is well-known, routinely used, and common place in the art in forming doped regions as stated in claim 10. Regarding claim 43, Applicant states the prior art does not teach the 11 th semiconductor (another D) is provided between the 3 rd semiconductor (C) and the second main surface of the 9 th semiconductor (top of E). This argument is not persuasive. The claim requires is another D between C and the top surface of E. As shown in figure 1 of Koyama all of the 38s are between a top surface of E, or the bottom of 43, and C (31). Therefore, this argument is not persuasive. For all the reasons above, Applicant’s arguments are not persuasive. Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the following limitations must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. In the remarks filed November 30, 2025, Applicant states that claims 43-46, and 53-54 are supported by the 14 th embodiment. In the specification the 14 th embodiment is discussed on pages 70-71 at lines 16-12. There is no figure accompanying this embodiment. Examiner is issuing this drawing objection as the figures do not show the features of the claimed subject matter. New figure 70 On March 30, 2026, Applicant submitted new figure 70. Applicant states that figure 70 is the 14 th embodiment, and is supported by figure 38. Further, Applicant states figure 70 would have been obvious to one of ordinary skill in the art based upon claims 53-54. This argument is unpersuasive. Figure 70 includes element 28, which is not present in figure 38. Further, figure 70 does not include element 15, nor does it include element 23. Under Hyatt v. Dudas, 492 F.3d 1365, 1371 (Fed. Cir. 2007) “[w]hile each element may individually be discussed neither the specification nor drawings clearly support the claimed embodiment as a whole”. Further, Applicant’s reliance on the gap filling of what would have been obvious to one of ordinary skill in the art reading the disclosure cannot substitute for an enabling disclosure. Trustees of Boston Univ. v. Everlight Elec. Co., Ltd., 896 F.3d 1357, 1364 (Fed. Cir. 2018) citing AK Steel Corp. v. Sollac & Ugine, 344 F.3d 1234, 1244 (Fed. Cir. 2003). Therefore, figure 70 and the amendment to the specification will not be entered as it is new matter. 06-22 Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112(a) Examiner withdraws the 35 USC § 112(a) based upon Applicant’s amendments to claims 32-33. Rejection #1 Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim (s) 1-7, 31-34, 43-44, 47-48, and 53-54 is/are rejected under 35 U.S.C. 103 as being unpatentable over Koyama et al. (US 2012/0043581 A1) (“Koyama”) PNG media_image1.png 466 1201 media_image1.png Greyscale Regarding claim 1, Koyama teaches at least in figure 1, and Examiner figure 1 above: a transistor (10) and a diode (20) both formed in a common semiconductor base body (detailed below), the semiconductor base body (detailed as follows) including a first main surface (top of 31, i.e. 33) and a second main surface (bottom of 45/46) as one main surface and the other main surface, respectively (figure 1 shows this), a transistor region (10) in which the transistor is formed (10), and diode region (20) in which the diode is formed (20), the transistor region (10) including a first semiconductor layer (45) of a first conductivity type (p-type) formed on the second main surface side of the semiconductor base body (bottom of 45/46 a second semiconductor layer (44) of a second conductivity type (n-type) provided on the first semiconductor layer (45), a third semiconductor layer (31) of the first conductivity type (p-type) provided closer to the first main surface of the semiconductor base body (top of 31; 33) than the second semiconductor layer (44), a fourth semiconductor layer (38) of the second conductivity type (n-type) provided on the third semiconductor layer (31 in region 10), a second electrode (43) electrically connected to the fourth semiconductor layer (38), and a first electrode (47) electrically connected to the first semiconductor layer (45), the diode region (20) including a fifth semiconductor layer (46) of the second conductivity type (n-type) provided on the second main surface side of the semiconductor base body (bottom of 45/46), the second semiconductor layer (44) provided on the fifth semiconductor layer (45), a sixth semiconductor layer (31 in region 20) of the first conductivity type (p-type) provided closer to the first main surface of the semiconductor base body (top of 31) than the second semiconductor layer (44), a seventh semiconductor layer (42) of the first conductivity type (p-type) provided on the sixth semiconductor layer (31 in region 20) and having a first conductivity type impurity concentration higher than that of the sixth semiconductor layer (figure 1 shows 42 is P+ and 31 is P), the second electrode (43) electrically connected to the seventh semiconductor layer (31 in region 20), and the first electrode (47) electrically connected to the fifth semiconductor layer (46), wherein a first recombination region is provided at least in a region of the sixth semiconductor layer which is at the second main surface side of the seventh semiconductor layer and which overlaps the seventh semiconductor layer as seen in plan view (the first recombination region is the region of at least 31 in region 20 which overlaps, or is underneath, 42; hereinafter “B”. Examiner is treating the first recombination region as a region of 31. Because 31 and 42 contain the same structural elements as Applicant’s figure 4 in the same arraignment it means that a region of 31 can be considered a first recombination region. See MPEP 2112. Examiner has shown above the prior art has the same structure as Applicant’s claimed device with the same doping type for each of the layers. Therefore, any recombination region resulting from the interaction of the n-type and p-type layers which happens in Applicant’s alleged invention, must also happen in the prior art. Since the prior art has the same structure and same doping types and claimed concentrations as claimed it must also have the same characteristic of the interaction of the said layers. MPEP 2112. Rather, instead of amending the claims to capture any potential difference between the prior art and the claimed subject matter, Applicant appears to be arguing features which are not recited in the claims. Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993).). Regarding the limitation, when the diode is off and a breakdown voltage is maintained, the first recombination region is provided in a region that no depletion layer reaches. The above limitation is the result of using and/or stop using the device. This is because it is an obvious characteristic derived from the structure of the device. MPEP 2112. This could also be considered a manner of using the device. Where under MPEP 2114(II), the manner of operating/using a device does not differentiate the apparatus claim from the prior art. Thus, because the prior art has the claimed structure it is obvious that it would have the claimed characteristic and/or can be used in the same manner to produce the claimed result. Regarding claim 2, Koyama teaches at least in figure 1: wherein the first recombination region (B) is provided at least in a region of the sixth semiconductor layer (31 in region 20) which is in contact with a surface of the seventh semiconductor layer (42) on the second main surface side (top of 31). Regarding claim 3, Koyama teaches at least in figure 1: wherein the first recombination region (B) is provided so as to extend from the sixth semiconductor layer (31 in region 20) to the seventh semiconductor layer (42), including a surface of the seventh semiconductor layer on the second main surface side which is in contact with the sixth semiconductor layer (As best Examiner understands Applicant’s disclosure the first recombination region B is the same, or is part of (e.g. a region of), the sixth semiconductor layer. Koyama can contain such a region as Koyama teaches the same claimed structure. ). Regarding claim 4, Koyama teaches at least in figure 1: wherein the first recombination region (B) is formed at least in a region of the diode region (20) where a distance from the transistor region as seen in plan view is less than the thickness of the semiconductor base body (looking at figure 1 we see that at least one 42 is right next to a transistor in region 10. Therefore, even though the figures are not to scale, figure 1 teaches that B can be closer to a transistor in 10 than the thickness of A). Regarding claim 5, Koyama teaches at least in figure 1: wherein the first recombination region (B) is formed only in a region overlapping the seventh semiconductor layer as seen in plan view (see claims 1-4). Regarding claim 6, Koyama teaches at least in figure 1: wherein the first recombination region (B) and the seventh semiconductor layer (42) are formed in the same region as seen in plan view (both are formed in region 20, which in a plan view would be the same region). Regarding claim 7, Koyama teaches at least in figure 1: wherein the area of the first recombination region (B) as seen in plan view is not less than 20% of the area of a combination of the sixth semiconductor layer (31 in region 20) and the seventh semiconductor layer (42) as seen in plan view (See claims 1-6 for Examiner’s interpretation of the first recombination region B. Because B can be any or all parts of 31 in region 20, the region can be arbitrary determined to be not less than 20% of 31 in region 20). Regarding claim 31, Koyama teaches at least in figure 1, and Examiner’s figure 2 below: PNG media_image2.png 466 1009 media_image2.png Greyscale a transistor (10) and a diode (20) both formed in a common semiconductor base body (detailed below), the semiconductor base body (detailed below) including a first main surface (K) and a second main surface (L) as one main surface and the other main surface, respectively, a transistor region (10) in which the transistor (10) is formed, and a diode region (20) in which the diode (20) is formed, the transistor region (10) including a first semiconductor layer (A) of a first conductivity (p-type) type formed on the second main surface side (L) of the semiconductor base body (the claim is continuing to detail what makes up the semiconductor base body), a second semiconductor layer (B) of a second conductivity type (n-type) provided on the first semiconductor layer (A), a third semiconductor layer (C) of the first conductivity type (p-type) provided closer to the first main surface (K) of the semiconductor base body (as detailed here) than the second semiconductor layer (B), a fourth semiconductor layer (D) of the second conductivity type (n-type) provided on the third semiconductor layer (C), a ninth semiconductor layer (E) of the first conductivity type (p-type) provided on the third semiconductor layer (C) and having a first conductivity type (p-type) impurity concentration higher (P+) than that of the third semiconductor layer (C is just P), a second electrode (H) electrically connected to the fourth semiconductor layer (D) and the ninth semiconductor layer (E), and a first electrode (I) electrically connected to the first semiconductor layer (A), the diode region (20) including a fifth semiconductor layer (F) of the second conductivity type (N-type) provided on the second main surface (L) side of the semiconductor base body (as detailed previously), the second semiconductor layer (B) provided on the fifth semiconductor layer (F), a tenth semiconductor layer (G) provided closer to the first main surface (K) of the semiconductor base body (as detailed in this claim) than the second semiconductor layer (B) and containing an impurity of the first conductivity type (p-type), the second electrode (H) electrically connected to the tenth semiconductor layer (G), and the first electrode (I) electrically connected to the fifth semiconductor layer (F), wherein a second recombination region (M) is provided at least in a region of the third semiconductor layer (C) which is at the second main surface side (bottom side of E) of the ninth semiconductor layer (E) and which overlaps the ninth semiconductor layer (E) as seen in plan view (the second recombination region is the region of at least 31 in region 10 which overlaps, or is underneath, 39 (E). Examiner is treating the second recombination region as a region of 31. Because 31 and 29 contain the same structural elements as Applicant’s figure 4 in the same arraignment it means that a region of 31 can be considered a first recombination region. See MPEP 2112. Examiner has shown above the prior art has the same structure as Applicant’s claimed device with the same doping type for each of the layers. Therefore, any recombination region resulting from the interaction of the n-type and p-type layers which happens in Applicant’s alleged invention, must also happen in the prior art. Since the prior art has the same structure and same doping types and claimed concentrations as claimed it must also have the same characteristic of the interaction of the said layers. MPEP 2112. Rather, instead of amending the claims to capture any potential difference between the prior art and the claimed subject matter, Applicant appears to be arguing features which are not recited in the claims. Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993).). Regarding claim 32, Koyama teaches at least in figure 1, and Examiner’s figure 2: wherein the second recombination region (M) is provided at least in a region of the third semiconductor layer (C) which is in contact with a surface of the ninth semiconductor layer (E) that is on the second main surface side of the ninth semiconductor layer (bottom of E). Regarding claim 33, Koyama teaches at least in figure 1, and Examiner’s figure 2: wherein the second recombination region (M) is provided so as to extend from the third semiconductor layer (C) to the ninth semiconductor layer (E), including a surface of the ninth semiconductor layer (E) on the second main surface side (bottom of E) which is in contact with the third semiconductor layer (C). Regarding claim 34, Koyama teaches at least in figure 1, and Examiner’s figure 2: wherein the second recombination region (M) is formed at least in a region of the transistor region (10) where a distance from the diode region (10) as seen in plan view is less than the thickness of the semiconductor base body (the body of claim 1) (based upon figure 1 it is obvious that the claimed distance is taught by Koyama as one can choose any of the M’s around the E’s that would satisfy this limitation). Regarding claim 43, The difference between claim 43 and claim 27 is the inclusion of the 11 th semiconductor layer of the second conductivity type provided on the 3 rd semiconductor layer. The is not patentably distinct as claimed about the 11 th semiconductor layer. In Examiner’s figure 2 the 11 th semiconductor layer can be another 38 (D; n-type) on the 3 rd semiconductor layer (C). As shown in figure 1 of Koyama all of the 38s are between a top surface of E, or the bottom of 43, and C (31). Therefore, this argument is not persuasive. Regarding claim 44, Claim 44 is rejected under the same rational as claim 34 above. Regarding claim 47, Claim 47 is dependent upon claim 1, and it includes limitations from claim 31. Therefore, claim 47 is rejected for the same reasons found in claim 1 and claim 31. Regarding claim 48, Claim 48 is dependent upon claim 10, and includes limitations from claim 31. Therefore, claim 48 is rejected for the same reasons found in claim 1 and claim 31. Regarding claim 53, Claim 53 is dependent upon claim 1, and it includes limitations from claim 43. Therefore, claim 53 is rejected for the same reasons found in claim 1 and claim 43. Regarding claim 54, Claim 54 is dependent upon claim 1, and it includes limitations from claim 43. Therefore, claim 54 is rejected for the same reasons found in claim 1 and claim 43 . Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim (s) 8-9, 35-36, and 45-46 is/are rejected under 35 U.S.C. 103 as being unpatentable over Koyama, in view of Tsuzuki et al. (US 2010/0156506 A1) (“Tsuzuki”) . Regarding claims 8, and 35 Koyama does not teach: wherein the first recombination region is formed only in a region of the sixth semiconductor layer having a first conductivity type impurity concentration of not more than 1.0E+16/cm3. This is because Koyama teaches the relative doping concentrations of each region, but not the specific doping concentrations. Therefore, one of ordinary skill in the art would look for a reference which teaches the specific doping concentrations as they relate to the relative doping concentrations. Tsuzuki teaches, at least in figure 1: That the p base regions (11) can have a doping concentration of 2x10+17/cm3, and the P+ contact regions (17) can have a doping concentration of 3x10+19/cm3. Because Tsuzuki teaches a similar device to Koyama it would have been obvious to one of ordinary skill in the art to use Tsuzuki’s doping concentrations in the device of Koyama. Because the doping concentration is above the claimed limit then first recombination region is formed. Regarding claim 35, The rational used for claim 8 applies to claim 35. Claim 8 is directed to Examiner figure 2 element J, while claim 35 is directed to Examiner figure 2 element M. Regarding claim 45, Claim 45 is rejected for the same reasons as claim 35 above. Regarding claims 9, and 36 Koyama does not teach: wherein the diode region is divided into a plurality of unit cell regions by a trench gate extending from a surface of the semiconductor base body on the first main surface side to the second semiconductor layer, and wherein the ratio of the area of the first recombination region as seen in plan view to the area of a combination of the sixth semiconductor layer and the seventh semiconductor layer as seen in plan view in the unit cell region which is adjacent to the transistor region in the diode region is higher than the ratio of the area of the first recombination region as seen in plan view to the area of a combination of the sixth semiconductor layer and the seventh semiconductor layer as seen in plan view in the unit cell region which is not adjacent to the transistor region in the diode region. Tsuzuki teaches at least in figure 5: wherein the diode region (19) is divided into a plurality of unit cell regions by a trench gate (at least one 12 in region 18) extending from a surface of the semiconductor base body Top of 11) on the first main surface side to the second semiconductor layer (10). It would have been obvious to one of ordinary skill in the art to form this pattern of diode regions and gate regions in the device of Koyama because when one forms the device as described one can reduce the snap-back and increase the forward operation of the diodes. ¶¶ 0049-52. The combination of references teaches: wherein the ratio of the area of the first recombination region as seen in plan view to the area of a combination of the sixth semiconductor layer and the seventh semiconductor layer seen in plan view in the unit cell region which is adjacent to the transistor region in the diode region is higher than the ratio of the area of the first recombination region as seen in plan view to the area of a combination of the sixth semiconductor layer and the seventh semiconductor layer as seen in plan view in the unit cell region which is not adjacent to the transistor region in the diode region (As Examiner understands this limitation the diodes closest to the transistors will have a larger recombination region than the diodes further from the transistors. Because the prior art teaches multiple transistors, and multiple diodes, in the claimed pattern, and the diodes and transistors have the claimed structure, it would have been obvious to one of ordinary skill in the art that the recombination regions would have been created in the claimed manner. See MPEP 2112. Regarding claim 36, The rational used for claim 9 applies to claim 36. Claim 8 is directed to Examiner figure 2 element J, while claim 35 is directed to Examiner figure 2 element M. Regarding claim 46, Claim 46 is rejected for the same reasons as claim 36 above . 07-21-aia AIA Claim (s) 10-12, 17-20, 37-40, and 50-51 is/are rejected under 35 U.S.C. 103 as being unpatentable over Koyama, in view of Yanagida et al. (US 2007/0215938 A1) (“Yanagida”) . Regarding claim 10, Koyama teaches: All of the limitations of claim 10 except for… wherein a first crystal defect region is provided at least in a region of the sixth semiconductor layer which is at the second main surface side of the seventh semiconductor layer and which overlaps the seventh semiconductor layer as seen in plan view. As Examiner understands it the first crystal defect region is the result of using ion implantation to create Applicant’s element 15 which is equivalent to Koyama’s 31. Koyama does not teach how one would create element 31. Therefore, one of ordinary skill in the art would search for a reference to teach how to make element 31 in the device of Koyama. Yanagida teaches at least in figure 3: That element 3 (equivalent to Koyama’s element 31) can be formed by ion implantation. ¶ 0052. It would have been obvious to one of ordinary skill in the art to combine these references for the reasons stated above. Regarding the limitation, when the diode is off and a breakdown voltage is maintained, the first crystal defect region is provided in a region that the depletion layer does not reach. The above limitation is the result of using and/or stop using the device. This is because it is an obvious characteristic derived from the structure of the device. MPEP 2112. This could also be considered a manner of using the device. Where under MPEP 2114, the manner of operating/using a device does not differentiate the apparatus claim from the prior art. Thus, because the prior art has the claimed structure it is obvious that it would have the claimed characteristic and/or can be used in the same manner to produce the claimed result. Regarding claims 11, the combination of references teaches: wherein the first crystal defect region (Yanagida 3) is provided at least in a region of the sixth semiconductor layer (Koyama 31 in region 30) which is in contact with a surface of the seventh semiconductor layer (Koyama 42) on the second main surface side (Koyama top of 31). Regarding claim 12, the combination of references teaches: wherein the first crystal defect region (Yanagida 3) is is provided so as to extend from the sixth semiconductor layer (Koyama 31 in region 30) to the seventh semiconductor layer (Koyama 42), including a surface of the seventh semiconductor layer on the second main surface side which is in contact with the sixth semiconductor layer (top of 31). Regarding claim 17, Claim 17 contains the same subject matter as claim 4, and is therefore rejected for the same reasons. Regarding claim 18, Claim 18 contains the same subject matter as claim 5, and is therefore rejected for the same reasons. Regarding claim 19, Claim 19 contains the same subject matter as claim 6, and is therefore rejected for the same reasons. Regarding claim 20, Claim 20 contains the same subject matter as claim 7, and is therefore rejected for the same reasons. Regarding claim 37, Koyama teaches at least in figure 1, and Examiner’s figure 2: All of the limitations of claim 31 except for… wherein a second crystal defect region is provided at least in a region of the third semiconductor layer which is at the second main surface side of the ninth semiconductor layer and which overlaps the ninth semiconductor layer as seen in plan view. As Examiner understands it the second crystal defect region is the result of using ion implantation to create Applicant’s element 2 which is equivalent to Koyama’s 39. Koyama does not teach how one would create element 39. Therefore, one of ordinary skill in the art would search for a reference to teach how to make element 39 in the device of Koyama as stated in claim 10. Regarding claim 38, Claim 38 contains the same subject matter as claim 32, and is therefore rejected for the same reasons. Regarding claim 39, Claim 39 contains the same subject matter as claim 33, and is therefore rejected for the same reasons. Regarding claim 40, Claim 40 contains the same subject matter as claim 34, and is therefore rejected for the same reasons. Regarding claim 50, Claim 50 is dependent upon claim 1, and it includes limitations from claim 37. Therefore, claim 50 is rejected for the same reasons found in claim 1 and claim 37. Regarding claim 51, Claim 51 is dependent upon claim 10, and includes limitations from claim 37. Therefore, claim 51 is rejected for the same reasons found in claim 1 and claim 37 . 07-21-aia AIA Claim (s) 13-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Koyama, in view of … . Kusunoki (US 6,323,509 B1) (“Kusunoki”); Werber et al. (US 2013/0341674 A1) (“Werber”); Yamazaki et al. (US 2013/0075783 A1) (“Yamazaki I); and/or Yamazaki et al. (US 20060281263 A1) (“Yamazaki II). Regarding claims 13-16, Koyama does not teach: The materials in the defect regions.. Kusunoki teaches: That one can implant helium into the substrate at 28 in order to locally generate crystal defects in order to create recombination centers for minority carriers, which has the effect of controlling carrier lifetime. Col. 19 at lines 50-60. One would want to do this to the device of Koyama in order to optimize the power consumption of the device. Col. 9 at lines 50-60. Werber teaches: That carbon atoms, argon atoms, semiconductor atoms, etc. can be used instead of helium in order to control carrier lifetime. ¶ 0037. Yamazaki I teaches: That hydrogen can be used instead of helium in order to control carrier lifetime. ¶ 0003. Yamazaki II teaches: That nitrogen or carbon can be used to control carrier lifetime. ¶ 0004. It would have been obvious to one of ordinary skill in the art to employ at least one of the elements in the device of Koyama in the diode region in order to control carrier lifetime . 07-21-aia AIA Claim (s) 21-22, and 41-42 is/are rejected under 35 U.S.C. 103 as being unpatentable over Koyama, in view of Yanagida, in view of Tsuzuki . Regarding claim 21, Claim 21 contains the same subject matter as claim 8, and is therefore rejected for the same reasons. Regarding claim 22, Claim 22 contains the same subject matter as claim 9, and is therefore rejected for the same reasons. Regarding claim 41, Claim 41 contains the same subject matter as claim 35, and is therefore rejected for the same reasons. Regarding claim 42, Claim 42 contains the same subject matter as claim 36, and is therefore rejected for the same reasons. Rejection #2 Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim (s) 1-10 are rejected under 35 U.S.C. 103 as being unpatentable over Takahashi et al. (US 2020/0135717 A1) (“Takahashi”), in view of ABB Tech. AG (EP 2341528 A1) (“ABB”) . 07-21-02-aia The applied reference has a common Inventor and/or Applicant with the instant application. Based upon the earlier effectively filed date of the reference, it constitutes prior art under 35 U.S.C. 102(a)(2). This rejection under 35 U.S.C. 103 might be overcome by: (1) a showing under 37 CFR 1.130(a) that the subject matter disclosed in the reference was obtained directly or indirectly from the inventor or a joint inventor of this application and is thus not prior art in accordance with 35 U.S.C.102(b)(2)(A); (2) a showing under 37 CFR 1.130(b) of a prior public disclosure under 35 U.S.C. 102(b)(2)(B); or (3) a statement pursuant to 35 U.S.C. 102(b)(2)(C) establishing that, not later than the effective filing date of the claimed invention, the subject matter disclosed and the claimed invention were either owned by the same person or subject to an obligation of assignment to the same person or subject to a joint research agreement. See generally MPEP § 717.02. Regarding claim 1, Takahashi teaches at least in figures 2-3: a transistor (101a) and a diode (101b) both formed in a common semiconductor base body (detailed below), the semiconductor base body (detailed as follows) including a first main surface (13) and a second main surface (bottom of 10/9) as one main surface and the other main surface, respectively (figure 3 shows this), a transistor region (101A) in which the transistor is formed (101A), and diode region (101b) in which the diode is formed (101B), the transistor region (101a) including a first semiconductor layer (9) of a first conductivity type (p-type) formed on the second main surface side of the semiconductor base body (10/9) a second semiconductor layer (1/8) of a second conductivity type (n-type) provided on the first semiconductor layer (9), a third semiconductor layer (2) of the first conductivity type (p-type) provided closer to the first main surface of the semiconductor base body (13) than the second semiconductor layer (1/8), a fourth semiconductor layer (3) of the second conductivity type (n-type) provided on the third semiconductor layer (2), a second electrode (11) electrically connected to the fourth semiconductor layer (3), and a first electrode (12) electrically connected to the first semiconductor layer (9), the diode region (101b) including a fifth semiconductor layer (10) of the second conductivity type (n-type) provided on the second main surface side of the semiconductor base body (bottom of 10/9), the second semiconductor layer (1/8) provided on the fifth semiconductor layer (10), a sixth semiconductor layer (2) of the first conductivity type (p-type) provided closer to the first main surface of the semiconductor base body (13) than the second semiconductor layer (1/8), a seventh semiconductor layer (4) of the first conductivity type (p-type) provided on the sixth semiconductor layer (2) and having a first conductivity type impurity concentration higher than that of the sixth semiconductor layer (¶ 0041, where 2 is p-type, and 4 is p+-type), the second electrode (11) electrically connected to the seventh semiconductor layer (4), and the first electrode (12) electrically connected to the fifth semiconductor layer (10). Takahashi does not explicitly teach: wherein a first recombination region is provided at least in a region of the sixth semiconductor layer which is at the second main surface side of the seventh semiconductor layer and which overlaps the seventh semiconductor layer as seen in plan view. ABB teaches at least in figure 1: That one may want to form a lifetime control region 134 in the surface of the diode 101. This lifetime control region comprises defects which in turn form recombination centers. ¶ 0008. In turn these recombination centers will reduce the minority carrier lifetime. Which then reduce the voltage peak during diode turn off, i.e. reverse recovery. Therefore, it would have been obvious to one of ordinary skill in the art to combine ABB with Takahashi in order to gain this benefit in Takahashi. The combination of ABB and Takahashi teach: wherein a first recombination region (ABB 134) is provided at least in a region of the sixth semiconductor layer (2) which is at the second main surface side of the seventh semiconductor layer (4) and which overlaps the seventh semiconductor layer (4) as seen in plan view (the combination would present this view when viewed from the top). Regarding the limitation, when the diode is off and a breakdown voltage is maintained, the first recombination region is provided in a region that the depletion layer does not reach. The above limitation is the result of using and/or stop using the device. This is because it is an obvious characteristic derived from the structure of the device. MPEP 2112. This could also be considered a manner of using the device. Where under MPEP 2114, the manner of operating/using a device does not differentiate the apparatus claim from the prior art. Thus, because the prior art has the claimed structure it is obvious that it would have the claimed characteristic and/or can be used in the same manner to produce the claimed result. Regarding claim 2, The prior art teaches: wherein the first recombination region (ABB 134) is provided at least in a region of the sixth semiconductor layer (Takahashi 2) which is in contact with a surface of the seventh semiconductor layer (Takahashi 4) on the second main surface side (Takahashi 13). Regarding claim 3, The prior art teaches: wherein the first recombination region (ABB 134) is provided so as to extend from the sixth semiconductor layer (Takahashi 2) to the seventh semiconductor layer (Takahashi 4), including a surface of the seventh semiconductor layer on the second main surface side which is in contact with the sixth semiconductor layer (As best Examiner understands Applicant’s disclosure the first recombination region is the same, or is part of (e.g. a region of), the sixth semiconductor layer. The prior art can contain such a region as the prior art teaches the same claimed structure. ). Regarding claim 4, The prior art teaches: wherein the first recombination region (ABB 134) is formed at least in a region of the diode region (Takahashi 101b) where a distance from the transistor region as seen in plan view is less than the thickness of the semiconductor base body (This is considered an optimization of the transistor size. It would have been obvious to optimize the transistor size in order to optimize the amount of current one wants to flow through the transistor, and to optimize it based upon the process node one is using to create the transistor.). Regarding claim 5, The prior art teaches: wherein the first recombination region (ABB 134) is formed only in a region overlapping the seventh semiconductor layer as seen in plan view (the combination would present this view when viewed from the top). Regarding claim 6, The prior art teaches: wherein the first recombination region (ABB 134) and the seventh semiconductor layer (Takahashi 4) are formed in the same region as seen in plan view (both will be formed in the diode region). Regarding claim 7, The prior art teaches: wherein the area of the first recombination region (ABB 134) as seen in plan view is not less than 20% of the area of a combination of the sixth semiconductor layer (Takahashi 2) and the seventh semiconductor layer (Takahashi 4) as seen in plan view (the combination would present this view when viewed from the top). 07-21-aia AIA Claim (s) 8-9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Takahashi, in view of ABB, in view of Tsuzuki et al. (US 2010/0156506 A1) (“Tsuzuki”) . Regarding claim 8, Takahashi does not teach: wherein the first recombination region is formed only in a region of the sixth semiconductor layer having a first conductivity type impurity concentration of not more than 1.0E+16/cm3. This is because Koyama teaches the relative doping concentrations of each region, but not the specific doping concentrations. Therefore, one of ordinary skill in the art would look for a reference which teaches the specific doping concentrations as they relate to the relative doping concentrations. Because Tsuzuki teaches a similar device to Takahashi it would have been obvious to one of ordinary skill in the art to use Tsuzuki’s doping concentrations in the device of Takahashi. Regarding claim 9, Takahashi does not teach: wherein the diode region is divided into a plurality of unit cell regions by a trench gate extending from a surface of the semiconductor base body on the first main surface side to the second semiconductor layer, and wherein the ratio of the area of the first recombination region as seen in plan view to the area of a combination of the sixth semiconductor layer and the seventh semiconductor layer as seen in plan view in the unit cell region which is adjacent to the transistor region in the diode region is higher than the ratio of the area of the first recombination region as seen in plan view to the area of a combination of the sixth semiconductor layer and the seventh semiconductor layer as seen in plan view in the unit cell region which is not adjacent to the transistor region in the diode region. Tsuzuki teaches at least in figure 5: wherein the diode region (19) is divided into a plurality of unit cell regions by a trench gate (at least one 12 in region 18) extending from a surface of the semiconductor base body Top of 11) on the first main surface side to the second semiconductor layer (10). It would have been obvious to one of ordinary skill in the art to form this pattern of diode regions and gate regions in the device of Koyama because when one forms the device as described one can reduce the snap-back and increase the forward operation of the diodes. ¶¶ 0049-52. The combination of references teaches: wherein the ratio of the area of the first recombination region as seen in plan view to the area of a combination of the sixth semiconductor layer and the seventh semiconductor layer seen in plan view in the unit cell region which is adjacent to the transistor region in the diode region is higher than the ratio of the area of the first recombination region as seen in plan view to the area of a combination of the sixth semiconductor layer and the seventh semiconductor layer as seen in plan view in the unit cell region which is not adjacent to the transistor region in the diode region (As Examiner understands this limitation the diodes closest to the transistors will have a larger recombination region than the diodes further from the transistors. Because the prior art teaches multiple transistors, and multiple diodes, in the claimed pattern, and the diodes and transistors have the claimed structure, it would have been obvious to one of ordinary skill in the art that the recombination regions would have been created in the claimed manner. See MPEP 2112 . 07-21-aia AIA Claim (s) 10-12, and 17-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Takahashi, in view of ABB, in view of Yanagida et al. (US 2010/0156506 A1) (“Yanagida”) . Regarding claim 10, Takahashi teaches: All of the limitations of claim 10 except for… wherein a first crystal defect region is provided at least in a region of the sixth semiconductor layer which is at the second main surface side of the seventh semiconductor layer and which overlaps the seventh semiconductor layer as seen in plan view. As Examiner understands it the first crystal defect region is the result of using ion implantation to create Applicant’s element 15. Takahashi does not teach how creating the defect region in the sixth semiconductor layer Therefore, one of ordinary skill in the art would search for a reference to teach how to do this. ABB teaches at least in figure 1: That one may want to form a lifetime control region 134 in the surface of the diode 101. This lifetime control region comprises defects which in turn form recombination centers. ¶ 0008. In turn these recombination centers will reduce the minority carrier lifetime. Which then reduce the voltage peak during diode turn off, i.e. reverse recovery. ABB teaches that the defect regions may be formed by ion implantation. ¶¶ 0009-10. This is the same manner used by Applicant to form the defect regions in the crystal lattice. It would have been obvious to one of ordinary skill in the art to combine ABB with Takahashi in order to gain this benefit in Takahashi. Regarding the limitation, when the diode is off and a breakdown voltage is maintained, the first crystal defect region is provided in a region that the depletion layer does not reach. The above limitation is the result of using and/or stop using the device. This is because it is an obvious characteristic derived from the structure of the device. MPEP 2112. This could also be considered a manner of using the device. Where under MPEP 2114, the manner of operating/using a device does not differentiate the apparatus claim from the prior art. Thus, because the prior art has the claimed structure it is obvious that it would have the claimed characteristic and/or can be used in the same manner to produce the claimed result. Regarding claims 11, the combination of references teaches: wherein the first crystal defect region (ABB 134) is provided at least in a region of the sixth semiconductor layer (Takahashi 2) which is in contact with a surface of the seventh semiconductor layer (Takahashi 4) on the second main surface side (Takahashi 13). Regarding claim 12, the combination of references teaches: wherein the first crystal defect region (ABB 134) is is provided so as to extend from the sixth semiconductor layer (Takahashi 2) to the seventh semiconductor layer (Takahashi 4), including a surface of the seventh semiconductor layer on the second main surface side which is in contact with the sixth semiconductor layer (Takahashi 13). Regarding claim 17, Claim 17 contains the same subject matter as claim 4, and is therefore rejected for the same reasons. Regarding claim 18, Claim 18 contains the same subject matter as claim 5, and is therefore rejected for the same reasons. Regarding claim 19, Claim 19 contains the same subject matter as claim 6, and is therefore rejected for the same reasons. Regarding claim 20, Claim 20 contains the same subject matter as claim 7, and is therefore rejected for the same reasons . 07-21-aia AIA Claim (s) 13-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Takahashi, in view of ABB, in view of … . Kusunoki (US 6,323,509 B1) (“Kusunoki”); Werber et al. (US 2013/0341674 A1) (“Werber”); Yamazaki et al. (US 2013/0075783 A1) (“Yamazaki I); and/or Yamazaki et al. (US 20060281263 A1) (“Yamazaki II). Regarding claims 13-16, ABB teaches: One can use hydrogen or helium ions to create the defect regions. ¶ 0008. This is supported by… Kusunoki teaches: That one can implant helium into the substrate at 28 in order to locally generate crystal defects in order to create recombination centers for minority carriers, which has the effect of controlling carrier lifetime. Col. 19 at lines 50-60. One would want to do this to the device of Koyama in order to optimize the power consumption of the device. Col. 9 at lines 50-60. Werber teaches: That carbon atoms, argon atoms, semiconductor atoms, etc. can be used instead of helium in order to control carrier lifetime. ¶ 0037. Yamazaki I teaches: That hydrogen can be used instead of helium in order to control carrier lifetime. ¶ 0003. Yamazaki II teaches: That nitrogen or carbon can be used to control carrier lifetime. ¶ 0004. It would have been obvious to one of ordinary skill in the art to employ at least one of the elements in the device of Koyama in the diode region in order to control carrier lifetime . 07-21-aia AIA Claim (s) 21-22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Takahashi, in view of ABB, in view of Yanagida, in view of Tsuzuki . Regarding claim 21, Claim 21 contains the same subject matter as claim 8, and is therefore rejected for the same reasons. Regarding claim 22, Claim 22 contains the same subject matter as claim 9, and is therefore rejected for the same reasons. Conclusion 07-39 AIA THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to VINCENT WALL whose telephone number is (571)272-9567. The examiner can normally be reached Monday to Thursday at 7:30am to 2:30pm PST. Interviews can be scheduled on Tuesday thru Thursday at 10am PST or 2pm PST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Manno can be reached on 571-272-2339. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. 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If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /VINCENT WALL/Primary Examiner, Art Unit 2822 Application/Control Number: 17/373,708 Page 2 Art Unit: 2898 Application/Control Number: 17/373,708 Page 3 Art Unit: 2898 Application/Control Number: 17/373,708 Page 4 Art Unit: 2898 Application/Control Number: 17/373,708 Page 5 Art Unit: 2898 Application/Control Number: 17/373,708 Page 6 Art Unit: 2898 Application/Control Number: 17/373,708 Page 7 Art Unit: 2898 Application/Control Number: 17/373,708 Page 8 Art Unit: 2898 Application/Control Number: 17/373,708 Page 9 Art Unit: 2898 Application/Control Number: 17/373,708 Page 10 Art Unit: 2898 Application/Control Number: 17/373,708 Page 11 Art Unit: 2898 Application/Control Number: 17/373,708 Page 12 Art Unit: 2898 Application/Control Number: 17/373,708 Page 13 Art Unit: 2898 Application/Control Number: 17/373,708 Page 14 Art Unit: 2898 Application/Control Number: 17/373,708 Page 15 Art Unit: 2898 Application/Control Number: 17/373,708 Page 16 Art Unit: 2898 Application/Control Number: 17/373,708 Page 17 Art Unit: 2898 Application/Control Number: 17/373,708 Page 18 Art Unit: 2898 Application/Control Number: 17/373,708 Page 19 Art Unit: 2898 Application/Control Number: 17/373,708 Page 20 Art Unit: 2898 Application/Control Number: 17/373,708 Page 21 Art Unit: 2898 Application/Control Number: 17/373,708 Page 22 Art Unit: 2898 Application/Control Number: 17/373,708 Page 23 Art Unit: 2898 Application/Control Number: 17/373,708 Page 24 Art Unit: 2898 Application/Control Number: 17/373,708 Page 25 Art Unit: 2898 Application/Control Number: 17/373,708 Page 26 Art Unit: 2898 Application/Control Number: 17/373,708 Page 27 Art Unit: 2898 Application/Control Number: 17/373,708 Page 28 Art Unit: 2898 Application/Control Number: 17/373,708 Page 29 Art Unit: 2898 Application/Control Number: 17/373,708 Page 30 Art Unit: 2898 Application/Control Number: 17/373,708 Page 31 Art Unit: 2898 Application/Control Number: 17/373,708 Page 32 Art Unit: 2898 Application/Control Number: 17/373,708 Page 33 Art Unit: 2898 Application/Control Number: 17/373,708 Page 34 Art Unit: 2898 Application/Control Number: 17/373,708 Page 35 Art Unit: 2898 Application/Control Number: 17/373,708 Page 36 Art Unit: 2898 Application/Control Number: 17/373,708 Page 37 Art Unit: 2898 Application/Control Number: 17/373,708 Page 38 Art Unit: 2898 Application/Control Number: 17/373,708 Page 39 Art Unit: 2898 Application/Control Number: 17/373,708 Page 40 Art Unit: 2898 Application/Control Number: 17/373,708 Page 41 Art Unit: 2898
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