Prosecution Insights
Last updated: April 17, 2026
Application No. 17/380,002

MAPPING INFORMATION MANAGEMENT METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT

Final Rejection §103§112
Filed
Jul 19, 2021
Examiner
KNIGHT, PAUL M
Art Unit
2148
Tech Center
2100 — Computer Architecture & Software
Assignee
Phison Electronics Corp.
OA Round
9 (Final)
62%
Grant Probability
Moderate
10-11
OA Rounds
3y 1m
To Grant
80%
With Interview

Examiner Intelligence

Grants 62% of resolved cases
62%
Career Allow Rate
169 granted / 272 resolved
+7.1% vs TC avg
Strong +18% interview lift
Without
With
+17.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
24 currently pending
Career history
296
Total Applications
across all art units

Statute-Specific Performance

§101
9.5%
-30.5% vs TC avg
§103
45.5%
+5.5% vs TC avg
§102
6.0%
-34.0% vs TC avg
§112
35.2%
-4.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 272 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Applicant Reply “The claims may be amended by canceling particular claims, by presenting new claims, or by rewriting particular claims as indicated in 37 CFR 1.121(c). The requirements of 37 CFR 1.111(b) must be complied with by pointing out the specific distinctions believed to render the claims patentable over the references in presenting arguments in support of new claims and amendments. . . . The prompt development of a clear issue requires that the replies of the applicant meet the objections to and rejections of the claims. Applicant should also specifically point out the support for any amendments made to the disclosure. See MPEP § 2163.06. . . . An amendment which does not comply with the provisions of 37 CFR 1.121(b), (c), (d), and (h) may be held not fully responsive. See MPEP § 714.” MPEP § 714.02. Generic statements or listing of numerous paragraphs do not “specifically point out the support for” claim amendments. “With respect to newly added or amended claims, applicant should show support in the original disclosure for the new or amended claims. See, e.g., Hyatt v. Dudas, 492 F.3d 1365, 1370, n.4, 83 USPQ2d 1373, 1376, n.4 (Fed. Cir. 2007) (citing MPEP § 2163.04 which provides that a ‘simple statement such as ‘applicant has not pointed out where the new (or amended) claim is supported, nor does there appear to be a written description of the claim limitation ‘___’ in the application as filed’ may be sufficient where the claim is a new or amended claim, the support for the limitation is not apparent, and applicant has not pointed out where the limitation is supported.’)” MPEP § 2163(II)(A). Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1-21 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Generally: separately listed claim elements are construed as distinct components, all claim terms must be given weight, and there is presumed to be a difference in meaning and scope when different words or phrases are used in separate claims. Since different term or phrases are presumed to differ in scope and each term or phrase in the claims must find clear support in the description, a description of a single element in the Specification may fail to support multiple claim terms. “[C]laims must ‘conform to the invention as set forth in the remainder of the specification and the terms and phrases used in the claims must find clear support or antecedent basis in the description so that the meaning of the terms in the claims may be ascertainable by reference to the description.’ 37 C.F.R. § 1.75(d)(1).” Phillips v. AWH Corp., 415 F.3d 1303, 1316 (Fed. Cir. 2005) (as cited in MPEP § 2111). Further, a lack of lack of detail in the Specification describing how a claimed result is achieved can support a finding that the Applicant was not in possession of the claimed invention at the time of filing, notwithstanding verbatim support. “It is not enough that one skilled in the art could write a program to achieve the claimed function because the specification must explain how the inventor intends to achieve the claimed function to satisfy the written description requirement. See, e.g., Vasudevan Software, Inc. v. MicroStrategy, Inc., 782 F.3d 671, 681-683, 114 USPQ2d 1349, 1356, 1357 (Fed. Cir. 2015) (reversing and remanding the district court’s grant of summary judgment of invalidity for lack of adequate written description where there were genuine issues of material fact regarding "whether the specification show[ed] possession by the inventor of how accessing disparate databases is achieved"). If the specification does not provide a disclosure of the computer and algorithm in sufficient detail to demonstrate to one of ordinary skill in the art that the inventor possessed the invention a rejection under 35 U.S.C. 112(a) or pre-AIA 35 U.S.C. 112, first paragraph, for lack of written description must be made.” MPEP § 2161.01(I). “An original claim may lack written description support when (1) the claim defines the invention in functional language specifying a desired result but the disclosure fails to sufficiently identify how the function is performed or the result is achieved[.] See Ariad Pharms., Inc. v. Eli Lilly & Co., 598 F.3d 1336, 1349-50 (Fed. Cir. 2010) (en banc). The written description requirement is not necessarily met when the claim language appears in ipsis verbis in the specification. ‘Even if a claim is supported by the specification, the language of the specification, to the extent possible, must describe the claimed invention so that one skilled in the art can recognize what is claimed. The appearance of mere indistinct words in a specification or a claim, even an original claim, does not necessarily satisfy that requirement.’” MPEP § 2163.03. All independent claims recite “transmitting . . . the assistant information . . . to the host system . . . wherein assistant information includes address information generated through encoding.” The claimed “address information” is described only as a letter (i.e. X, Y, or Z) used as a replacement for a physical address. See Spec. ¶81 (For instance, in the assistant information "10.X", "01.X", and "00.X" corresponding to the logical addresses 0 to 2, the "10", "01", and "00" are consecutive information, reflecting that the 3 physical addresses mapped by the logical addresses O to 2 are consecutive, and the ".X" is address information which is generated by encoding the physical 20 address 300. For instance, in the assistant information "00.Y" corresponding to the logical address 3, the "00" is consecutive information, reflecting that the physical address mapped by the logical address 3 is inconsecutive, and the ". Y'' is the address information which is generated by encoding the physical address 400.) In other words, the claims purport to encode a physical address as something represented in the Specification as a letter, and then electronically transmit to the host, some undescribed structure represented by the letter. Nothing in the Specification describes the encoding. Nothing in the Specification indicates how the letter described in the Spec would be electronically represented in the system during transmission. The Spec merely asserts that a physical address is encoded as a letter. This not only fails to provide the requisite detail required to sufficiently identify how the claimed encoding is performed or how the result is achieved, it fails to describe the result achieved. In summary, a description of “encoding” that only shows replacement of a physical address with a letter fails to describe the claimed encoding physical address for electronic transmission. All dependent claims are rejected as containing the limitations of the claims from which they depend. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-21 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. At the outset it is noted that separately listed claim elements are construed as distinct components, that all claim terms must be given weight, there is presumed to be a difference in meaning and scope when different words or phrases are used in separate claims, and repeated and consistent descriptions in the specification indicate the proper scope of a claimed term. “[C]laims must ‘conform to the invention as set forth in the remainder of the specification and the terms and phrases used in the claims must find clear support or antecedent basis in the description so that the meaning of the terms in the claims may be ascertainable by reference to the description.’ 37 C.F.R. § 1.75(d)(1).” Phillips v. AWH Corp., 415 F.3d 1303, 1316 (Fed. Cir. 2005) (as cited in MPEP § 2111). All independent claims substantially recite “encoding the mapping information to generate assistant information and verification information, wherein the assistant information is not stored into the rewritable non-volatile memory module, wherein an amount of data of the assistant information is less than an amount of data of the mapping information; transmitting at least one logical address, the assistant information, and the verification information to the host system to provide information related to the storing of the first data, wherein the at least one logical address is mapped to physical addresses, and wherein the assistant information includes address information generated through encoding.” The claim language above includes the terms “mapping information,” “assistant information,” “verification information,” “information related to the storing of the first data,” “logical address,” “physical address,” and “address information.” It is not clear how several the claimed terms are different from one another, because the Specification either fails to describe different structures or equates multiple terms listed above. Separately recited terms imply distinct claim elements. Since the description of the terms is not consistent with interpreting the different terms as distinct claim elements, it is not clear whether various terms above should be read as the same structure or as different structures. For instance, it is unclear whether the “address information” or the “information related to the storing of the first data” are structurally different than the separately claimed “mapping information,” “logical address,” and/or “physical address.” The deletion of “first part information” and “second part information” from the independent claims is noted. However, the term “second part information” remains in the dependent claims, indicating that the terms in the independent claims must refer to claim elements which are somehow distinguishable from the claimed “second information.” The Specification describes the claimed “second part information” as a part of the mapping information. (“the mapping information 812 (i.e., the second part information of the mapping information 81).” Spec. ¶ 78.) The Specification describes the “second part information” as parts of the mapping information without distinguishing between the two structures. But the use of different terms in the claims requires that the terms have different meaning and scope. The Specification also describes mapping information 811 as the “first part information of the mapping information 81” and mapping information 812 as the “second part information of the mapping information 81.” See Spec. ¶ 70. The description of the claimed “mapping information 812” as being “the second part information” in paragraph 78 is inconsistent with interpreting the claimed “second part information” and the recited “mapping information” as distinct components. The “second part information” could refer to a logical address. But the claims also recite a “logical address” so this interpretation would also be inconsistent with interpreting different claim terms as distinct components. Since there is no clear way to interpret each claimed term as distinct components that would be consistent with the disclosure, the claims are indefinite. Claim language may not be “ambiguous, vague, incoherent, opaque, or otherwise unclear in describing and defining the claimed invention.” Packard, 751 F.3d at 1311. Applicants need not confine themselves to the terminology used in the prior art, but are required to make clear and precise the terms that are used to define the invention whereby the metes and bounds of the claimed invention can be ascertained. . . . The requirements for clarity and precision must be balanced with the limitations of the language and the science. If the claims, read in light of the specification, reasonably apprise those skilled in the art both of the utilization and scope of the invention, and if the language is as precise as the subject matter permits, the statute (35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph) demands no more. Packard, 751 F.3d at 1313 ("[H]ow much clarity is required necessarily invokes some standard of reasonable precision in the use of language in the context of the circumstances."). This does not mean that the examiner must accept the best effort of applicant. If the language is not considered as precise as the subject matter permits, the examiner should provide reasons to support the conclusion of indefiniteness and is encouraged to suggest alternatives that would not be subject to rejection.” MPEP § 2173.05(a). The amendments also add a new term “address information,” in a clause reciting “transmitting . . . the assistant information . . . to the host system . . . wherein assistant information includes address information generated through encoding.” The meaning of “address information,” an applicant invented term, is explained in the Specification as corresponding to a letter representing an address. See Spec. ¶81 and Figs. 10-11 (For instance, in the assistant information "10.X", "01.X", and "00.X" corresponding to the logical addresses 0 to 2, the "10", "01", and "00" are consecutive information, reflecting that the 3 physical addresses mapped by the logical addresses 0 to 2 are consecutive, and the ".X" is address information which is generated by encoding the physical 20 address 300. For instance, in the assistant information "00.Y" corresponding to the logical address 3, the "00" is consecutive information, reflecting that the physical address mapped by the logical address 3 is inconsecutive, and the ". Y'' is the address information which is generated by encoding the physical address 400.) In other words, the claims purport to encode a physical address as something represented in the Specification as a letter, and then electronically transmit to the host this undescribed structure, which is only described in the Specification with reference to to letter. Nothing in the Specification describes the encoding. Nothing in the Specification indicates how the letter described in the Spec would be electronically represented in the system during transmission. The Spec merely asserts that a physical address is encoded and shows a letter as an example. As Applicant is aware, information in a computer is commonly stored and transmitted using binary representations. Without any indication of what would replace the numerical physical addresses in figure 10 in a format that can actually be stored on a computer, this description only explains how one might draw out letters to represent numbers using a pen and paper. Without a description of any computer compatible format for the claimed “address information,” there is no way of interpreting the claimed “address information” consistent with both the Specification and with the technology recited in the claims. In other words, the claims purport to encode a physical address but the only example of the result of this encoding is a single one of 26 possible characters. Based on this scant description, it is not clear whether the claimed encoding refers to a change to the physical address or merely refers to the binary representation of the address used to send the data. As an example, the “encoding” could reasonably refer to representing the physical address in binary. But it is not clear that the claimed “encoding” should read on a binary representation when read in light of a disclosure that describes encoding physical address 420 as a “Y”. See Spec. Fig. 10-11. Conversely, it is not clear that encoding 420 as a “Y” is consistent with claims directed to sending the encoded information to a host. Since there is no reasonable way of interpreting the claim language in view of the Specification, the claims are indefinite. Claims 12 and 13 recite “the second part information” without providing antecedent basis for this term. It is not clear which of the claim elements recited in claim 8 is referred to by “the second part information." All dependent claims are rejected as containing the limitations of the claims from which they depend. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-21 are rejected under 35 U.S.C. 103 as being unpatentable over Kang (US 2020/0327063, different assignee) and Mehta (Industrial Process Automation Systems, 2016). 1. A mapping information management method suitable for a memory storage device comprising a rewritable non-volatile memory module, wherein the mapping information management method comprises: receiving a write command instructing storing of first data from a host system; sending a first write command sequence configured for storing the first data to the rewritable non-volatile memory module according to the write command; (“Herein, when the controller 130 receives write commands from the host 102, the controller 130 may write and store user data corresponding to the write commands in memory blocks, and store metadata including map information about the user data stored in the memory blocks in the memory blocks.” Kang paragraph 0162. The recited “write command sequence” storing data to the NVM reads on data and metadata sent from the controller to the NVM.) updating mapping information corresponding to the storing of the first data; sending a second write command sequence configured for storing the mapping information to the rewritable non-volatile memory module; (“When the controller 130 performs a plurality of command operations corresponding to a plurality of commands received from the host 102, for example, when the controller 130 receives a plurality of write commands from the host 102, the controller 130 may perform program operations corresponding to the write commands. In this case, user data corresponding to the write commands may be written and stored in memory blocks of the memory device 150, for example, empty memory blocks in which an erase operation has been performed, open memory blocks, or free memory blocks among the memory blocks of the memory device 150. Mapping information between logical addresses and physical addresses for the user data stored in the memory blocks, i.e., a L2P map table storing logical information, and mapping information between physical addresses and logical addresses for memory blocks storing the user data, i.e., a P2L map table storing physical information, are written and stored in empty memory blocks, open memory blocks, or free memory blocks among the memory blocks of the memory device 150.” Kang paragraph 0161. “Herein, when the controller 130 receives write commands from the host 102, the controller 130 may write and store user data corresponding to the write commands in memory blocks . . . the controller 130 may generate and update meta segments of the metadata, that is, L2P segments and P2L segments out of the map segments of the map information, and then store them in the memory blocks of the memory device 150.” Kang paragraph 0162.) encoding the mapping information to generate assistant information and verification information, (To keep the rejection organized, the claimed “the mapping information” is addressed in the next section. Note that the language “to generate . . .” is written as an intended use. Intended use language is explained in MPEP §§ 2103 and 2111.02. “Claim scope is not limited by claim language that suggests or makes optional but does not require steps to be performed, or by claim language that does not limit a claim to a particular structure.” MPEP § 2111.04. The previously cited art does not expressly teach verification information being sent from the memory to the host. Mehta teaches the benefit of adding CRC to data before transfer “CRC stands for cyclic redundancy check. It is 2 bytes added to the end of every modbus message for error detection. Every byte in the message is used to calculate the CRC. The receiving device also calculates the CRC and compares it to the CRC from the sending device. If even 1 bit in the message is received incorrectly, the CRCs are different and result in an error.” Mehta section 9.6.9. See also Mehta section 9.6.7 and Fig. 9.22 showing messages being sent between memory/storage and a host. Given that “every byte in the message is used to calculate CRC,” one of ordinary skill in the art would understand Mehta as teaching a slave device sending It would have been obvious to one of ordinary skill in the art before the effective filing date to combine the teaching of as an instance of applying a known technique to a known device (method, or product) ready for improvement to yield predictable results; The prior art contained a "base" device (method, or product) upon which the claimed invention can be seen as an "improvement” (using CRC improves reduces and corrects errors in transmissions, thereby reducing data that must be resent and errors). The prior art contained a known technique that is applicable to the base device (method, or product) (including CRC in transmissions is applicable to the base device, which transmits messages between the host and memory device). One of ordinary skill in the art would have recognized that applying the known technique would have yielded predictable results and resulted in an improved system (one of ordinary skill would have recognized that using CRC would have resulted in an improving the reliability of the system). See MPEP § 2143(I)(D).)) wherein the assistant information is not stored into the rewritable non-volatile memory module, and wherein an amount of data of the assistant information is less than an amount of data of the mapping information; (Kang teaches: “the controller map data MAP_C further includes a consecutive physical address number nCPA, as shown in MAP_C_1. In the present embodiment, the consecutive physical address number nCPA is included in a physical address PA, as shown in MAP_C_2” Kang paragraph 0385. “When a plurality of physical addresses PA corresponding to a plurality of consecutive logical addresses LA are consecutive, the controller 130 may generate the consecutive physical address number nCPA of each consecutive physical addresses, respectively. That is, when the physical addresses ‘PA5 to PA14’ corresponding to the consecutive logical addresses LA1 to LA10 are all consecutive, the controller 130 may generate the consecutive physical address number nCPA for each of the consecutive physical addresses PA5 to PA14, respectively.” Kang paragraph 0386. “Referring to FIG. 27C, the consecutive physical address number nCPA of the physical address PA5 is ‘+9’. It means that the number of consecutive physical addresses which are consecutive with the physical address PA5 is ‘9’, That is, there are nine consecutive physical addresses which are consecutive with the physical address PA5, as shown in the MAP_C_1. As shown in the MAP_C_2, the consecutive physical address number nCPA of ‘+9’ may be included in the physical address PA5 corresponding to the logical addresses LA1 thereby having a form of ‘5+9’.” Kang paragraph 0387. See also Kang figure 27C. “Referring to FIG. 27D, the memory system 110 transmits the controller map data MAP_C including a plurality of L2P map information, to the host 102. Each of the L2P map information includes a logical address LA, a physical address PA and the consecutive physical address number nCPA. The consecutive physical address number nCPA is the number of physical addresses that are consecutive with the physical address PA.” Kang paragraph 0388. “As shown in FIG. 27D, a logical information LA_INF includes a reference logical address LA_REF and a logical address range LA_R. The logical information LA_INF is for indicating the plurality of logical addresses included in the first logical address LA_1. The plurality of logical addresses in the first logical address LA_1 may be indicated by one reference logical address LA_REF and a logical address range LA_R which are consecutive with the reference logical address LA_REF.” Kang paragraph 0392. See also figure 27C. “the memory system 110 generates and adds the consecutive physical address number nCPA for each piece of L2P map information, and uploads the consecutive physical address number nCPA to the host 102.” Kang paragraph 0460. Note that transferring the entire map (MAP_C) includes the nCPA which reads on the “assistant information” because it is merely a count of consecutive addresses. This is consistent with the explanation of “assistant information” in the Specification. See Fig. 10 and accompanying description. Note also that since Kang describes the memory system 119 as generating and then add the nCPA for transmission to the host (Kang ¶ 460 cited above), the reference is found to teach sending the nCPA information to the host but not storing the nCPA on the NVM module. While the reference expressly teaches sending the entire MAP_C to the host (including the nCPA), in the interest of compact prosecution the reference does not clearly articulate replacing addresses (where applicable) with logical or physical address combined with the nCPA, which appears to be the desired claim scope. The reference would be understood by one of ordinary skill in the art as teaching replacing data in the maps with the smaller nCPA as a form of compression. “[I]n considering the disclosure of a reference, it is proper to take into account not only specific teachings of the reference but also the inferences which one skilled in the art would reasonably be expected to draw therefrom.” MPEP § 2144.01. Examiner finds that one of ordinary skill in the art would understand the sending of compressed data as a teaching of replacing the larger uncompressed data, and would not understand Kang to teach sending both uncompressed and compressed data together. In the interest of compact prosecution, an obvious rationale is provided in addition to the rejection based on the understanding of one of ordinary skill in the art. Replacing the logical addresses sent to the host with a combination of a starting addresses and nCPA would have been obvious to one of ordinary skill in the art before the effective filing date as an instance of applying a known technique to a known device (method, or product) ready for improvement to yield predictable results; The prior art contained a "base" device (method, or product) upon which the claimed invention can be seen as an "improvement” (the improvement being the use of a first address and a number of sequential mappings being used to represent addresses sent between the host and controller, effectively compressing the sending of addresses sent between the devices). The prior art contained a known technique that is applicable to the base device (method, or product) (the prior art teaches compressing the addresses sent between the host and controller). One of ordinary skill in the art would have recognized that applying the known technique would have yielded predictable results and resulted in an improved system (one of ordinary skill would have recognized that sending the addresses in compressed format in both directions (both from the host to the controller and from the controller to the host) would have yielded predictable results and resulted in an improved system). See MPEP § 2143(I)(D).) transmitting at least one logical address, the assistant information and the verification information to the host system to provide information related to the storing of the first data, wherein the logical address is mapped to physical addresses, and wherein the assistant information includes address information generated through encoding. (One of ordinary skill in the art would understand the logical addresses taught in Kang as excluding physical addresses. “[I]n considering the disclosure of a reference, it is proper to take into account not only specific teachings of the reference but also the inferences which one skilled in the art would reasonably be expected to draw therefrom.” MPEP § 2144.01. Further, the claimed “address information” reads on the physical address sent with the nCPA as the starting point for consecutive addresses, taught in Kang. Kang teaches: “Referring to FIG. 27D, the memory system 110 transmits the controller map data MAP_C including a plurality of L2P map information, to the host 102. Each of the L2P map information includes a logical address LA, a physical address PA and the consecutive physical address number nCPA. The consecutive physical address number nCPA is the number of physical addresses that are consecutive with the physical address PA.” Kang paragraph 0388. “[T]he memory system 110 generates and adds the consecutive physical address number nCPA for each piece of L2P map information, and uploads the consecutive physical address number nCPA to the host 102.” Kang paragraph 0460. With respect to “transmitting . . . the verification information, see Mehta cited above.) 2. The mapping information management method according to claim 1, further comprising: receiving a read command instructing reading of the first data from the host system; obtaining a second part information of the mapping information and the assistant information from the host system according to the read command; (“The host 102 may transmit the L2P map information, including the consecutive physical address number nCPA inputted from the memory system 110, to the memory system 110 together with the read request RD_REQ.” Kang paragraph 0460.) and sending a read command sequence configured for reading the first data from the rewritable non-volatile memory module according to the second part information of the mapping information and the assistant information obtained from the host system. (As described above, according to the embodiment illustrated in FIGS. 32A and 32B, the controller 130 may perform the random read operation on the second physical address PA_2 searched through the L2P conversion operation, instead of the consecutive physical address inputted from the host 102.” Kang paragraph 0467. See also Kang paragraphs 0460 to 0466 explaining more complex details of how the read operation is performed and not pasted here for brevity.) 3. The mapping information management method according to claim 2, wherein the step of sending the read command sequence according to the second part information of the mapping information and the assistant information obtained from the host system further comprises: obtaining the information related to the storing of the first data according to the second part information of the mapping information and the assistant information obtained from the host system; and sending the read command sequence instructing the reading of the first data from the rewritable non-volatile memory module according to the information. (See rejection of claim 2.) 4. The mapping information management method according to claim 1, wherein the write command instructs storing of the first data to a first logical address, (“the controller 130 may program and store user data and metadata corresponding to the write commands received from the host 102” Kang paragraph 0159. “when the host 102 transmits an access request for a plurality of logical addresses to the memory system 110, the host 102 does not transmit the plurality of logical addresses to the memory system 110 a plurality of times. The host 102 according to the present embodiment may request access to the plurality of logical addresses by transmitting the reference logical address LA_REF and the logical address range LA_R to the memory system 110 one time. In other words, the logical information LA_INF and the physical information PA_INF may be included in one access request ACESS_REQ inputted from the host 102.” Kang paragraph 0403) the first write command sequence instructs storing of the first data to a first physical address mapped by the first logical address, and the updated mapping information reflects a mapping relationship between the first logical address and the first physical address. (“the controller 130 may generate and update meta segments of the metadata, that is, L2P segments and P2L segments out of the map segments of the map information, and then store them in the memory blocks of the memory device 150.” Kang paragraph 0162.) 5. The mapping information management method according to claim 1, wherein the assistant information comprises consecutive information, and the consecutive information reflects whether a plurality of physical units mapped by a plurality of consecutive logical addresses in a second part information of the mapping information are consecutive. (“When a plurality of physical addresses PA corresponding to a plurality of consecutive logical addresses LA are consecutive, the controller 130 may generate the consecutive physical address number nCPA of each consecutive physical addresses, respectively. That is, when the physical addresses ‘PA5 to PA14’ corresponding to the consecutive logical addresses LA1 to LA10 are all consecutive, the controller 130 may generate the consecutive physical address number nCPA for each of the consecutive physical addresses PA5 to PA14, respectively.” Kang paragraph 0386. “Referring to FIG. 27C, the consecutive physical address number nCPA of the physical address PA5 is ‘+9’. It means that the number of consecutive physical addresses which are consecutive with the physical address PA5 is ‘9’, That is, there are nine consecutive physical addresses which are consecutive with the physical address PA5, as shown in the MAP_C_1. As shown in the MAP_C_2, the consecutive physical address number nCPA of ‘+9’ may be included in the physical address PA5 corresponding to the logical addresses LA1 thereby having a form of ‘5+9’.” Kang paragraph 0387.) 6. The mapping information management method according to claim 1, wherein The assistant information further comprises verification information, and the verification information is configured to verify a second part information of the mapping information and the assistant information. (Mehta teaches the benefit of adding CRC to data before transfer “CRC stands for cyclic redundancy check. It is 2 bytes added to the end of every modbus message for error detection. Every byte in the message is used to calculate the CRC. The receiving device also calculates the CRC and compares it to the CRC from the sending device. If even 1 bit in the message is received incorrectly, the CRCs are different and result in an error.” Mehta section 9.6.9. See also Mehta section 9.6.7 and Fig. 9.22 showing messages being sent between memory/storage and a host. The motivation to combine given in the rejection of claim 1 applies here.) 7. The mapping information management method according to claim 1, wherein the assistant information transmitted to the host system is configured to reduce a total amount of data of the mapping information transmitted between the host system and the memory storage device. (See rejection of claim 1. Note also that this language is written as an intended use, at least because it suggests but does not require steps to be performed or limit to a particular structure. See MPEP §§ 2111.04 and 2103.) For claims 8-14, see rejections of claims 1-7, respectively. See also See Kang figure 2 and accompanying description for hardware recited in the device claims. For claims 15-21, see rejections of claims 1-7, respectively. See also See Kang figure 2 and accompanying description for hardware recited in the device claims. Response to Arguments Applicant's arguments filed 08/24/2025 have been fully considered but they are not persuasive. Rejections under § 112: No specific arguments are offered to address the rejection under this section. Rejections under § 103: Applicant states “Kang fail [sic] to disclose using less amount of data of nCPA with logical address and physical adress [sic] in L2P map information.” Rem. 13. As best understood, Applicant’s position is that one of ordinary skill in the art would understand Kang as teaching sending compressed data – in addition to and redundant with the uncompressed data. This requires a strained reading of prior art. Kang expressly teaches transmitting map information including “a logical address, a physical address and the consecutive physical address number nCPA. The . . . nCPA is the number of physical addresses that are consecutive with the physical address PA.” Kang ¶388. Generally, “a” refers to nouns in the singular so “a logical address” refers to one logical address. Similarly, “a physical address” refers to one physical address. Further, such a reading of Kang is inconsistent with reading the reference through the eyes of one of ordinary skill in the art. One of ordinary skill in the art would instantly recognize that sending the count of sequential address pairs is beneficial because it sends the same information regarding the address pairs, using less data. Ignoring the underlying concept taught in the reference is inconsistent with reading the reference through the eyes of one of ordinary skill in the art. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to PAUL M KNIGHT whose telephone number is (571)272-8646. The examiner can normally be reached on Monday - Friday 9-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Miranda Huang can be reached on 571 270-7092. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. PAUL M. KNIGHT Examiner Art Unit 2124 /PAUL M KNIGHT/Examiner, Art Unit 2124
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Prosecution Timeline

Jul 19, 2021
Application Filed
Jul 29, 2022
Non-Final Rejection — §103, §112
Oct 14, 2022
Response Filed
Jan 06, 2023
Final Rejection — §103, §112
Mar 15, 2023
Request for Continued Examination
Mar 20, 2023
Response after Non-Final Action
Jul 11, 2023
Final Rejection — §103, §112
Oct 06, 2023
Request for Continued Examination
Oct 16, 2023
Response after Non-Final Action
Nov 28, 2023
Final Rejection — §103, §112
Jan 23, 2024
Interview Requested
Feb 05, 2024
Applicant Interview (Telephonic)
Feb 05, 2024
Examiner Interview Summary
Feb 27, 2024
Request for Continued Examination
Feb 29, 2024
Response after Non-Final Action
May 18, 2024
Non-Final Rejection — §103, §112
Aug 14, 2024
Response Filed
Oct 03, 2024
Final Rejection — §103, §112
Dec 26, 2024
Request for Continued Examination
Jan 07, 2025
Response after Non-Final Action
Feb 04, 2025
Final Rejection — §103, §112
Apr 23, 2025
Request for Continued Examination
May 02, 2025
Response after Non-Final Action
May 29, 2025
Non-Final Rejection — §103, §112
Aug 24, 2025
Response Filed
Oct 06, 2025
Final Rejection — §103, §112
Apr 16, 2026
Response after Non-Final Action

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

10-11
Expected OA Rounds
62%
Grant Probability
80%
With Interview (+17.6%)
3y 1m
Median Time to Grant
High
PTA Risk
Based on 272 resolved cases by this examiner. Grant probability derived from career allow rate.

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