Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
1. The amendment filed 08/12/2026 has been received and considered. Claims 6, 9-10, 13-14, and 16-17 are presented for examination.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
2. Claims 6, 9, 10, 13, 14, 16, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over David (US 10734293 B2), further in view of Pandev et al. (US 20180252514 A1) and further in view of Nabeth (US 2017/0287754 A1).
As per Claim 6, David teaches a method for calibrating a metrology apparatus in a lithography system (Fig. 11, col. 9 lines 36-39, col. 21 lines 63-67), comprising:
collecting, by a sensor in a metrology apparatus (Fig. 11 element 1102 -> 1106; Col. 7 lines 38-49, “sensor arrangement”, Col. 11 lines 19-36: the optical response from optical markers on the substrate is measured by a sensor arrangement, the measured patterns being located within the scribe lanes of the substrate), optical measurements from light diffracted from a target positioned on a substrate (Col. 6 lines 5-7, “metrology data can be collected during etch processes. Optical emissions spectra or spectral data from photoluminescence can be utilized as input data.” Col. 7 lines 64-67, Col. 8 lines 1-5, “For DBO, a first diffraction grating pattern is located on the pattern layer, and a second diffraction grating pattern with identical pitch is located in the resist layer. The second grating should be nominally on top of the first grating, and by measuring the intensity of the diffraction patterns, an overlay measurement may be obtained. If there is an overlay error between the two gratings, it will be detectable in the diffraction pattern”; Col. 9 lines 54-67 “In step 604, the parameters that are useful in evaluating the target are identified, and in step 606, input data relevant to the parameters is collected. Every set of input data is associated with a specific output or target. For example, a set of measured and observed values can be associated with an overlay offset. Those values would be an input vector to the model, and would be associated with the target, e.g., the measured offset. If there are n input variables, then the input vector size for each target would be 1×n. Therefore, if there are m targets, there will be an input data matrix of size m×n, with each row of the input data matrix associated with a target.”; Col. 10 lines 21-40 “overlay measurement (e.g., IBO measurement, DBO measurement, CD-SEM, TEM, etc.)”; Col. 11 lines 40-50, Col. 22 lines 10-34, “These input parameters can include metrology measurements from process steps or metrology measurements collected during the wafer fabrication process. These measurements can include optical reflectomety or ellipsometry data, and the intensity of each measurement at a given wavelength. The metrology data can be incorporated from a reflectometry measurement taken after a certain processing step (for example, CMP or Etch, or Gap Fill processes).”, Fig. 3B & 5B: the diffraction based overlay target has a first diffraction grating pattern and a second diffraction grating pattern of identical pitch),…;
augmenting, by one or more computer systems, a set of measurements used to create a lithography system metrology process model with the optical measurements from light diffracted from the plurality of targets to create an updated dataset (Fig. 11 element 1108 -> 1114; Col. 18 lines 1-15, 43-67, and lines 57-60; Col. 19 lines 1-8 “From the original input data, a set of virtual metrology models may be constructed.”, “The model will continue to be re-trained at user-defined intervals (for example, once a week) as new data is made available. To retrain the model, the entire dataset available may be used.”; col. 26 lines 8-27, “a second set of the real-time inputs”; Col. 26 lines 29-35, “additional real-time inputs from processes”), wherein the set of measurements used to create the lithography system metrology process model contains a set of scanning electron microscopy (SEM) measurements measured on a set of devices and/or targets and a set of corresponding optical measurements measured on the set of devices and/or targets (Col. 10 lines 21-40 “overlay measurement (e.g., IBO measurement, DBO measurement, CD-SEM, TEM, etc.)”, Col. 15 lines 50-67, Col. 16 lines 1- 6 “ CD measurements… parameters of other overlay measurements such as DBO and IBO… are used as inputs to the training model”; col. 26 lines 8-27, “a first set of the real-time inputs”: the newly collected metrology data is added to the entire available dataset that is used for retraining; col. 4 lines 6-14 “Recent advances in computing technologies and data analysis techniques, such as performing parallel processing on a massive scale, has led to progress in machine learning algorithms”: the machine learning algorithms that build the model rely on computing technologies with parallel processing capabilities that allow much larger datasets to be processed, that is, on computer systems; col. 16 line 67 - col. 17 line 1 “implemented in analytics platforms such as IBM SPSS Modeler”: the models are implemented on a software analytics platform, that is, on a computer system), wherein the set of measurements used to create the lithography system metrology process model contains a set of scanning electron microscopy (SEM) measurements measured on a set of devices and/or targets and a set of corresponding optical measurements measured on the set of devices and/or targets (col. 9 lines 40-43 “the target is an overlay measurement (e.g., IBO measurement, DBO measurement, CD-SEM, TEM, etc.)”: the training target values may be CD-SEM measurements; col. 16 lines 28-31 “One approach specifies the target as the delta between the DBO measurement and CD-SEM measurement. The error associated between DBO and CD-SEM or TEM can be attributed to an input dataset and corrected in production”: the training set pairs the optical DBO measurement with the CD-SEM measurement of the same structure; col. 16 lines 3-5 “The location on the wafer of the actual overlay measurement is matched with the location of all of the input parameters for that site”: each target measurement is matched with the optical input measurements of the same site);
retraining, by the one or more computer systems, the lithography system metrology process model configured to map optical measurements to SEM measurements using the updated dataset to create an updated lithography system metrology process model (col. 13 lines 19-21 “As new input data and corresponding target data is generated, the algorithm can be retrained so as to produce a better model that will give better scores”: the model (i.e., the “lithography system metrology process model” as claimed) mapping the optical input data to the CD-SEM target data is retrained on the enlarged dataset to produce a better model; col. 18 lines 43-46: all data collected up to that point is used to retrain the model; col. 22 line 66 - col. 23 line 3 “the data is then fed into one or more algorithms for training”: given the training input data and training targets, the algorithm produces a model in step 1114 which is deployed in step 1116 to act on real time data). In particular, David teaches a method of creating, deploying and periodically retraining a machine learning model that maps optical metrology measurements of overlay targets on a wafer to CD-SEM reference measurements of the same sites, in which newly collected metrology data is added to the entire available dataset and the model is retrained on that dataset.
However, David fails to teach explicitly wherein at least two targets in the plurality of targets are designed with predetermined different duty cycles;
wherein:
the updated lithography system metrology process model is specific to different regions of the substrate based on target clusters distributed at different locations on the substrate;
each of the target clusters comprises a combination of targets of the plurality of targets;
each of the different regions of the substrate corresponds to a location on the substrate at which one of the target clusters is distributed; and
generating, by the one or more computer systems, a metrology recipe for measuring a property of another target on another substrate during a lithography manufacturing process by inputting optical measurements into the updated lithography system metrology process model.
Pandev teaches wherein at least two targets in the plurality of targets are designed with predetermined different duty cycles ([0052] “Each measurement site includes one or more metrology targets fabricated with programmed overlay variations and known process variations”: the training targets at the different measurement sites of the DOE wafer are fabricated with known process variations, that is, the known process settings, such as the exposure dose of [0073], differ from site to site; [0064]-[0065] “The programmed overlay may have different values within a field of a DOE wafer, between different fields of a DOE wafer, or between different DOE wafers”: the programmed overlay variations are placed within a field or between fields of the same DOE wafer; [0069]: the known process and structural-parameter variations of the DOE wafer are determined as a function of location on the wafer; [0072]-[0073] “the DOE wafer set includes a large range of programmed values of critical dimension (CD) of a bottom grating structure. The bottom grating structure is repeatedly fabricated with different lithography dosage values”: the grating targets are designed with a predetermined range of different critical dimensions, that is, different line widths at the grating pitch (i.e., different “duty cycles” as claimed); [0119]: programmed variations of critical dimension and pitch walk are provided in the training targets) and
generating, by the one or more computer systems, a metrology recipe for measuring a property of another target on another substrate during a lithography manufacturing process by inputting optical measurements into the updated lithography system metrology process model ([0029]-[0030], [0033], [0035], [0064], [0076], [0112] “the trained model is employed as the measurement model for measurement of other targets having unknown overlay values”: the trained model is the measurement procedure (i.e., the “metrology recipe” as claimed) applied to further targets, its data processing being executed by one or more processors of the computing system; [0113] “the metrology targets are disposed on a different wafer from the wafer(s) used to generate the training data. The measurements are typically performed at the same or similar process step as the training wafer(s)”: the further targets measured with the trained model are on another wafer at the same process step of manufacture; [0121]: the trained model estimates overlay and additional parameters such as critical dimension from the measurement data collected from a target; [0132]: the model is created and ready for use immediately after the DOE wafer spectra are collected by the system; [0139]: the values determined with the measurement model are fed back to the lithography tool during processing). In particular, Pandev teaches training an overlay measurement model from scatterometry signals of a plurality of grating targets fabricated on a wafer with programmed, predetermined variations of overlay and of critical dimension, and then employing the trained model as the measurement model for targets of unknown value on other wafers at the same process step.
Furthermore, Nabeth teaches the updated lithography system metrology process model is specific to different regions of the substrate based on target clusters distributed at different locations on the substrate ([0063] “modeling the alignment data of at least a first alignment zone of the two or more alignment zones using a first alignment model. In another embodiment, the method 200 includes a step 210 of modeling the alignment data of at least a second alignment zone of the two or more alignment zones using a second alignment model different than the first alignment model”: each zone of the wafer (i.e., the “different regions of the substrate” as claimed) has its alignment data, that is, the data of the targets located in that zone, modeled by its own model; [0058]: the analysis area of the wafer is divided into two or more alignment zones having different alignment signatures; [0065]: a separate alignment correction is generated for the fields or dies within each alignment zone);
each of the target clusters comprises a combination of targets of the plurality of targets ([0043] “the alignment data may include metrology measurements of overlay targets distributed across the sample to provide the relative positions and/or orientations of two or more printed layers on the sample”: the modeled data comes from the overlay targets distributed across the wafer; [0059] “Alignment data within each alignment signature zone may thus be grouped according to the mean alignment within a specified tolerance”: the alignment data of the targets located within each zone are grouped together as the data set of that zone; [0071]: targets are located at multiple sites on the wafer, within the scribe lines and in the dies); and
each of the different regions of the substrate corresponds to a location on the substrate at which one of the target clusters is distributed ([0059] “zone boundaries may be defined at radius values of 75 and 155”: each zone is the area of the wafer at the radial location of the group of targets (i.e., a “target cluster” as claimed) whose data it contains; [0045]: measurements performed near the edge of the wafer are expected to have different statistical characteristics than measurements performed in the central regions; [0064]: alignment is measured at multiple locations within each field of the wafer). In particular, Nabeth teaches dividing a wafer into zones, each zone containing the overlay or alignment targets measured at the locations within that zone, and modeling the metrology data of each zone with a separate model, so that the model is specific to the region of the wafer in which its group of targets is located.
David, Pandev, and Nabeth are analogous art because they are all from the same field of endeavor as the claimed invention, metrology for determining a parameter of a process to create a pattern on a substrate, such as overlay, alignment, or critical dimension (In re Bigio, 381 F.3d 1320, 1325 (Fed. Cir. 2004)).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of cited references. Thus, one of ordinary skill in the art before the effective filing date of the claimed invention would have been motivated to incorporate Pandev and Nabeth into David s invention for the purpose of creating and deploying a model to evaluate a semiconductor manufacturing process in order to correct for overlay and CD errors in a lithographic process to provide an improved measurement system which achieves accurate measurements and sufficiently accurate tool matching (Pandev et al.: Abstract, [0002], [0020], [0052]) and to provide a more accurate determination of alignment across the entire sample than modeling the entire sample with a single model, the alignment residual across the sample being reduced (Nabeth: [0066]).
As per Claim 9, David teaches further comprising: measuring a parameter of a semiconductor process (Col. 18 lines 27-55 “Once a model or multi-step model and associated parameters are chosen…”. “the predicted error”; col. 22 lines 23-28; col. 16 lines 41-43 “The input data is then normalized or transformed. For example, in the case of tool calibration, the data may need to be mean shifted”: the measured input data of the process is normalized and the metrology measurements collected during the wafer fabrication process, such as the reflectometry intensity at a given wavelength, are measured as input parameters); and
determining a distance between the parameter of the semiconductor process and a statistical representation of the set of measurements used to create the lithography system metrology process model (Col. 7 lines 39-48 “overlay measurement using an optical inspection system”; Col. 18 lines 27-55 “the defined limits”, “the specified error limit (predicted—actual overlay) for a user-specified period of time (for example, 8 weeks of production), then the model is allowed to replace some of the actual overlay measurements used in actual production.”; col. 13 lines 37-41 “a z-score can be generated to compensate for drift and shift in the data. For example if a tool is calibrated, the input data may shift. If a shift occurs, this may change the overall mean and standard deviation of the input data”: the z-score measures the deviation of the input data from the mean and standard deviation of the input data set; col. 16 lines 54-56 “the same transformation will need to be applied once production commences”: the normalization derived from the training input data set is applied to the parameters measured in production; col. 16 lines 43-45 “A z-score can also be calculated from the input data set for different populations or distributions within a given input data set”: the z-score is computed relative to the mean and standard deviation of the training input data set: Examiner's Note - A z-score is the difference between a measured value and the mean of a data set, divided by the standard deviation of that data set. The mean and standard deviation of the input data set used to train the model (col. 13 lines 39-41) are a statistical representation of the set of measurements used to create the model, and the z-score of a newly measured parameter is a distance between that parameter and that statistical representation.).
As per Claim 10, David teaches The method of claim 6, wherein the retraining preserves the set of measurements used to create the lithography system metrology process model (Col.18 lines 43-67, Col. 19 lines 1-23. “If instead the model is not predicting within the defined limits as compared to actual measured overlay error, then all data collected up to that point is used to retrain the model as outlined in the above steps…To retrain the model, the entire dataset available may be used.”, “The model will continue to be re-trained at user-defined intervals (for example, once a week) as new data is made available. To retrain the model, the entire dataset available may be used.”: the previously collected training data is kept and used again in the retraining and the entire available dataset, including the original training set, is used to retrain).
As per Claim 13, David fails to teach explicitly further comprising measuring a structure on the other substrate using the metrology recipe.
Pandev teaches measuring a structure on the other substrate using the metrology recipe ([0113] “The measured metrology target(s) have unknown overlay error. Typically, the metrology targets are disposed on a different wafer from the wafer(s) used to generate the training data”: the targets on the other wafer are measured using the trained measurement model; [0103] “Once the model is trained, it may be used to perform measurements of structures having unknown overlay”: structures of unknown overlay are measured using the trained model).
As per Claim 14, David teaches further comprising: mapping, by the one or more computer systems, the set of corresponding optical measurements to the set of SEM measurements using a regression algorithm to create the lithography system metrology process model (col. 10 lines 1- 60 “Every set of input data is associated with a specific output or target.”; col. 14 lines 1-6 “some of these algorithms that can be used include: Decision Trees, CART (Classification and Regression Trees), C5.0, C4.5, CHAID, Support Vector Regression”: the model mapping the input data to the target data may be trained with a regression algorithm such as Support Vector Regression or CART; col. 17 lines 52-53 “Linear regression is another technique”: linear regression is used to build the model; col. 16 lines 28-31: the optical DBO measurements are mapped to the CD-SEM measurements as the target), wherein the set of SEM measurements and the set of corresponding optical measurements are measured on the same devices and/or targets (Col. 15 lines 50-67, Col. 15 lines 1-30, “the target as the delta between the DBO measurement and CD-SEM measurement. The error associated between DBO and CD- SEM or TEM can be attributed to an input dataset and corrected in production.”; col. 16 lines 3-5; col. 16 lines 28-31; Col. 22 lines 18-32, “the input data to the algorithm can be input data from any or all processes performed during wafer fabrication…. These input parameters can include metrology measurements from process steps or metrology measurements collected during the wafer fabrication process.”: the actual overlay measurement of a site is matched with the input parameters measured at that same site; the DBO measurement and the CD-SEM measurement of the same structure are paired).
As per Claim 16, David fails to teach explicitly wherein the metrology recipe includes selection of at least one of: polarization, wavelength, apertures, and wafer rotation.
Pandev teaches wherein the metrology recipe includes selection of at least one of: polarization, wavelength, apertures, and wafer rotation ([0014], [0055]- [0056] “wavelength selection device 102 is controlled by computing system 130. In these embodiments, computing system 130 is configured to communicate control commands indicative of a desired wavelength or range of wavelengths to wavelength selection device 102. In response, wavelength selection device 102 selectively passes the desired wavelengths or ranges of wavelengths… polarization control device 104 is controlled by computing system 130. In these embodiments, computing system 130 is configured to communicate control commands indicative of a desired polarization to polarization control device 104. In response, polarization control device 104 selectively polarizes the illumination light to achieve the desired polarization state”, “system 100 may include one or more computing systems 130 employed to perform overlay measurements based on trained measurement models”; [0060], [0076] “the collected optical signals could include signals from multiple wavelengths and multiple polarizations”: the measurement model is built and used on signals collected at multiple illumination wavelengths and polarizations and the computing system selects the illumination wavelength of the measurement).
As per Claim 17, David fails to teach explicitly wherein the different locations on the substrate include edge regions and center regions.
Nabeth teaches wherein the different locations on the substrate include edge regions and center regions ([0045] “alignment data based on alignment measurements performed near the edge a sample may be expected to exhibit different statistical characteristics than alignment data based on alignment measurements performed in central regions of the sample”: the measured target locations include the edge of the wafer and the central regions of the wafer; [0059]: the zones are defined by radius values, the outermost zone lying at radius values greater than 155).
Response to Arguments
3. Applicant's arguments filed 08/12/2026 have been fully considered but they are not persuasive.
Examiner respectfully withdraws Claim Objections in view of the amendment and/or applicant’s arguments.
Examiner respectfully withdraws Claim Rejections - 35 USC § 112 in view of the amendment and/or applicant’s arguments.
Applicant’s arguments with respect to claims have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument – in view of Nabeth (US 2017/0287754 A1).
As per the applicant’s argument regarding:
“A. David in view of Pandev and Pandev '055 fails to teach or suggest “the updated lithography system metrology process model is specific to different regions of the substrate based on target clusters distributed at different locations on the substrate” where “each of the different regions of the substrate corresponds to a location on the substrate at which one of the target clusters is distributed” as claimed”:
The rejection set forth below no longer relies on Pandev '055. Nabeth is now applied for the limitations of claim 6 that the updated model is specific to different regions of the substrate based on target clusters distributed at different locations on the substrate, that each target cluster comprises a combination of targets of the plurality of targets, and that each region corresponds to the location of one of the target clusters (Nabeth: [0043]; [0058]-[0059]; [0063]-[0066]). Nabeth divides the wafer into alignment zones, each zone containing the alignment targets measured at the locations within that zone, and models the data of each zone with a separate model ([0063]).
As per the applicant’s argument regarding:
“B. David in view of Pandev and Pandev '055 fails to teach or suggest “collecting, by a sensor in the metrology apparatus, optical measurements from light diffracted from a plurality of targets positioned on a substrate, wherein at least two targets in the plurality of targets are designed with predetermined different duty cycles” as claimed”
In response to applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986). Examiner relies on the teaching in David to teach the limitation of “collecting, by a sensor in the metrology apparatus, optical measurements from light diffracted from a plurality of targets positioned on a substrate” while Pandev is relied upon for a teaching of “wherein at least two targets in the plurality of targets are designed with predetermined different duty cycles “. In particular, David measures the optical response of the overlay patterns located within the scribe lanes of the wafer using a sensor arrangement (col. 7 lines 38-48) while Pandev states that the programmed variations “may have different values within a field of a DOE wafer, between different fields of a DOE wafer, or between different DOE wafers” ([0065]) and that the variations “are organized in a Design of Experiments (DOE) pattern on the surface of a semiconductor wafer” so that “the measurement sites interrogate different locations on the wafer surface” ([0066]), and its training targets at each measurement site are “fabricated with programmed overlay variations and known process variations” ([0052]), those variations being characterized as a function of location on the DOE wafer ([0069]). The programmed critical dimension range of the bottom grating structure ([0073]) is therefore laid out across the targets of a single wafer, and, under the reading of “duty cycle” set out in the Examiner's Note below (grating line width, that is, critical dimension, over pitch), gratings printed from the same grating pattern with different programmed critical dimensions are gratings designed with different duty cycles ([0073], [0119]). The combination, not Pandev alone, provides at least two targets of different predetermined duty cycle on one substrate.
As per the applicant’s argument regarding:
“C. The proffered rationale to combine the teachings of David, Pandev, and Pandev '055 is insufficient”
In response to applicant’s argument that there is no teaching, suggestion, or motivation to combine the references, the examiner recognizes that obviousness may be established by combining or modifying the teachings of the prior art to produce the claimed invention where there is some teaching, suggestion, or motivation to do so found either in the references themselves or in the knowledge generally available to one of ordinary skill in the art. See In re Fine, 837 F.2d 1071, 5 USPQ2d 1596 (Fed. Cir. 1988), In re Jones, 958 F.2d 347, 21 USPQ2d 1941 (Fed. Cir. 1992), and KSR International Co. v. Teleflex, Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007). In this case, the motivation is found in the references themselves. David states its aim of creating and deploying a model to evaluate a semiconductor manufacturing process in order to correct for overlay and CD errors in a lithographic process (col. 9 lines 36-39), and David trains that model on optical metrology measurements of targets on the wafer. Pandev states that training the measurement model on targets fabricated with programmed variations yields a model that “is trained to separate actual overlay from process variations and metrology system variations” so that its estimates “are consistent and accurate across a range of illumination wavelengths without target design optimization” ([0052]), which is the very error source David seeks to correct thus to provide an improved measurement system which achieves accurate measurements and sufficiently accurate tool matching (Pandev et al.: Abstract, [0002], [0020]). Nabeth states that modeling the zones of a wafer with separate models “may facilitate a more accurate determination of alignment across the entire sample than modeling the entire sample with a single model” ([0066]), which is the improvement David's retrained model seeks. The rejection below articulates this reasoning for each combination step; it does not rest on a conclusory statement.
As per the applicant’s argument regarding: “D. Dependent claim 9”
It is noted that the rejection of claim 9 above does not rely on the comparison of predicted overlay to actual overlay within an error limit. Claim 9 is rejected over the z-score processing of David. In particular, David generates a z-score of newly collected input data against the mean and standard deviation of the input data set used to train the model (col. 13 lines 37-41; col. 16 lines 41-45; col. 16 lines 54-56). The mean and standard deviation of the training input data set are a statistical representation of the set of measurements used to create the model, and the z-score of a newly measured process parameter is the distance between that parameter and that statistical representation, expressed in standard deviations. Applicant's remaining contention that David compares a prediction to an actual measurement is not directed to the portions of David now applied.
Therefore arguments are not persuasive, and the rejection under 35 U.S.C. 103 is maintained as set forth in the Office Action.
Conclusion
4. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Pandev (US 9,721,055 B2) teaches a cross-wafer measurement model that characterizes a specimen parameter value as a function of location on the wafer and links the parameter values of measurement sites at the same distance from the wafer center.
Volkovich (US 2019/0088514 A1) teaches metrology recipe setup using zonal analysis of setup parameters and metrology metrics that vary spatially across the zones of a wafer.
5. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
6. Any inquiry concerning this communication or earlier communications from the examiner should be directed to EUNHEE KIM whose telephone number is (571)272-2164. The examiner can normally be reached Monday-Friday 9am-5pm ET.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ryan Pitaro can be reached at (571)272-4071. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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EUNHEE KIM
Primary Examiner
Art Unit 2188
/EUNHEE KIM/Primary Examiner, Art Unit 2188
Prosecution Insights