Prosecution Insights
Last updated: April 19, 2026
Application No. 17/420,915

PRODUCT-SUM OPERATION DEVICE, LOGICAL OPERATION DEVICE, NEUROMORPHIC DEVICE, AND PRODUCT-SUM OPERATION METHOD

Final Rejection §103§112
Filed
Jul 06, 2021
Examiner
VILLANUEVA, MARKUS ANTHONY
Art Unit
2151
Tech Center
2100 — Computer Architecture & Software
Assignee
TDK Corporation
OA Round
4 (Final)
52%
Grant Probability
Moderate
5-6
OA Rounds
3y 8m
To Grant
99%
With Interview

Examiner Intelligence

Grants 52% of resolved cases
52%
Career Allow Rate
21 granted / 40 resolved
-2.5% vs TC avg
Strong +50% interview lift
Without
With
+50.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 8m
Avg Prosecution
41 currently pending
Career history
81
Total Applications
across all art units

Statute-Specific Performance

§101
24.3%
-15.7% vs TC avg
§103
39.5%
-0.5% vs TC avg
§102
11.7%
-28.3% vs TC avg
§112
24.0%
-16.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 40 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment The amendment filed 08 December 2025 has been entered. Claims 10, 12, 14, 16, 18, 20, 22-23, 25-26, 28-29 remain pending in the application. Examiner’s Remark Regarding the “product operation elements” limitation, should Applicant not want to invoke 35 USC 112(f), or pre-AIA 35 U.S.C. 112, sixth paragraph, Examiner suggests amending claim limitations to recite “product operation circuits” as the courts have found the term “circuit”, combined with a description of the function of the circuit, connoted sufficient structure to one of ordinary skill in the art. See MPEP 2181(I)(A). Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph: (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitations are: “product operation elements” as first recited in claim 10. The term “element” has been interpreted as a generic placeholder. See MPEP 2181.I.A. Furthermore, these “elements” are modified by functional language, not modified by structure or acts for performing the claimed function. Because these claim limitations are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, they are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. If applicant does not intend to have these limitations interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitations to avoid them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitations recite sufficient structure to perform the claimed function so as to avoid them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. Specification The specification is objected to as failing to provide proper antecedent basis for the claimed subject matter. See 37 CFR 1.75(d)(1) and MPEP § 608.01(o). Correction of the following is required: the recitation of “product operation elements” in claim 10, and by reasons of dependence those claims which depend on claim 10, lack antecedent basis from the specification. Examiner suggests amending the Claims as described in the Examiner’s Remarks section to also overcome the specification objection. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 10, 12, 14, 16, 18, 20, 22-23, 25-26, 28-29 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Regarding the limitation “product operation elements” as first recited in claim 10. The written description fails to disclose the product operation elements. Claims 12, 14, 16, 18, 20, 22-23, 25-26, and 28-29 inherit the same deficiency as claim 10 and are similarly rejected. These limitations invoke 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, the written description fails to provide adequate written description of the corresponding structure, material, or acts for performing the entire claimed functions of these limitations. See rejection under 35 U.S.C. 112(b) below for further details as to the requirement for the written description. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 10, 12, 14, 16, 18, 20, 22-23, 25-26, 28-29 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim limitation “product operation elements” invokes 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, the written description fails to disclose the corresponding structure, material, or acts for performing the entire claimed function and to clearly link the structure, material, or acts to the function. As to the “product operation elements” in claim 10, these elements are not explicitly described in the specification or drawings. Claims 12, 14, 16, 18, 20, 22-23, 25-26, and 28-29 inherit the same deficiency as claim 10 and are similarly rejected. Applicant may: (a) Amend the claim so that the claim limitation will no longer be interpreted as a limitation under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph; (b) Amend the written description of the specification such that it expressly recites what structure, material, or acts perform the entire claimed function, without introducing any new matter (35 U.S.C. 132(a)); or (c) Amend the written description of the specification such that it clearly links the structure, material, or acts disclosed therein to the function recited in the claim, without introducing any new matter (35 U.S.C. 132(a)). If applicant is of the opinion that the written description of the specification already implicitly or inherently discloses the corresponding structure, material, or acts and clearly links them to the function so that one of ordinary skill in the art would recognize what structure, material, or acts perform the claimed function, applicant should clarify the record by either: (a) Amending the written description of the specification such that it expressly recites the corresponding structure, material, or acts for performing the claimed function and clearly links or associates the structure, material, or acts to the claimed function, without introducing any new matter (35 U.S.C. 132(a)); or (b) Stating on the record what the corresponding structure, material, or acts, which are implicitly or inherently set forth in the written description of the specification, perform the claimed function. For more information, see 37 CFR 1.75(d) and MPEP §§ 608.01(o) and 2181. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 10, 12, 14, 16, 18, 20, 22-23, 25-26, and 28-29 are rejected under 35 U.S.C. 103 as being unpatentable over Wang, Q., Tamukoh, H., & Morie, T. (2018). "A time-domain analog weighted-sum calculation model for extremely low power VLSI implementation of multi-layer neural networks." Graduate School of Life Science and Systems Engineering, Kyushu Institute of Technology. (hereinafter “Wang”) in view of US 20190138881 A1 Lin et al. (hereinafter “Lin”) in view of Morie, Takashi, et al. "An Analog-Digital Merged Neural Circuit Using Pulse Width Modulation Technique." Analog Integrated Circuits and Signal Processing 25 (2000): 319-328. (hereinafter “Morie”) further in view of Jeong, H. and Shi, L. "Memristor devices for neural networks". Topical Review. Journal of Physics D: Applied Physics. IOP Publishing. J. Phys. D.: Appl. Phys. 52 (2019) 023003 (28pp) 30 October 2018. (hereinafter “Jeong”). Regarding claim 10, Wang teaches a product-sum operation device comprising: a plurality of product operation elements (Fig. 5(b), synapse, Fig. 6, individual synapses; Pg. 13, Para. 3) configured to generate output signals (Fig. 6(b), output dendrite line from synapse array to post-neurons; Pg. 13, Para. 3) by multiplying (Pg. 5, Equation 16; Pg. 4, Para. 1; Pg. 9, Equation 34) input signals (Pg. 5, Equation 16, x i ; Pg. 9, Equation 34, x i ; Fig. 1, input spikes; Fig. 6(b) inputs from pre-neurons; Pg. 13, Para. 3) corresponding to input values (Pg. 13, Para. 3) by weighting factors (Pg. 5, Equation 16, a i ; Pg. 4, Para. 1; Pg. 9, Equation 34, w i j ( n ) ; Pg. 13, Para. 3) and output (Pg. 14, Para. 3) the output signals (Fig. 5(b), Fig. 6, synapse; Pg. 13, Para. 3); a current sensor configured to execute a current detecting process (Pg. 13, Para. 3; Pg. 14, Para. 2) in which a current output (Fig. 6(b), output dendrite line from synapse array to post-neurons; Pg. 13, Para. 3) from the plurality of product operation elements (Fig. 5(b), synapse, Fig. 6, individual synapses; Pg. 13, Para. 3) with a predetermined time delay (Pg. 4, Equation 8 and 9, θ λ β ) from input (Pg. 3, Para. 2, t i ) of the input signal (Pg. 5, Equation 16, x i ; Pg. 9, Equation 34, x i ; Fig. 1, input spikes; Fig. 6(b) inputs from pre-neurons; Pg. 13, Para. 3) and a current output (Fig. 5(b), Fig. 6, synapse; Pg. 13, Para. 3) from the plurality of product operation elements (Fig. 5(b), synapse, Fig. 6, individual synapses; Pg. 13, Para. 3) at a predetermined time interval (Pg. 5, Para. 1, T i n ) thereafter are detected in a time span (Pg. 4, Para. 7, t v m a x , t v m i n ) from a first transient response (Fig. 1, V n t ; Pg. 3, Para. 1) being converged to a steady state (Pg. 3, Para. 2) to before occurrence of a second transient response (Fig. 1, i n ( t ) ; Pg. 3, Para. 1), the first transient response (Fig. 1, V n t ; Pg. 3, Para. 1) being due to charging (Abstract; Pg. 12, Para. 2; Pg. 13, Para. 1, 3; Pg. 14, Para. 2) to a parasitic capacitance (Fig. 6(b), C a l ,   C d l ; Pg. 14, Para. 2; Pg. 13, Para. 3) of the product operation elements (Fig. 5(b), synapse, Fig. 6, individual synapses; Pg. 13, Para. 3) by input (Pg. 3, Para. 2, t i ) of the input signal (Pg. 5, Equation 16, x i ; Pg. 9, Equation 34, x i ; Fig. 1, input spikes; Fig. 6(b) inputs from pre-neurons; Pg. 13, Para. 3) and the second transient (Fig. 1, i n ( t ) ; Pg. 3, Para. 1) response being due to discharging (Abstract; Pg. 14, Para. 2) from the parasitic capacitance (Fig. 6(b), C a l ,   C d l ; Pg. 14, Para. 2; Pg. 13, Para. 3) of the product operation elements (Fig. 5(b), synapse, Fig. 6, individual synapses; Pg. 13, Para. 3) by input (Pg. 3, Para. 2, t i ) of the input signal (Pg. 5, Equation 16, x i ; Pg. 9, Equation 34, x i ; Fig. 1, input spikes; Fig. 6(b) inputs from pre-neurons; Pg. 13, Para. 3); and an adder (Fig. 6(b) and 6(c), comparator; Pg. 14, Para. 3; Note: the “comparator” of Wang performs the same functionality as the “adder” as claimed) configured to calculate a value (Fig. 6(b) and 6(c), V o u t   i ) relating to a total sum (Pg. 13, Para. 3; Pg. 14, Para. 1) of the output signals (Fig. 5(b), Fig. 6, synapse; Pg. 13, Para. 3) based on currents detected (Fig. 6(b), output dendrite line from synapse array to post-neurons; Pg. 13, Para. 3) at the predetermined time intervals (Pg. 5, Para. 1, T i n ) by the current sensor, and the current sensor ends the current detecting process (Pg. 13, Para. 3; Pg. 14, Para. 2) in a case in which a current detected (Fig. 6(b), output dendrite line from synapse array to post-neurons; Pg. 13, Para. 3) in the current detecting process (Pg. 13, Para. 3; Pg. 14, Para. 2) is the same (Pg. 4, Para. 5, both equal to 0) as a current (Fig. 6(b), output dendrite line from synapse array to post-neurons; Pg. 13, Para. 3) of a case in which no input signal (Pg. 4, Para. 5; ∀ i     x i = 0 ) is input to the plurality of product operation elements (Fig. 5(b), synapse, Fig. 6, individual synapses; Pg. 13, Para. 3), or at a time point (Fig. 1, t v in T i n ) at which a time is equal to a longest length (Pg. 4, Equation 9, t v m a x ) that can be taken by the input signals (Pg. 5, Equation 16, x i ; Pg. 9, Equation 34, x i ; Fig. 1, input spikes; Fig. 6(b) inputs from pre-neurons; Pg. 13, Para. 3) elapses after the current detecting process (Pg. 13, Para. 3; Pg. 14, Para. 2) is executed for the first time (Fig. 1, beginning of time axis). Although Wang teaches a capacitor (Fig. 6(b), C i ; Pg. 13, Para. 3; Pg. 14, Para. 2) which is capable of charging and executing a current detecting process, it appears they are silent to also teaching that it is configured to end the current detecting process on the basis of certain cases, and by nature, make that determination. While a capacitor is a component that is capable of sensing current, “a current sensor” as it appears in the claims is configured to perform more functionalities that a capacitor alone would not be capable of performing, such as making the determination to end current detection in several cases. Although Wang teaches the functionalities of the current sensor claimed, they appear to be silent to teaching a current sensor configured to end the current detecting process and perform the determination (the logical OR) on the basis of the process’s cases. Although Wang teaches the product-sum operation device, input spikes as its input signals (Fig. 1, input spikes; Fig. 6(b) inputs from pre-neurons; Pg. 13, Para. 3) are voltage signals (Fig. 6(b), V-in2 , V-in1 , Vin0, Pg. 13, Para. 3), and the input value (Pg. 13, Para. 3), they teach that the spike pulses only indicate input timing, its pulse width and amplitude do not affect the processing (Pg. 3, Sec. 2, Sub. 2.1, Para. 1). Although Wang generally teaches synapses (Fig. 6, individual synapses), they are silent with disclosing the specific materials or types that compose a synapse, specifically a magnetoresistive effect element exhibiting a magnetoresistive effect. Thus, Wang is silent with disclosing: a current sensor configured to end the current detecting process and perform the determination, the logical OR, on the basis of the process’s cases; all input signals are voltage signals for which pulse width modulation (PWM) corresponding to the input value is performed; a magnetoresistive effect element exhibiting a magnetoresistive effect. Lin teaches a current sensor (Fig. 1, coupling of 106, 104, 108, wherein 106 performs current sensing, [0012], [0014]) configured to end (Fig. 2, 104 which is coupled to 106 and 108, ends current sensing by switching to a floating mode, [0030]) the current detecting process and perform the determination, the logical OR, on the basis of (Fig. 1, 108 which is coupled to 106 and 104, controls the switching circuit 104 [0013], [0023] for current sensing or not during sum-of-product calculations [0026], [0030], [0035]) the process’s cases. It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Wang’s product-sum operation device with Lin’s current sensor feature, because they are in the claimed invention’s same field of endeavor of neuromorphic computing with a synapses array ([Abstract]). Lin teaches that as the number of synapses increases, the sum-of-product sensing currents yielded from the output may become large enough to result in high energy dissipation ([0003-0004]). Thus, it would have been obvious to one of ordinary skill in the art to implement Lin’s current sensor in place of Wang’s capacitor as Lin’s component possesses two terminals accesses in a switchable manner of which can only conduct a limited current, or even no current, which can effectively reduce the energy dissipation ([0005], [0043]). It would have been obvious to one of ordinary skill in the art to modify with Lin’s current sensor to achieve these benefits in an effort to potentially expand the number of synapses utilized, for purposes of calculating in parallel or computing larger sets of data at a time. Lin and the combination of Wang in view of Lin are silent with disclosing: all input signals are voltage signals for which pulse width modulation (PWM) corresponding to the input value is performed; a magnetoresistive effect element exhibiting a magnetoresistive effect. Morie teaches all input signals are voltage signals for which pulse width modulation (PWM) corresponding to the input value is performed (Pg. 357, Sec. 2, Sub. 2.1, Para 1; Sec. 2, Sub. 2.2). It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Wang in view of Lin’s modified product-sum operation device with Morie’s PWM feature, because they are in the claimed invention’s same field of endeavor of analog-digital merged circuitry architecture (summary). Although Wang generally discloses the input signals, as described above, they are silent with explicitly disclosing for which pulse width modulation (PWM) is performed. It would have been obvious to one of ordinary skill in the art to try applying the PWM feature as doing so in neural circuits is a known technique in the art (Pg. 1, Col. 2, Para. 1-2). Further, Morie teaches that implementing a PWM approach leads to low voltage operation and power consumption (Pg. 1, Col. 1, Para. 3, Col. 2, Para. 1), of which was an objective of Wang’s reference when implementing the TACT approach in Wang in view of Lin’s device (Wang, Pg. 2, Para. 3). Thus, it would have been obvious to try a known technique in the art, and would have yielded beneficial results when implemented. Morie and the combination of Wang in view of Lin in view of Morie are silent with disclosing: a magnetoresistive effect element exhibiting a magnetoresistive effect. Jeong teaches: a magnetoresistive effect element (Fig. 1(b), MRAM; Pg. 1, Col. 2) exhibiting a magnetoresistive effect (Pg. 4, Col. 1, Para. 3; Fig. 2(a), field and STT switching; Pg. 4, Col. 2). It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the synapses in Wang in view of Lin in view of Morie’s product-sum operation system with Jeong’s MRAM synapse because they are in the claimed invention’s same field of endeavor of a cross-bar array implementation of weighted multiply-accumulate operations in neural networks (Pg. 10, Col. 1, Para. 1). Wang teaches the basic structures of the synapses, however, they do not specifically detail what type they are using or any alternatives. Jeong teaches MRAM synapses and others as being suitable alternatives for conventional synapse approaches (Pg. 4, Col. 1, Para. 2). It would be beneficial to make this modification as doing so would achieve a higher density of synapses (Pg. 11, Col. 2), not readily lose results of trained weights as MRAM synapses are non-volatile (Pg. 11, Col. 1, Para. 2), and experience similar latency and endurance results as conventional approaches (Pg. 11, Col. 2). Modifying with Jeong’s MRAM synapses implementation would have been obvious to one of ordinary skill in the art, since one of ordinary skill in the art would recognize that Wang in view of Lin in view of Morie’s system was ready for improvement to incorporate the magnetoresitve effect elements, as taught by Jeong. Regarding claim 12, in addition to the teachings addressed in the claim 10 analysis, the rejection of claim 10 is incorporated and Wang teaches a product-sum operation device wherein: the adder (Fig. 6(b) and 6(c), comparator; Pg. 14, Para. 3; Note: the “comparator” of Wang performs the same functionality as the “adder” as claimed) calculates (Pg. 6(b), S1, S2, S_rst, inverters; Pg. 14, Para. 3) a product of a total current (Fig. 6(b), all charges of C d l   per column; Pg. 13, Para. 3) that is a sum of currents (Fig. 6(b), output dendrite line from synapse array to post-neurons; Pg. 13, Para. 3) detected at the predetermined time intervals (Pg. 5, Para. 1, T i n ) by the current sensor and a coefficient time (Pg. 3, Equation 8, t v m i n ), as the value (Fig. 6(b) and 6(c), V o u t   i ) relating to the total sum (Pg. 13, Para. 3; Pg. 14, Para. 1) of the output signals (Fig. 5(b), Fig. 6, synapse; Pg. 13, Para. 3). Although Wang teaches a capacitor (Fig. 6(b), C i ; Pg. 13, Para. 3; Pg. 14, Para. 2) which is capable of charging and executing a current detecting process, it appears they are silent to also teaching that it is configured to end the current detecting process on the basis of certain cases, and by nature, make that determination. Although Wang teaches the functionalities of the current sensor claimed, they appear to be silent to teaching a current sensor. Lin teaches a current sensor (Fig. 1, coupling of 106, 104, 108, wherein 106 performs current sensing, [0012], [0014]). The motivation to combine provided with respect to claim 10 equally applies. Regarding claim 14, in addition to the teachings addressed in the claim 12 analysis, the rejection of claim 12 is incorporated and Wang teaches a product-sum operation device wherein: the coefficient time (Pg. 3, Equation 8, t v m i n ) is a shortest length that can be taken by the input signals (Pg. 5, Equation 16, x i ; Pg. 9, Equation 34, x i ; Fig. 1, input spikes; Fig. 6(b) inputs from pre-neurons; Pg. 13, Para. 3), wherein the input signals (Pg. 5, Equation 16, x i ; Pg. 9, Equation 34, x i ; Fig. 1, input spikes; Fig. 6(b) inputs from pre-neurons; Pg. 13, Para. 3) have a length of an integer multiple (Pg. 4, Equation 8, λβ when in terms of θ is θ = λ β t v m i n - T m i n ; Pg. 4, Para. 3, λ is a positive constant; Pg. 6, Para. 2, λ = 1 ) of the coefficient time (Pg. 3, Equation 8, t v m i n ) and are simultaneously input (Fig. 1, input spikes; Fig. 3, input layer; Pg. 9, Para. 1; Pg. 4, Para. 1) to the plurality of product operation elements (Fig. 5(b), synapse, Fig. 6, individual synapses; Pg. 13, Para. 3), and wherein the current sensor executes the current detecting process (Pg. 13, Para. 3; Pg. 14, Para. 2) in a period equal (Fig. 1, T i n ) to the coefficient time (Pg. 3, Equation 8, t v m i n ). Although Wang teaches a capacitor (Fig. 6(b), C i ; Pg. 13, Para. 3; Pg. 14, Para. 2) which is capable of charging and executing a current detecting process, it appears they are silent to also teaching that it is configured to end the current detecting process on the basis of certain cases, and by nature, make that determination. Although Wang teaches the functionalities of the current sensor claimed, they appear to be silent to teaching a current sensor. Lin teaches a current sensor (Fig. 1, coupling of 106, 104, 108, wherein 106 performs current sensing, [0012], [0014]). The motivation to combine provided with respect to claim 10 equally applies. Regarding claim 16, in addition to the teachings addressed in the claim 10 analysis, the rejection of claim 10 is incorporated and Wang teaches a product-sum operation device wherein: the current sensor ends the current detecting process (Pg. 13, Para. 3; Pg. 14, Para. 2) at a time point (Fig. 1, t v in T i n ) at which a time equal to a longest length (Pg. 4, Equation 9, t v m a x ) that can be taken by the input signals (Pg. 5, Equation 16, x i ; Pg. 9, Equation 34, x i ; Fig. 1, input spikes; Fig. 6(b) inputs from pre-neurons; Pg. 13, Para. 3) elapses after the current detecting process (Pg. 13, Para. 3; Pg. 14, Para. 2) is executed for the first time (Fig. 1, beginning of time axis). Although Wang teaches a capacitor (Fig. 6(b), C i ; Pg. 13, Para. 3; Pg. 14, Para. 2) which is capable of charging and executing a current detecting process, it appears they are silent to also teaching that it is configured to end the current detecting process on the basis of certain cases, and by nature, make that determination. Although Wang teaches the functionalities of the current sensor claimed, they appear to be silent to teaching a current sensor configured to end the current detecting process. Lin teaches a current sensor (Fig. 1, coupling of 106, 104, 108, wherein 106 performs current sensing, [0012], [0014]) configured to end (Fig. 2, 104 which is coupled to 106 and 108, ends current sensing by switching to a floating mode, [0030]) the current detecting process. The motivation to combine provided with respect to claim 10 equally applies. Regarding claim 18, in addition to the teachings addressed in the claim 12 analysis, the rejection of claim 12 is incorporated and Wang teaches a product-sum operation device wherein: the current sensor ends the current detecting process (Pg. 13, Para. 3; Pg. 14, Para. 2) at a time point (Fig. 1, t v in T i n ) at which a time equal to a longest length (Pg. 4, Equation 9, t v m a x ) that can be taken by the input signals (Pg. 5, Equation 16, x i ; Pg. 9, Equation 34, x i ; Fig. 1, input spikes; Fig. 6(b) inputs from pre-neurons; Pg. 13, Para. 3) elapses after the current detecting process (Pg. 13, Para. 3; Pg. 14, Para. 2) is executed for the first time (Fig. 1, beginning of time axis). Although Wang teaches a capacitor (Fig. 6(b), C i ; Pg. 13, Para. 3; Pg. 14, Para. 2) which is capable of charging and executing a current detecting process, it appears they are silent to also teaching that it is configured to end the current detecting process on the basis of certain cases, and by nature, make that determination. Although Wang teaches the functionalities of the current sensor claimed, they appear to be silent to teaching a current sensor configured to end the current detecting process. Lin teaches a current sensor (Fig. 1, coupling of 106, 104, 108, wherein 106 performs current sensing, [0012], [0014]) configured to end (Fig. 2, 104 which is coupled to 106 and 108, ends current sensing by switching to a floating mode, [0030]) the current detecting process. The motivation to combine provided with respect to claim 10 equally applies. Regarding claim 20, in addition to the teachings addressed in the claim 10 analysis, the rejection of claim 10 is incorporated and Wang teaches a product-sum operation device wherein: the current sensor ends the current detecting process (Pg. 13, Para. 3; Pg. 14, Para. 2) in a case in which a current detected (Fig. 6(b), output dendrite line from synapse array to post-neurons; Pg. 13, Para. 3) in the current detecting process (Pg. 13, Para. 3; Pg. 14, Para. 2) is equal (Pg. 4, Para. 5, both equal to 0) to a current acquired (Fig. 6(b), output dendrite line from synapse array to post-neurons; Pg. 13, Para. 3) in a case in which no input signal (Pg. 4, Para. 5; ∀ i     x i = 0 ) is input to the plurality of product operation elements (Fig. 5(b), synapse, Fig. 6, individual synapses; Pg. 13, Para. 3). Although Wang teaches a capacitor (Fig. 6(b), C i ; Pg. 13, Para. 3; Pg. 14, Para. 2) which is capable of charging and executing a current detecting process, it appears they are silent to also teaching that it is configured to end the current detecting process on the basis of certain cases, and by nature, make that determination. Although Wang teaches the functionalities of the current sensor claimed, they appear to be silent to teaching a current sensor configured to end the current detecting process. Lin teaches a current sensor (Fig. 1, coupling of 106, 104, 108, wherein 106 performs current sensing, [0012], [0014]) configured to end (Fig. 2, 104 which is coupled to 106 and 108, ends current sensing by switching to a floating mode, [0030]) the current detecting process. The motivation to combine provided with respect to claim 10 equally applies. Regarding claim 22, in addition to the teachings addressed in the claim 12 analysis, the rejection of claim 12 is incorporated and Wang teaches a product-sum operation device wherein: the current sensor ends the current detecting process (Pg. 13, Para. 3; Pg. 14, Para. 2) in a case in which a current detected (Fig. 6(b), output dendrite line from synapse array to post-neurons; Pg. 13, Para. 3) in the current detecting process (Pg. 13, Para. 3; Pg. 14, Para. 2) is equal (Pg. 4, Para. 5, both equal to 0) to a current acquired (Fig. 6(b), output dendrite line from synapse array to post-neurons; Pg. 13, Para. 3) in a case in which no input signal (Pg. 4, Para. 5; ∀ i     x i = 0 ) is input to the plurality of product operation elements (Fig. 5(b), synapse, Fig. 6, individual synapses; Pg. 13, Para. 3). Although Wang teaches a capacitor (Fig. 6(b), C i ; Pg. 13, Para. 3; Pg. 14, Para. 2) which is capable of charging and executing a current detecting process, it appears they are silent to also teaching that it is configured to end the current detecting process on the basis of certain cases, and by nature, make that determination. Although Wang teaches the functionalities of the current sensor claimed, they appear to be silent to teaching a current sensor configured to end the current detecting process. Lin teaches a current sensor (Fig. 1, coupling of 106, 104, 108, wherein 106 performs current sensing, [0012], [0014]) configured to end (Fig. 2, 104 which is coupled to 106 and 108, ends current sensing by switching to a floating mode, [0030]) the current detecting process. The motivation to combine provided with respect to claim 10 equally applies. Regarding claim 23, in addition to the teachings addressed in the claim 10 analysis, the rejection of claim 10 is incorporated and Wang teaches a logical operation device comprising: the product-sum operation device (Fig. 6(b)). The preamble in claim 10 has been given patentable weight as claim 23 depends on the preamble for completeness, and gives life, meaning, and vitality into this claim by the reference to “the product-sum operation device”. A skilled person in the art reading the claims would consider the claim in view of the body and the preamble, and identify them limited to device as described by claim 10. Regarding claim 25, in addition to the teachings addressed in the claim 12 analysis, the rejection of claim 12 is incorporated and Wang teaches a logical operation device comprising: the product-sum operation device (Fig. 6(b)). The preamble in claim 10 has been given patentable weight as claim 25 depends on the preamble for completeness, and gives life, meaning, and vitality into this claim by the reference to “the product-sum operation device”. A skilled person in the art reading the claims would consider the claim in view of the body and the preamble, and identify them limited to device as described by claim 10. Regarding claim 26, in addition to the teachings addressed in the claim 10 analysis, the rejection of claim 10 is incorporated and Wang teaches a neuromorphic device comprising: the product-sum operation device (Fig. 6(b)). The preamble in claim 10 has been given patentable weight as claim 26 depends on the preamble for completeness, and gives life, meaning, and vitality into this claim by the reference to “the product-sum operation device”. A skilled person in the art reading the claims would consider the claim in view of the body and the preamble, and identify them limited to device as described by claim 10. Regarding claim 28, in addition to the teachings addressed in the claim 12 analysis, the rejection of claim 12 is incorporated and Wang teaches a neuromorphic device comprising: the product-sum operation device (Fig. 6(b)). The preamble in claim 10 has been given patentable weight as claim 28 depends on the preamble for completeness, and gives life, meaning, and vitality into this claim by the reference to “the product-sum operation device”. A skilled person in the art reading the claims would consider the claim in view of the body and the preamble, and identify them limited to device as described by claim 10. Regarding claim 29, in addition to the teachings addressed in the claim 10 analysis, the rejection of claim 10 is incorporated. Claim 29 is directed towards a method of performing the limitations recited in claim 10 and includes no additional new limitations. Therefore, the claim 10 analysis equally applies to claim 29. Response to Arguments 35 USC 112(f). A new interpretation for the “product operation elements” limitation has been invoked. 35 USC 103. Applicant argues the following in substance: 1) Applicant asserts that, the Lin reference neither describes nor suggests a trigger for ending current sensing. That is, none of the cited paragraphs (12-14, 23, 26, 30, and 35) disclose or suggest ending current sensing with either of the conditions specified in claim 10 (Remarks p. 7 ⁋ 6). This is merely a technique of current sensing, and the conditions for ending sensing are not stated. The other cited paragraphs do not describe ending functionality of the sensing circuit 106 in a manner that corresponds to claim 10. Further, the switching circuit 104 is not disclosed as controlling/ending functionality of the sensing circuit 106 in a manner that corresponds to claim 10 (Remarks p. 8 ⁋ 1-2). Examiner respectfully disagrees. The “wherein the current sensor” limitation describes functional limitations of the current sensor. Aside from it being configured to perform the functionalities described, the claim does not recite particular mechanisms corresponding to “ending the current detecting process” based on the conditions described. Thus, there is nothing more to limit the current sensor from merely being configured to perform the functional limitation of ending, of which was disclosed by Lin. Modifying Wang’s disclosure of condition cases with Lin’s current sensor being configured to end the current detecting process based on Wang’s condition would have been obvious as Lin’s component possesses two terminals accesses in a switchable manner of which can only conduct a limited current, or even no current, which can effectively reduce the energy dissipation ([0005], [0043]). It would have been obvious to one of ordinary skill in the art to modify with Lin’s current sensor to achieve these benefits in an effort to potentially expand the number of synapses utilized, for purposes of calculating in parallel or computing larger sets of data at a time. Therefore, the combination of Wang in view of Lin disclose the cited limitation, and further Wang in view of Lin in view of Morie in view of Jeong disclose claim 10. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARKUS A VILLANUEVA whose telephone number is (703)756-1603. The examiner can normally be reached M - F 8:30 am - 5:30 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, James Trujillo can be reached at (571) 272-3677. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MARKUS ANTHONY VILLANUEVA/Examiner, Art Unit 2151 /James Trujillo/Supervisory Patent Examiner, Art Unit 2151
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Prosecution Timeline

Jul 06, 2021
Application Filed
Oct 25, 2024
Non-Final Rejection — §103, §112
Feb 05, 2025
Response Filed
Apr 07, 2025
Final Rejection — §103, §112
Jul 14, 2025
Request for Continued Examination
Jul 18, 2025
Response after Non-Final Action
Sep 04, 2025
Non-Final Rejection — §103, §112
Dec 08, 2025
Response Filed
Feb 09, 2026
Final Rejection — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
52%
Grant Probability
99%
With Interview (+50.0%)
3y 8m
Median Time to Grant
High
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