Tech Center 2100 • Art Units: 2151 2182
This examiner grants 58% of resolved cases
| App # | Title | Status | Assignee |
|---|---|---|---|
| 17407150 | PARTIAL SUM COMPRESSION | Non-Final OA | Samsung Electronics Co., Ltd. |
| 17582939 | STOCHASTIC ROUNDING FOR NEURAL PROCESSOR CIRCUIT | Non-Final OA | Apple Inc. |
| 17732537 | ARITHMETIC DEVICE, METHOD, AND RECORDING MERDIUM FOR PERFORMING FOUR ARITHMETIC OPERATIONS ON FLOATING-POINT NUMBERS | Non-Final OA | FUJIFILM Corporation |
| 17836523 | TWO-STAGE DECOMPRESSION PIPELINE FOR NON-UNIFORM QUANTIZED NEURAL NETWORK INFERENCE ON RECONFIGURABLE HARDWARE | Final Rejection | Intel Corporation |
| 17561803 | PROCESSING IN FLOATING POINT FUSED MULTIPLY-ADD OPERATIONS | Final Rejection | Intel Corporation |
| 17898201 | HARDWARE ACCELERATOR FOR FLOATING-POINT OPERATIONS | Final Rejection | Avago Technologies International Sales Pte. Limited |
| 17586629 | Adaptive Selection of Source Matrix Version for Matrix Multiply Operations | Non-Final OA | Oracle International Corporation |
| 17989412 | PROCESSING-IN-MEMORY(PIM) DEVICE | Non-Final OA | SK hynix Inc. |
| 17714327 | TECHNIQUE FOR BIT UP-CONVERSION WITH SIGN EXTENSION | Final Rejection | TEXAS INSTRUMENTS INCORPORATED |
| 17566450 | ADDER WITH FIRST AND SECOND ADDER CIRCUITS FOR NON-POWER OF TWO INPUT WIDTH | Final Rejection | TEXAS INSTRUMENTS INCORPORATED |
| 17566240 | FLOATING POINT FUSED MULTIPLY ADD WITH REDUCED 1'S COMPLEMENT DELAY | Non-Final OA | TEXAS INSTRUMENTS INCORPORATED |
| 17392756 | PARALLEL MATRIX OPERATIONS IN A RECONFIGURABLE COMPUTE FABRIC | Final Rejection | Micron Technology, Inc. |
| 18077126 | ELECTRONIC DEVICE AND METHOD FOR ACCELERATING CANONICAL POLYADIC DECOMPOSITION | Non-Final OA | Industrial Technology Research Institute |
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