Prosecution Insights
Last updated: April 19, 2026
Application No. 17/432,585

OPTOELECTRONIC SOLID STATE ARRAY

Final Rejection §103§112
Filed
Aug 20, 2021
Examiner
BELL, LAUREN R
Art Unit
2896
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Vuereal Inc.
OA Round
5 (Final)
40%
Grant Probability
At Risk
6-7
OA Rounds
3y 7m
To Grant
70%
With Interview

Examiner Intelligence

Grants only 40% of cases
40%
Career Allow Rate
148 granted / 375 resolved
-28.5% vs TC avg
Strong +31% interview lift
Without
With
+30.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
61 currently pending
Career history
436
Total Applications
across all art units

Statute-Specific Performance

§103
42.1%
+2.1% vs TC avg
§102
19.7%
-20.3% vs TC avg
§112
33.1%
-6.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 375 resolved cases

Office Action

§103 §112
DETAILED ACTION Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 6/30/2025 has been entered. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 1-8, 10-11, 13-15, and 74-78 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 1, the limitation “nano pillar” is unclear as to what is required by the limitation. Specifically, the specification recites “[t]he term "bump" is also interchangeable with "pillar" or nano pillar” and provides no further description of a “nano pillar” which would apprise one as to the features which are required by a “nano pillar,” however applicant’s remarks (see arguments filed 2/18/2025) appear to argue that the amendment from “bump” to “nano pillar” overcomes the micropattern patterns 2/5 of Beyne. The record is therefore unclear as to what constitutes a “nano pillar” and as to how it is or is not differentiated from a “bump.” Note the dependent claims necessarily inherit the indefiniteness of the claims on which they depend. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 1-3, 6-8, 10, 13-15, and 75 is/are rejected under 35 U.S.C. 103 as being unpatentable over Beyne et al. (US 2009/0218702; herein “Beyne”) in view of Henry (US 10,811,401; herein “Henry”). Regarding claim 1, Beyne discloses in Fig. 3 and related text a method to fabricate a microdevice array comprising; providing a substrate (e.g. 1, see [0054]) having a micro device (see [0054] and [0079] least) having a nanopillar (e.g. 2/5, see [0054] and [0032]-[0033]) at a top surface of the micro device; providing a backplane (e.g. 3, see [0054]) comprising a backplane nano pillar (e.g. 4/5, see [0054] and [0032]-[0033]) corresponding to the nano pillar on the micro device; planarizing spaces around or between the micro device with the nano pillar, the planarized spaces having at least one planarization layer (e.g. 10, see [0055]); patterning the at least one planarization layer (see [0081]-[0082]) to clear the nano pillar; aligning and bringing the nano pillar at the top surface of the micro device in contact with a corresponding backplane nano pillar (see Fig. 3); and curing the at least one planarization layer (see [0085]). Beyne does not explicitly disclose providing a plurality of micro devices arranged in an array, each respective micro device having a nano pillar; the backplane comprising a plurality of backplane nano pillars corresponding to the nano pillars on the plurality of micro devices; each nano pillar at the top surface of the respective micro device of the plurality of micro devices in contact with each of a corresponding backplane nano pillar of the plurality of the backplane nano pillars. In the same field of endeavor, Henry teaches in Figs. 4A-B and related text a method to fabricate a microdevice array comprising providing a plurality of micro devices (100) arranged in an array, each micro device having a nano pillar (131); the backplane comprising a plurality of backplane nano pillars (203) corresponding to the nano pillars on the plurality of micro devices; the nano pillar at the top surface of the respective micro device of the plurality of micro devices in contact with a corresponding backplane nano pillar of the plurality of the backplane nano pillars (see Figs. 4A-B and col. 4 lines 43-59). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Beyne by having providing a plurality of micro devices arranged in an array, each respective micro device having a nano pillar, the backplane comprising a plurality of backplane nano pillars corresponding to the nano pillars on the plurality of micro devices, and the nano pillar at the top surface of the respective micro device of the plurality of micro devices contacts a corresponding one backplane nano pillar of the plurality of the backplane nano pillars., as taught by Henry, in order to make a device with added utility over a single LED device, such as a display with plural pixels and the ability to display different colors. Additionally, it would have been obvious to one of ordinary skill to have the plurality of micro devices and nano pillars and connecting to the backplane as claimed since it has been held that mere duplication of the essential working parts of a device involves only routine skill in the art. St. Regis Paper Co. v. Bemis Co., 193 USPQ 8. It has also been held that mere duplication of parts has no patentable significance unless a new and unexpected result is produced. In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960). See also MPEP 2144.04 Regarding claim 2, Beyne further discloses further comprising applying pressure before curing the at least one planarization layer (see [0085]). Regarding claim 3, Beyne further discloses wherein the at least one planarization layer is an adhesive layer (e.g. adheres to 10 on opposite substrate). Regarding claim 6, Beyne further discloses wherein the at least one planarization layer includes an adhesive (e.g. adheres to 10 on opposite substrate) and wherein patterning the at least one planarization layer comprises removing excess adhesive from top side of the nano pillars (see [0081]-[0082]). Regarding claim 7, Beyne further discloses wherein the at least one planarization layer includes an adhesive (e.g. adheres to 10 on opposite substrate) wherein patterning the at least one planarization layer comprises removing excess adhesive from one of: around the nano pillars, around the plurality of micro devices, or top side of the nano pillars (see [0081]-[0082]). Regarding claim 8, Beyne further discloses wherein patterning the at least one planarization layer comprises patterning the at least one planarization layer through direct photolithography (see [0082]). Regarding claim 10, Beyne further discloses wherein surface of the at least one planarization layer that has been patterned is functionalized to bond to some adhesive materials (e.g. assigned the function of bonding or caused to be functional to bond, see [0083]-[0086]). Regarding claim 13, Beyne further discloses wherein at least on planarization layer is an adhesive layer (e.g. adheres to 10 on opposite substrate) and planarizing spaces around or between the plurality of micro devices with the nano pillars provides the adhesive layer that that covers around an edge of the bump (see Fig. 3). Regarding claim 14, Beyne further discloses wherein the adhesive layer (10) is not conductive (see [0055]). Regarding claim 15, the combined device shows wherein the nano pillars and the backplane nano pillars are conductive (2/4/5 are conductive, see [0065], [0054]). Regarding claim 75, the combined device shows wherein the plurality of micro devices (Henry: 100) are LEDs (see abstract at least). Claim(s) 4-5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Beyne and Henry as applied to claim 1 above, and further in view of Andrews et al. (US 2020/0203419; herein “Andrews”). Regarding claims 4 and 5, Beyne does not explicitly disclose providing a passivation layer on or over the plurality of micro devices prior to the adhesive layer; wherein the passivation layer is a dielectric layer, a black matrix, or a reflective layer. In the same field of endeavor, Andrews teaches in Figs. 1, 6A-I and related text a method of making a microdevice array comprising providing a passivation layer (e.g. 50, see [0049]) on or over the plurality of micro device prior to bonding; wherein the passivation layer is a dielectric layer, a black matrix, or a reflective layer (e.g. dielectric SiN, see [0049]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Beyne by providing a passivation layer on or over the micro device prior to the adhesive layer, the passivation layer being a dielectric layer, as taught by Andrews, in order to provide a microLED display device with sufficient protection of the LED layers and electrical isolations to the interconnection layers therein. The limitation “providing a passivation layer on or over the micro device prior to the adhesive layer,” is therefore taught by the passivation layer being provided directly on the microdevices prior to bonding, as shown by Andrews, and the adhesive layer being provided over the device in association with the bonding, as shown by Beyne. Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Beyne and Henry as applied to claim 1 above, and further in view of Kim et al. (US 2018/0088375; herein “Kim”). Regarding claim 11, Beyne does not explicitly disclose wherein curing the at least one planarization layer (adhesive layer 10) comprises curing through an optical process. In the same field of endeavor, Kim discloses in a method of making a light emitting device wherein curing an adhesive layer (411) comprises curing through an optical process (see [0076]). It would have been obvious to one of ordinary skill in the art to modify the device of Beyne by having light curably adhesive in order to minimize damage to the components from additional application of heat for curing. Additionally, one of ordinary skill would have found it obvious to substitute light for heat in order to employ a known method of curing for another known method of curing to obtain predictable results (see MPEP 2143). In the instant case the prior art shows that curing by light and curing by heat are simply substituted methods known in the art which would obtain predictable results of curing the material. Kim shows that heat and light are equivalent methods known in the art for curing. Therefore, because these two were art-recognized equivalents at the time the invention was made, one of ordinary skill in the art would have found it obvious to substitute one for the other. Lastly, it would have been obvious to try curing by light instead of heat for the purpose of choosing from a finite number of identified, predictable solutions, with a reasonable expectation of success (KSR International Co. v. Teleflex Inc. 82 USPQ2d 1385 (2007)). The limitation “curing the at least one planarization layer comprises curing through an optical process” is taught by the combination of curing the adhesive by light, as shown by Kim, and the planarization layer being an adhesive, as shown by Beyne. Claim(s) 74 and 76-78 is/are rejected under 35 U.S.C. 103 as being unpatentable over Beyne and Henry as applied to claim 1 above, and further in view of Chaji et al. (US 2016/0218143; herein “Chaji”). Regarding claims 74 and 76-78, Beyne does not explicitly disclose wherein the plurality of micro devices are manufactured in planar batches; wherein the plurality of micro devices are sensors; solid state devices; integrated circuits. In the same field of endeavor, Chaji teaches a method to fabricate a microdevice array comprising wherein the plurality of micro devices are micro devices that are manufactured in planar batches (see [0147]); wherein the plurality of micro devices are sensors; solid state devices; integrated circuits (see [0147]). It would have been obvious to one of ordinary skill in the art to modify the device of Beyne and Henry by having the micro devices are manufactured in planar batches and the micro devices being sensors, solid state devices, or integrated circuits, as taught by Chaji, in order to simplify manufacturing methods and achieve a more robust display capable of diverse functions such as adaptive display brightness, fingerprint sensing, etc. Response to Arguments Applicant's arguments filed 6/30/2025 have been fully considered but are not persuasive. Applicant argues (page 6-7) that “nano pillar” is definite because although the specification says “nano pillar” and “bump” are used interchangeably, “[i]t does not imply that a "bump" is the same as a "nano pillar." In response, the examiner disagrees. Specifically, the specification recites the terms are “interchangeable” which indicates that Applicant construes the two terms as being synonyms for each other. Therefore, it is unclear what the difference would be and unclear as to how a “bump” disclosed in the art would not read on the synonym “nano pillar.” In particular, it is noted that Applicant’s specification provides only the disclosure of the interchangeability and does not provide any further characteristics which would be ascribed to the “nano pillars” that would not be found in “bumps.” Applicant argues (page 7) that “nano pillar” is definite because Wikipedia shows it is a term of art meaning a “pillar shaped nanostructures approximately 10 nanometers in diameter that can be grouped together in lattice like arrays,” “are a type of metamaterial, which means that nanopillars get their attributes from being grouped into artificially designed structures and not their natural properties,” “set themselves apart from other nanostructures due to their unique shape. Each nanopillar has a pillar shape at the bottom and a tapered pointy end on top.” In response, the examiner disagrees. Specifically, Wikipedia is discussing a “nanopillar” which is a semiconductor material used in very specific applications, e.g. Ge nanopillars for optical absorption, optical or a III-V material for active regions of light emitting or light sensitive devices. These nanopillars bear no relationship or resemblance to the conductive elements of applicant’s disclosure which are used for bonding an active device to a backplane. Even if they did, the definition provided by Wikipedia cannot be used to narrow the interpretation of the claim limitation “nano pillar.” Applicant’s nanopillars are not disclosed as having a particular size, are not disclosed as being in a “lattice-like array,” are not disclosed as being a “metamaterial,” and are not disclosed as having “a pillar shape at the bottom and a tapered pointy end on top.” Further, imparting the Wikipedia “definition” into the interpretation of the claimed term would introduce even more uncertainty in light of the specification and its lack of the asserted features of the definition. Applicant argues (page 7) that “[a] person of ordinary skilled in the art would readily understand…that a nano pillar is very different from a bump in terms of scale/size,” and “a bump does not possess the geometric precision or scale necessary for nano pillar applications.” In response, the examiner disagrees. Specifically, applicant’s own specification provides evidence to refute this. Specifically, consistent with and as used in the specification, one of ordinary skill would indeed understand a “bump” to be “interchangeable” with a “nano pillar.” Applicant’s specification explicitly shows that a bump can possess the geometric precision and scale necessary for “nano pillar” applications. Applicant argues (page 8-9) that Beyne does not teach the claimed nano pillars because “’A layer of Sn’ does not teach or suggest using a ‘nano pillar’,” that Beyne is for use in technology which does not generally require the use of nano pillars, and that Beyne references devices in the micro scale only. In response, the examiner disagrees. Specifically, it is first noted that MPEP 2111 reqruies USPTO personnel to give claims their broadest reasonable interpretation in light of the supporting disclosure. In re Morris, 127 F.3d 1048, 1054-55, 44 USPQ2d 1023, 1027-28 (Fed. Cir. 1997). Therefore the claim limitation “nano pillar” has been given its broadest reasonable interpretation in light of the spec. Accordingly, the interpretation of “nano pillar” includes “bumps.” Additionally, it is noted that conductive bonding features are often referred to in the art as “bumps,” “solder,” and “pillars,” etc. interchangeably and the terms are understood as synonyms (see, for example, US 20220375836, [0026]; US 20060234421, [0025]; US 20240312976, [0053]; US 20250038086 [0118]; US 20240071990, [0031]). Second, there is no material requirement for the claimed “nano pillar,” therefore the argument that the layer of Sn is not a nano pillar is unpersuasive. Lastly, elements 2/5 and 4/5 are clearly “pillar” shaped as shown in the figures, explicitly disclosed as “any shape” including ”essentially circular,” (see [0033]) and are explicitly disclosed in sizes including nanometer range (e.g. 0.01 microns which is equivalent to 10 nm, see [0032]). Conclusion All claims are identical to or patentably indistinct from, or have unity of invention with claims in the application prior to the entry of the submission under 37 CFR 1.114 (that is, restriction (including a lack of unity of invention) would not be proper) and all claims could have been finally rejected on the grounds and art of record in the next Office action if they had been entered in the application prior to entry under 37 CFR 1.114. Accordingly, THIS ACTION IS MADE FINAL even though it is a first action after the filing of a request for continued examination and the submission under 37 CFR 1.114. See MPEP § 706.07(b). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Lauren R Bell whose telephone number is (571)272-7199. The examiner can normally be reached M-F 8am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Kraig can be reached at (571) 272-8660. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /LAUREN R BELL/Primary Examiner, Art Unit 2896 1/7/2026
Read full office action

Prosecution Timeline

Aug 20, 2021
Application Filed
Sep 06, 2023
Non-Final Rejection — §103, §112
Dec 11, 2023
Response Filed
Dec 19, 2023
Final Rejection — §103, §112
Feb 26, 2024
Response after Non-Final Action
Mar 13, 2024
Examiner Interview (Telephonic)
Mar 23, 2024
Response after Non-Final Action
Apr 26, 2024
Request for Continued Examination
May 08, 2024
Response after Non-Final Action
Sep 13, 2024
Non-Final Rejection — §103, §112
Feb 18, 2025
Response Filed
Mar 24, 2025
Final Rejection — §103, §112
Jun 30, 2025
Request for Continued Examination
Jul 01, 2025
Response after Non-Final Action
Jan 07, 2026
Final Rejection — §103, §112
Apr 09, 2026
Request for Continued Examination
Apr 15, 2026
Response after Non-Final Action

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12604518
SEMICONDUCTOR DEVICE
2y 5m to grant Granted Apr 14, 2026
Patent 12588472
VIA ACCURACY MEASUREMENT
2y 5m to grant Granted Mar 24, 2026
Patent 12581934
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
2y 5m to grant Granted Mar 17, 2026
Patent 12575197
PHOTONIC STRUCTURE AND METHODS OF MANUFACTURING
2y 5m to grant Granted Mar 10, 2026
Patent 12563957
DISPLAY DEVICE
2y 5m to grant Granted Feb 24, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

6-7
Expected OA Rounds
40%
Grant Probability
70%
With Interview (+30.7%)
3y 7m
Median Time to Grant
High
PTA Risk
Based on 375 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month