Prosecution Insights
Last updated: April 19, 2026
Application No. 17/439,121

COMPONENT FOR A STRETCHABLE ELECTRONIC DEVICE

Final Rejection §103§112
Filed
Sep 14, 2021
Examiner
GUMEDZOE, PENIEL M
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Imperial College Innovations Limited
OA Round
4 (Final)
83%
Grant Probability
Favorable
5-6
OA Rounds
2y 4m
To Grant
87%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allow Rate
1080 granted / 1302 resolved
+14.9% vs TC avg
Minimal +4% lift
Without
With
+3.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
23 currently pending
Career history
1325
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
40.7%
+0.7% vs TC avg
§102
31.3%
-8.7% vs TC avg
§112
25.2%
-14.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1302 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Applicant’s amendment filed on 02/19/26 is acknowledged and papers submitted have been placed in the records. Claim Objections Claim 6 is objected to because of the following informalities: claim 6 should recite “the nanoporous portion” instead of “the nanoporous a portion”. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-2 and 4-23 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claims 1, 2 and 19 each recites “the silicon wafer” and claims 1 and 19 each recites “the silicone substrate”. There are insufficient basis for those limitations in the claims. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-2, 4-6 and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Arora et al. (US 2015/0069617, previously used) in view of Yu et al. (US 10,139,295; previously used), and further in view of Wei et al. (US 2014/0008234). a. Re claim 1, Arora et al. disclose a method of manufacturing a component for a stretchable electronic device, comprising: providing a silicon wafer layer 102A&102B (see figs. 1-9 and related text; see [0014], [0019], [0021]-[0022], [0026]; see remaining of disclosure for more details) comprising a first (top) surface and a second (bottom) surface; applying a layer of a conductive metal 104 ([0030]; figs. 7-9) onto [at least a portion] of the first surface of the silicon wafer layer; providing a stretchable silicone substrate layer 602 ([0026]) having a first (top) surface and a second (bottom) surface. But Arora et al. do not appear to explicitly disclose that the at least a portion of the first surface of the silicon wafer layer is nanoporous, and plasma bonding at least a portion of the second surface of the silicon wafer layer to at least a portion of the first surface of the stretchable silicone substrate layer. However, Yu teaches how silicon and PDMS have enhanced bonding with each other using oxygen plasma to produce strong covalent Si-O bonds (see col. 14, lines 32-35). Wei et al. disclose providing a nanoporous surface on a silicon layer improves adhesion of metal to silicon (see [0007]). As such, it would have been obvious to one skilled in the art before the effective filing date of the invention to have utilized an oxygen plasma to create Si-O bonds between PDMS and silicon wafer in order to form strong covalent bonds for more effective bonding as taught by Yu. Additionally, and noting that the desire to enhance commercial opportunities by improving a product or process is universal and even common-sensical (see MPEP 2144.II), and finally noting from MPEP 2141.03 that “A person of ordinary skill in the art is also a person of ordinary creativity, not an automaton” and that a “hypothetical ‘person having ordinary skill in the art’ to which the claimed subject matter pertains would, of necessity have the capability of understanding the scientific and engineering principles applicable to the pertinent art.” (thus a person capable of doing tradeoffs as necessary in engineering), it would have been obvious to one skilled in the art before the effective filing date of the invention to have provided a nanoporous surface portion on at least parts of the first surface of the silicon wafer where metal layer 104 would be bonded in order to enhance bonding between the metal layer 104 and said silicon wafer, wherein the benefits of having such enhanced bonding outweighs any drawbacks of providing said nanoporous surface portions in engineering tradeoffs of manufacturing the component for a stretchable electronic device. Regarding the new limitations “wherein the silicon wafer layer, conductive metal layer and stretchable silicon substrate laver have reliable interfacial adhesion, and where the adhesion between each of the layers is configured to catastrophically fail when a stress or strain level is exceeded.”, they appear to be properties resulting from the processes by which the silicon wafer layer, conductive metal layer and stretchable silicon substrate laver are bonded. MPEP 2112.01 (I. PRODUCT AND APPARATUS CLAIMS — WHEN THE STRUCTURE RECITED IN THE REFERENCE IS SUBSTANTIALLY IDENTICAL TO THAT OF THE CLAIMS, CLAIMED PROPERTIES OR FUNCTIONS ARE PRESUMED TO BE INHERENT) states: “Where the claimed and prior art products are identical or substantially identical in structure or composition, or are produced by identical or substantially identical processes, a prima facie case of either anticipation or obviousness has been established. In re Best, 562 F.2d 1252, 1255, 195 USPQ 430, 433 (CCPA 1977)” (emphasis added). So, since the claimed and prior art products are produced by identical or substantially identical processes, the limitations “wherein the silicon wafer layer, conductive metal layer and stretchable silicon substrate laver have reliable interfacial adhesion, and where the adhesion between each of the layers is configured to catastrophically fail when a stress or strain level is exceeded.” are presumed met. b. Re claim 2, the method further comprises etching at least a portion of the first surface of the silicon wafer layer to create the nanoporous portion before the step of attaching the layer of a conductive metal onto the nanoporous portion of the first surface of the silicon wafer (Wei et al. disclose forming the nanoporous surface by etching prior to depositing the metal layer, and as such, it is implicit as per claim 1 rejection above that the formation of the nanoporous surface would have involved etching at least a portion of the first surface of the silicon wafer layer before the step of attaching the layer of a conductive metal onto the nanoporous portion of the first surface of the silicon wafer, or it would have been obvious to one skilled in the art before the effective filing date of the invention to have done so in view of the teaching of Wei et al.). c. Re claim 4, Wei et al. teach using anodic etching (see [0007]) and this implicitly means an anode made of metal or in the alternative, it would have been obvious to one skilled in the art before the effective filing date of the invention to have used a metal anode in order to favor/enhance ions displacement, resulting in the step of etching comprising metal-assisted chemical etching. d. Re claim 5, it would have been obvious to one skilled in the art before the effective filing date of the invention to have provided the conductive metal to comprise one or more of copper, gold, nickel, cadmium, rhodium, platinum, silver and zinc in order to benefit of the highly conductive electrical conductivity of some (copper or gold or silver for example) or corrosion-resistant property of others (nickel or gold or platinum for example) or a combination of both properties for alloys of some of those materials (see MPEP 2144.I&II). e. Re claim 6, it would have been obvious to one skilled in the art before the effective filing date of the invention to have used electroplating for attaching the layer of a conductive metal onto at least a portion of the first surface of the silicon wafer, and this as a non-inventive step of using a well-known method for forming metal layers on a silicon wafer (see MPEP 2144.I&II). f. Re claim 19, Arora et al. disclose a component for a stretchable electronic device, the component comprising: a silicon wafer layer 102A&102B (see figs. 1-9 and related text; see [0014], [0019], [0021]-[0022], [0026]; see remaining of disclosure for more details) comprising a first (top) surface and a second (bottom) surface; a conductive metal layer 104 applied to at least a portion of the first surface of the silicon wafer layer; and a stretchable silicone substrate layer 602 (fig. 7&9) having a first (top) surface and a second (bottom) surface. But Arora et al. do not appear to explicitly disclose that a portion of the first surface of the silicon wafer is nanoporous, wherein at least a portion of the first surface of the stretchable silicone substrate layer is covalently bonded to at least a portion of the second surface of the silicon wafer. However, it would have been obvious to one skilled in the art before the effective filing date of the invention to have provided, based on the same arguments invoked in claim 1 rejection above, a portion of the first surface of the silicon wafer layer being nanoporous, wherein at least a portion of the first surface of the stretchable silicone substrate is covalently bonded to at least a portion of the second surface of the silicon wafer. The new limitations are also considered met as explained in claim 1 rejection above in view of MPEP 2112.01. Claim(s) 1-2, 4-6, 14-17, 19, 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Renshaw et al. (Pub No. US 2018/0295722 A1, hereinafter Renshaw) in view of Yu et al. (USP# 10,139,295 B2, hereinafter Yu), and further in view Wei et al. (US 2014/0008234). With regards to claim 1, Renshaw teaches a method of manufacturing a component for a stretchable electronic device, comprising: providing a silicon wafer layer comprising a first surface and a second surface (see Fig. 1A, silicon wafer 10); applying a layer of a conductive metal onto at least a portion of the first surface of the silicon wafer layer (see Fig. 1A, layer of conductive metal from layer 12); providing a stretchable silicone substrate layer having a first surface and a second surface (see Fig. 1A, stretchable silicone substrate 20 with first and second surface); Renshaw, however, is silent teaching: the at least a portion of the first surface of the silicon wafer layer is nanoporous, and plasma bonding at least a portion of the second surface of the silicon wafer layer to at least a portion of the first surface of the stretchable silicone substrate layer. In the same field of endeavor, Yu teaches how silicon and PDMS have enhanced bonding with each other using oxygen plasma to produce strong covalent Si-O bonds (see col. 14, lines 32-35). Therefore, it would have been obvious to a person having ordinary skill in the art at the time of filing to utilize an oxygen plasma to create Si-O bonds between PDMS and silicon wafer layer in order to form strong covalent bonds for more effective bonding as taught by Yu. Additionally, Wei et al. disclose providing a nanoporous surface on a silicon layer improves adhesion of metal to silicon (see [0007]). As such, and noting that the desire to enhance commercial opportunities by improving a product or process is universal and even common-sensical (see MPEP 2144.II), and finally noting from MPEP 2141.03 that “A person of ordinary skill in the art is also a person of ordinary creativity, not an automaton” and that a “hypothetical ‘person having ordinary skill in the art’ to which the claimed subject matter pertains would, of necessity have the capability of understanding the scientific and engineering principles applicable to the pertinent art.” (thus a person capable of doing tradeoffs as necessary in engineering), it would have been obvious to one skilled in the art before the effective filing date of the invention to have provided nanoporous surface portions on at least parts of the first surface of the silicon wafer in order to enhance bonding between the metal conductive layer from layer 12 and said silicon wafer layer, wherein the benefits of having such enhanced bonding outweighs any drawbacks of providing said nanoporous surface portions in engineering tradeoffs of manufacturing the component for a stretchable electronic device. Regarding the new limitations “wherein the silicon wafer layer, conductive metal layer and stretchable silicon substrate laver have reliable interfacial adhesion, and where the adhesion between each of the layers is configured to catastrophically fail when a stress or strain level is exceeded.”, they appear to be properties resulting from the processes by which the silicon wafer layer, conductive metal layer and stretchable silicon substrate laver are bonded. MPEP 2112.01 (I. PRODUCT AND APPARATUS CLAIMS — WHEN THE STRUCTURE RECITED IN THE REFERENCE IS SUBSTANTIALLY IDENTICAL TO THAT OF THE CLAIMS, CLAIMED PROPERTIES OR FUNCTIONS ARE PRESUMED TO BE INHERENT) states: “Where the claimed and prior art products are identical or substantially identical in structure or composition, or are produced by identical or substantially identical processes, a prima facie case of either anticipation or obviousness has been established. In re Best, 562 F.2d 1252, 1255, 195 USPQ 430, 433 (CCPA 1977)” (emphasis added). So, since the claimed and prior art products are produced by identical or substantially identical processes, the limitations “wherein the silicon wafer layer, conductive metal layer and stretchable silicon substrate laver have reliable interfacial adhesion, and where the adhesion between each of the layers is configured to catastrophically fail when a stress or strain level is exceeded.” are presumed met. With regards to claim 2, Renshaw teaches the method as claimed in claim 1, wherein the method further comprises etching at least a portion of the first surface of the silicon wafer layer to create the nanoporous portion before the step of attaching the layer of a conductive metal onto the at least a portion of the first surface of the silicon wafer (see Fig. 1A, trenches 16 etched). With regards to claim 4, Renshaw is silent teaching the method as claimed in claim 2, wherein the step of etching comprises metal-assisted chemical etching. Examiner hereby takes official notice that it is notoriously well-known within the semiconductor arts that metal-assisted chemical etching is conventionally utilized to produce etched holes for further patterning. With regards to claim 5, Renshaw is silent teaching the method as claimed in claim1, wherein the conductive metal comprises one or more of copper, gold, nickel, cadmium, rhodium, platinum, silver and zinc. Examiner hereby takes official notice that it is notoriously well-known within the semiconductor arts to utilize one of the claimed metals as interconnects because of their high conductive properties. With regards to claim 6, Renshaw is silent teaching the method as claimed in claim1, wherein the step of attaching a layer of a conductive metal onto at least a portion of the first surface of the silicon wafer comprises electroplating. Examiner hereby takes official notice that it is notoriously well-known within the semiconductor arts to electroplate metal onto a silicon wafer because of its simplicity in processing. With regards to claim 14, Renshaw is silent teaching the method as claimed in claim1, further comprising: soldering one or more electronic components onto the layer of a conductive metal. Examiner hereby takes official notice that it is notoriously well-known within the semiconductor arts to solder electronic components to conductive metals to form intact circuits. With regards to claim 15, Renshaw is silent teaching the method as claimed in claim 14, wherein the step of soldering comprises tin soldering. Examiner hereby takes official notice that it is notoriously well-known within the semiconductor arts to recognize that tin soldering is a very common technique for soldering metal joints. With regards to claim 16, Renshaw is silent teaching the method as claimed in claim1, wherein the step of plasma bonding at least a portion of the second surface of the silicon wafer to at least a portion of the first surface of the stretchable silicone substrate comprises treating at least a portion of the second surface of the silicon wafer and at least a portion of the first surface of the stretchable silicone substrate in 100% 02 plasma for an operating time of approximately 35 seconds. It would have been obvious to one of ordinary skill to determine the optimum operating time (see In re Aller, Lacey, and Hall (10 USPQ 233-237). It is not inventive to discover optimum or workable ranges by routine experimentation. Note that the specification contains no disclosure of either the critical nature of the claimed ranges or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical (see In re Woodruff, 919 f.2d 1575, 1578, 16 USPQ 2d 1934, 1936 (Fed. Cir. 1990)). Here, one would arrive at the claimed operating time in order to produce a specific concentration of Si-O dangling bonds for covalent bonding to produce a specific bonding strength. With regards to claim 17, Renshaw teaches the method as claimed in claim 16, wherein the step of plasma bonding at least a portion of the second surface of the silicon wafer to at least a portion of the first surface of the stretchable silicone substrate further comprises providing conformal contact between at least a portion of the second surface of the silicon wafer and at least a portion of the first surface of the stretchable silicone substrate applying pressure (see Fig. 1A, conformal contact between Si wafer 10 and PDMS silicone 20, see ¶22), but is silent teaching applying pressure to at least a portion of the second surface of the silicon wafer and at least a portion of the first surface of the stretchable silicone substrate for approximately 30 seconds. It would have been obvious to one of ordinary skill to determine the optimum operating time (see In re Aller, Lacey, and Hall (10 USPQ 233-237). It is not inventive to discover optimum or workable ranges by routine experimentation. Note that the specification contains no disclosure of either the critical nature of the claimed ranges or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical (see In re Woodruff, 919 f.2d 1575, 1578, 16 USPQ 2d 1934, 1936 (Fed. Cir. 1990)). Here, one would arrive at the claimed time of applying pressure in order to facilitate bonding security between the Si wafer and the PDMS silicone that is sufficient for a particular application. With regards to claim 19, Renshaw teaches a component for a stretchable electronic device, the component comprising: a silicon wafer layer comprising a first surface and a second surface (see claim 1); a conductive metal layer applied to a portion of the first surface of the silicon wafer (see claim 1); and a stretchable silicone substrate layer having a first surface and a second surface (see claim 1), Renshaw, however, is silent teaching: the portion of the first surface of the silicon wafer is nanoporous, and wherein at least a portion of the first surface of the stretchable silicone substrate is covalently bonded to at least a portion of the second surface of the silicon wafer. In the same field of endeavor, Yu teaches how silicon and PDMS have enhanced bonding with each other using oxygen plasma to produce strong covalent Si-O bonds (see col. 14, lines 32-35). Therefore, it would have been obvious to a person having ordinary skill in the art at the time of filing to utilize an oxygen plasma to create Si-O bonds between PDMS and silicon wafer in order to form strong covalent bonds for more effective bonding as taught by Yu. Additionally, it would have been obvious to one skilled in the art before the effective filing date of the invention to have provided portion of the first surface of the silicon wafer being nanoporous based on the same arguments invoked in claim 1 rejection above. The new limitations are also considered met as explained in claim 1 rejection above in view of MPEP 2112.01. With regards to claim 20, Renshaw teaches a stretchable electronic device comprising a component as claimed in claim 19, and further comprising one or more electronic components soldered to the conductive metal layer (see Fig. 1A, electronic components from layer 12 inherently have a conductive metal layer). Claim(s) 7-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Renshaw in view of Yu and further in view of Wei et al. as applied to claim 1 above, and further in view of Karuthedath et al. (Key Engineering Materials, ISSN: 1662-9795, Vol. 753, pp 18-27, hereinafter Karuthedath). With regards to claim 7, Renshaw teaches how the silicone layer can be utilized to electrically interconnect the circuits (see ¶21), but is silent teaching the method as claimed in claim1, wherein at least a portion of the stretchable silicone substrate comprises a plurality of conductive particle fillers and/or one or more conductive liquids dispersed in a silicone polymer matrix. In the same field of endeavor, Karuthedath teaches how conductive filler particles can be incorporated into PDMS (see pages 19-20, chapter “Theory of conductive PDMS”; chapter “Preparation of CPDMS Composites”, A.). Therefore, it would have bene obvious to a person having ordinary skill in the art at the time of filing to include conductive particles within PDMS and incorporate to the claimed invention since it simplifies processing and thus not require time-consuming etching and patterning processes. With regards to claim 8, Renshaw and Yu are silent teaching the method as claimed in claim1, wherein the stretchable silicone substrate comprises a first layer and a second layer, the first layer of the stretchable silicone substrate comprising the first surface of the stretchable silicone substrate, and the second layer of the stretchable silicone substrate comprising the second surface of the stretchable silicone substrate. It would have been obvious to a person having ordinary skill in the art at the time of filing to utilize a plurality of PDMS layers in order to strengthen the mechanical properties of the device. Renshaw teaches how the silicone layer can be utilized to electrically interconnect the circuits (see ¶21), but if silent teaching wherein the first layer of the stretchable silicone substrate comprises a plurality of conductive particle fillers and/or one or more conductive liquids dispersed in a silicone polymer matrix. In the same field of endeavor, Karuthedath teaches how conductive filler particles can be incorporated into PDMS (see pages 19-20, chapter “Theory of conductive PDMS”; chapter “Preparation of CPDMS Composites”, A.). Therefore, it would have bene obvious to a person having ordinary skill in the art at the time of filing to include conductive particles within PDMS and incorporate to the claimed invention since it simplifies processing and thus not require time-consuming etching and patterning processes. With regards to claim 9, Renshaw teaches the method as claimed in claim 8, wherein the second layer of the stretchable silicone substrate comprises polydimethylsiloxane (PDMS) (see ¶70), but is silent teaching the first layer of the stretchable silicone substrate comprises carbon black-filled polydimethylsiloxane (CB-PDMS) It would have been obvious to a person having ordinary skill in the art at the time of filing to utilize materials based on suitability for intended use. Here, one would be motivated to use carbon black-filled PDMS for purposes of concealing underlying skin for example. With regards to claim 10, Renshaw and Yu are silent teaching a method as claimed in claim 9, wherein the carbon black has a concentration of between 5% to 20% in the polydimethylsiloxane (PDMS) in the first layer of the stretchable silicone substrate. It would have been obvious to one of ordinary skill to determine the optimum concentration (see In re Aller, Lacey, and Hall (10 USPQ 233-237). It is not inventive to discover optimum or workable ranges by routine experimentation. Note that the specification contains no disclosure of either the critical nature of the claimed ranges or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical (see In re Woodruff, 919 f.2d 1575, 1578, 16 USPQ 2d 1934, 1936 (Fed. Cir. 1990)). Here, one would arrive at the claimed concentration of carbon black in order to adjust the degree of opacity (black) required to conceal underlying material as required for a particular application. With regards to claim 11, Renshaw and Yu are silent teaching the method as claimed in claim8, wherein the second layer of the stretchable silicone substrate has a thickness that is greater than a thickness of the first layer of the stretchable silicone substrate. It would have been obvious to a person having ordinary skill in the art at the time of filing to arrive at the claimed configuration since this is a matter of design choice with no disclosure as to the criticality of having one thickness larger than the other (see MPEP 2144.04, change in shape). With regards to claim 12, Renshaw and Yu are silent teaching the method as claimed in claim8, wherein the step of providing a stretchable silicone substrate comprises printing the first layer of the stretchable silicone substrate on top of at least a portion of the second layer of the stretchable silicone substrate, and subsequently curing the first layer of the stretchable silicone substrate and the second layer of the stretchable silicone substrate. Examiner hereby takes official notice that it is notoriously well-known to do a printing method to deposit the first layer of silicone to a second layer of silicone, followed by a curing method. With regards to claim 13, Renshaw and Yu are silent teaching the method as claimed in claim 12, wherein the step of curing the first layer of the stretchable silicone substrate and the second layer of the stretchable silicone substrate comprises a curing time of less than or equal to one hour and/or a curing temperature of less than or equal to 150 degrees centigrade. It would have been obvious to one of ordinary skill to determine the optimum time/temperature (see In re Aller, Lacey, and Hall (10 USPQ 233-237). It is not inventive to discover optimum or workable ranges by routine experimentation. Note that the specification contains no disclosure of either the critical nature of the claimed ranges or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical (see In re Woodruff, 919 f.2d 1575, 1578, 16 USPQ 2d 1934, 1936 (Fed. Cir. 1990)). Here, one would arrive the claimed temperature since it balances the thermal budget while simultaneously achieving sufficient bonding between the two PDMS layers. Claim(s) 21 and 23 is/are rejected under 35 U.S.C. 103 as being unpatentable over Renshaw in view Yu and further in view of Wei et al. as applied to claim 20 above, and further in view of Varshneya et al. (Pub No. US 2003/0095263 A1, hereinafter Varshneya). With regards to claim 21, Renshaw is silent teaching a device for measuring chest expansion and deformation rate, comprising a stretchable electronic device as claimed in claim 20, and a silicone chest strap, wherein at least a portion of the stretchable silicone substrate is attached to or integrally formed with the silicone chest strap. In the same field of endeavor, Varshneya teaches the use of a biometric sensor with a silicone chest strap utilized to measure chest expansion and deformation rates (see ¶77, ¶118). Therefore, it would have been obvious to a person having ordinary skill in the art at the time of filing to incorporate the device of claim 20 into a silicone strap that measures chest expansion/deformation as a known application for stretchable electronics. With regards to claim 23, Renshaw and Yu are silent teaching a device for rehabilitation, comprising a stretchable electronic device as claimed in claim 20, and a silicone strap, wherein at least a portion of the stretchable silicone substrate is attached to or integrally formed with the silicone strap. In the same field of endeavor, Varshneya teaches the use of a biometric sensor with a silicone chest strap utilized to measure chest expansion and deformation rates with silicone straps stitched to the device (see ¶77, ¶118). Therefore, it would have been obvious to a person having ordinary skill in the art at the time of filing to incorporate the device of claim 20 into a silicone strap that measures chest expansion/deformation as a known application for stretchable electronics. Claim(s) 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Renshaw in view of Yu and further in view of Wei et al. as applied to claim 20 above, and further in view of Christoforou et al. (Pub No. US 2018/0296875 A1, hereinafter Christoforou). With regards to claim 22, Renshaw and Yu are silent teaching a device for rehabilitation, comprising a stretchable electronic device as claimed in claim 20, and a silicone ball, wherein the stretchable electronic device is fully embedded in the silicone ball. In the same field of endeavor Christoforou teaches the use of a sensor ball with a built-in sensor to detect grip strength for rehabilitation (see ¶94, Fig. 12). Therefore, it would have been obvious to incorporate the device to a sensor ball to detect grip strength digitally for more accurate measurement. It is also obvious to recognize that a rubber or synthetic rubber can also include silicone. Allowable Subject Matter Claim 24 is allowed. Response to Arguments Applicant’s arguments with respect to claim(s) 1-2 and 4-23 have been considered but are not convincing. As explained above, the new limitations are met in view of MPEP 2112.01. As for Applicants’ arguments that a skilled in the art would not have considered combining the references as suggested in the rejections, they were not convincing. As stated in the rejections above, MPEP 2141.03 states that “A person of ordinary skill in the art is also a person of ordinary creativity, not an automaton” and that a “hypothetical ‘person having ordinary skill in the art’ to which the claimed subject matter pertains would, of necessity have the capability of understanding the scientific and engineering principles applicable to the pertinent art” (thus a person capable of doing tradeoffs as necessary in engineering). The Examiner maintains that such a person of ordinary skilled in the art would have, in view of the sections of the references used above, combined the said references as explained above to arrive at the claimed invention. There is no evidence to the contrary. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to PENIEL M GUMEDZOE whose telephone number is (571)270-3041. The examiner can normally be reached M-F: 9:00AM - 5:30PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 5712707877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PENIEL M GUMEDZOE/Primary Examiner, Art Unit 2899
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Prosecution Timeline

Sep 14, 2021
Application Filed
Sep 14, 2021
Response after Non-Final Action
Mar 23, 2024
Non-Final Rejection — §103, §112
Sep 30, 2024
Response Filed
Apr 30, 2025
Final Rejection — §103, §112
Jul 31, 2025
Response after Non-Final Action
Nov 04, 2025
Request for Continued Examination
Nov 09, 2025
Response after Non-Final Action
Nov 15, 2025
Non-Final Rejection — §103, §112
Feb 19, 2026
Response Filed
Mar 16, 2026
Final Rejection — §103, §112 (current)

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Patent 12593698
ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF
2y 5m to grant Granted Mar 31, 2026
Patent 12593581
DISPLAY PANEL AND DISPLAY DEVICE INCLUDING THE SAME
2y 5m to grant Granted Mar 31, 2026
Patent 12593673
SEMICONDUCTOR STRUCTURE AND METHOD MAKING THE SAME
2y 5m to grant Granted Mar 31, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
83%
Grant Probability
87%
With Interview (+3.7%)
2y 4m
Median Time to Grant
High
PTA Risk
Based on 1302 resolved cases by this examiner. Grant probability derived from career allow rate.

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