Prosecution Insights
Last updated: May 29, 2026
Application No. 17/442,648

OPTOELECTRONIC SEMICONDUCTOR DEVICE COMPRISING A DIELECTRIC LAYER AND A TRANSPARENT CONDUCTIVE LAYER AND METHOD FOR MANUFACTURING THE OPTOELECTRONIC SEMICONDUCTOR DEVICE

Non-Final OA §103
Filed
Sep 24, 2021
Priority
Mar 29, 2019 — DE 10 2019 108 216.1 +1 more
Examiner
CHEN, DAVID Z
Art Unit
2815
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Osram Opto Semiconductors GmbH
OA Round
4 (Non-Final)
44%
Grant Probability
Moderate
4-5
OA Rounds
0m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 44% of resolved cases
44%
Career Allowance Rate
301 granted / 678 resolved
-23.6% vs TC avg
Strong +50% interview lift
Without
With
+49.5%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
42 currently pending
Career history
740
Total Applications
across all art units

Statute-Specific Performance

§103
79.1%
+39.1% vs TC avg
§102
16.2%
-23.8% vs TC avg
§112
4.0%
-36.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 678 resolved cases

Office Action

§103
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. This Office Action is in response to Amendments/Remarks filed on July 21, 2025. Claim Objections Claim 1 is objected to because of the following informalities: the limitation “the planar horizontal surface/the planar horizontal main surface” appears to read “the planar horizontal first main surface”. Appropriate correction is required. Claim 22 is objected to because of the following informalities: the limitation “the planar horizontal main surface/the planar surface” appears to read “the planar horizontal first main surface”. Appropriate correction is required. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 1-6, 18 and 21-22 are rejected under 35 U.S.C. 103 as being unpatentable over WO 2013/077619 A1 to Jung et al. (“Jung”) in view of U.S. Patent Application Publication No. 2008/0258161 A1 to Edmond et al. (“Edmond”). As to claim 1, although Jung discloses an optoelectronic semiconductor device, comprising: a first semiconductor layer (25) of a first conductivity type (n) and a second semiconductor layer (29) of a second conductivity type (p); a non-conformal dielectric layer (47); and a conductive layer (51); wherein the first (25) and second (29) semiconductor layers are stacked one on top of the other to form a layer stack (30), and wherein a first main surface (top) of the first semiconductor layer (25) is roughened (Page 8), and protruding portions (25a, 25r) are formed in the first main surface (top) of the first semiconductor layer (25); wherein the non-conformal dielectric layer (47) is arranged adjacent to the first main surface (top) of the first semiconductor layer (25) so as to fill spaces between the protruding portions (25a, 25r), the non-conformal dielectric layer (47) having a planar horizontal first main surface (Fig. 3, Fig. 4) on a side facing away from the first semiconductor layer (25), wherein the planar horizontal surface (Fig. 3, Fig. 4) of the non-conformal dielectric layer (47) horizontally extends over the protruding portions (25a, 25r); and wherein the conductive layer (51) is arranged over a surface of the non-conformal dielectric layer (47) facing away from the first semiconductor layer (25) and the conductive layer (51) covers the planar horizontal main surface (Fig. 3, Fig. 4) of the non-conformal dielectric layer (47), wherein the conductive layer (51) is locally connected to the first semiconductor layer (25) via first contact regions (Fig. 2, Fig. 4) (See Fig. 1-Fig. 4, Fig. 11, Page 7-Page 9, Page 12, Page 17) (Notes: the limitation “over” is defined as used as a function word to indicate motion or situation in a position higher than or above another by Merriam-Webster.com. Further, the non-conformal dielectric layer does not conform to the roughened surface), Jung does not further disclose wherein the conductive layer is a transparent conductive layer. However, Edmond does disclose wherein the conductive layer (21) is a transparent conductive layer (21) (See Fig. 1, Fig. 2, ¶ 0042, ¶ 0043, ¶ 0044, ¶ 0046, ¶ 0049, ¶ 0051, ¶ 0052, ¶ 0053, ¶ 0054, ¶ 0058, ¶ 0067). In view of the teaching of Edmond, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teaching of Jung to have wherein the conductive layer is a transparent conductive layer because the transparent conductive layer allows 90-100 percent of generated light transmission from the layer stack to improve light extraction (See ¶ 0043). As to claim 2, Jung in view of Edmond further discloses wherein the transparent conductive layer (51/21) is connected to the first semiconductor layer (25/13) via contact openings (47a) which extend through the non-conformal dielectric layer (47) (See Jung Fig. 11). As to claim 3, Jung in view of Edmond discloses further comprising a first current spreading structure (wire/plurality of layers, 24) connected to the first semiconductor layer (25/13) (See Jung Page 17 and Edmond Fig. 1, ¶ 0046, ¶ 0052, also Kim Fig. 1 previously cited) (Notes: the first current spreading structure provides and “spread” current on the transparent conductive layer, where the first current spread structure further improves light extraction). As to claim 4, Jung in view of Edmond further discloses wherein the first current spreading structure (wire/plurality of layers, 24) is arranged on a side of the first semiconductor layer (25/13) facing away from the second semiconductor layer (29/12) (See Jung Page 17 and Edmond Fig. 1, also Kim Fig. 1 previously cited). As to claim 5, Jung in view of Edmond further discloses wherein the first current spreading structure (wire/plurality of layers, 24) is arranged on a side of the transparent conductive layer (51/21) facing away from the first semiconductor layer (25/13) (See Jung Page 17 and Edmond Fig. 1, also Kim Fig. 1 previously cited). As to claim 6, Jung in view of Edmond discloses further comprising a passivation layer (26, 46) on a side of the transparent conductive layer (51/21) facing away from the first semiconductor layer (25/13), wherein the passivation layer (26, 46) is arranged between the regions of the first current spreading structure (wire/plurality of layers, 24) (See Jung Fig. 2 and Edmond Fig. 1, Fig. 2) (Notes: the passivation layer covers the device to be provided between the regions of the first current spreading structure. As to claim 18, Jung in view of Edmond further discloses wherein the passivation layer (26, 46) is formed to cover a planar main surface of the transparent conductive layer (51/21) (See Jung Fig. 2 and Edmond Fig. 1, Fig. 2). As to claim 21, Jung in view of Edmond further discloses wherein the transparent conductive layer (51/21) covers the protruding portions (25a, 25r) (See Jung Fig. 2, Fig. 3). As to claim 22, Jung in view of Edmond further discloses wherein the non-conformal dielectric layer (47) having the planar horizontal main surface (Fig. 3, Fig. 4) covers the first semiconductor layer (25) and the transparent conductive layer (51/21) covers the planar surface (Fig. 3, Fig. 4) of the non-conformal dielectric layer (47) (See Jung Fig. 3, Fig. 4). Claim(s) 6 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over WO 2013/077619 A1 to Jung et al. (“Jung”) and U.S. Patent Application Publication No. 2008/0258161 A1 to Edmond et al. (“Edmond”) as applied to claim 4 above, and further in view of U.S. Patent Application Publication No. 2015/0364653 A1 to Chae (“Chae”). The teaching of Jung and Edmond have been discussed above. As to clam 6, although Jung in view of Edmond discloses regions of the first current spreading structure (wire/plurality of layers, 24) (See Jung Page 17 and Edmond Fig. 1, also Kim Fig. 1 previously cited), Jung does not disclose further comprising a passivation layer on a side of the transparent conductive layer facing away from the first semiconductor layer, wherein the passivation layer is arranged between the regions of the first current spreading structure. However, Chae does disclose further comprising a passivation layer (210) on the first semiconductor layer (121), wherein the passivation layer (210) is arranged between the regions (at 190) of the first current spreading structure (190) (See Fig. 6, ¶ 0032, ¶ 0082, ¶ 0088). In view of the teaching of Chae, it would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to modify the teaching of Jung to have further comprising a passivation layer on a side of the transparent conductive layer facing away from the first semiconductor layer, wherein the passivation layer is arranged between the regions of the first current spreading structure because the passivation layer provides protection from external environments (See ¶ 0088). As to claim 18, Jung in view of Chae further discloses wherein the passivation layer (210) is formed to cover a planar main surface of the transparent conductive layer (51) (See Jung Fig. 2 and Chae Fig. 6). Claim(s) 10 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over WO 2013/077619 A1 to Jung et al. (“Jung”) and U.S. Patent Application Publication No. 2008/0258161 A1 to Edmond et al. (“Edmond”) as applied to claims 1 and 18 above, and further in view of U.S. Patent Application Publication No. 2015/0364653 A1 to Chae (“Chae”) and U.S. Patent Application Publication No. 2016/0240737 A1 to Ide et al. (“Ide”). The teachings of Jung and Edmond have been discussed above. As to claim 10, although Jung in view of Edmond and Chae discloses the transparent conductive layer (51/21) and the dielectric layer (200) of any transparent insulation layer (See Chae Fig. 6, ¶ 0082), Jung, Edmond, and Chae do not disclose further comprising a potting compound over a planar surface of the transparent conductive layer, wherein a refractive index n1 of the dielectric layer and the refractive index n2 of the potting compound fulfill the following relationship: 0.75<n1/n2<1.25. However, Ide does disclose further comprising a potting compound (sealing material) over the optoelectronic semiconductor device, wherein a refractive index n1 (1.5/1.6/1.65) of the dielectric layer (15) of SiN, TiO2, Al2O3, and etc., and the refractive index n2 (1.5) of the potting compound (sealing material) fulfill the following relationship: 0.75<n1/n2<1.25 (See ¶ 0041, ¶ 0042, ¶ 0044, ¶ 0045, ¶ 0063). In view of the teachings of Jung, Edmond, Chae, and Ide, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teaching of Jung to have further comprising a potting compound over a planar surface of the transparent conductive layer, wherein a refractive index n1 of the dielectric layer and the refractive index n2 of the potting compound fulfill the following relationship: 0.75<n1/n2<1.25 because the light extraction is improved while the device is well protected and sealed (See Ide ¶ 0041). As to claim 19, Jung in view of Chae and Ide discloses further comprising a potting compound (sealing material) covering a planar surface of the passivation layer (210), wherein a refractive index n1 of the dielectric layer (200/15) and the refractive index n2 of the potting compound (sealing material) fulfill the following relationship: 0.75<n1/n2<1.25 (See Chae Fig. 6, ¶ 0082 and Ide See ¶ 0041, ¶ 0042, ¶ 0044, ¶ 0045, ¶ 0063) such that the light extraction is improved while the device is well protected and sealed (See Ide ¶ 0041). Response to Arguments Applicant's arguments filed on July 21, 2025 have been fully considered but they are not persuasive. Applicants argue “The Office Action maps element 47 of Jung with the recited conformal dielectric layer…the surface of the conformal dielectric layer is NOT ‘a planar horizontal surface’. Rather, the surface of the conformal dielectric layer is undulated.” This is not found persuasive because the recited limitation is “a non-conformal dielectric layer” and although the surface of element 47 of Jung is undulated, the limitation “non-conformal” is met because element 47 does not conform to at least the protruding portions 25r. Lastly, it is clear the planar horizontal surface under element 51 “horizontally extends over the protruding portions 25a” as seen in Fig. 3 and Fig. 4 and Page 12 of Jung. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID CHEN whose telephone number is (571)270-7438. The examiner can normally be reached M-F 12-6. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JOSHUA BENITEZ can be reached at (571) 270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DAVID CHEN/Primary Examiner, Art Unit 2815
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Prosecution Timeline

Show 4 earlier events
Dec 04, 2024
Final Rejection mailed — §103
Jan 17, 2025
Response after Non-Final Action
Feb 06, 2025
Response after Non-Final Action
Feb 06, 2025
Request for Continued Examination
Jun 04, 2025
Non-Final Rejection mailed — §103
Jul 21, 2025
Response Filed
Oct 16, 2025
Final Rejection mailed — §103
Dec 11, 2025
Response after Non-Final Action

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Prosecution Projections

4-5
Expected OA Rounds
44%
Grant Probability
94%
With Interview (+49.5%)
3y 7m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 678 resolved cases by this examiner. Grant probability derived from career allowance rate.

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