Prosecution Insights
Last updated: October 02, 2026
Application No. 17/448,716

Semiconductor Die, Semiconductor Device and Method for Forming a Semiconductor Die

Final Rejection §103
Filed
Sep 24, 2021
Examiner
FAN, SU JYA
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Intel Corporation
OA Round
4 (Final)
76%
Grant Probability
Favorable
5-6
OA Rounds
0m
Est. Remaining
87%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allowance Rate
723 granted / 953 resolved
+7.9% vs TC avg
Moderate +11% lift
Without
With
+11.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
44 currently pending
Career history
1008
Total Applications
across all art units

Statute-Specific Performance

§101
4.3%
-35.7% vs TC avg
§103
50.9%
+10.9% vs TC avg
§102
22.7%
-17.3% vs TC avg
§112
19.6%
-20.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 953 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment The following office action is in response to the amendment and remarks filed on 5/22/26. Claims 1-20 are pending and claims 18-20 are withdrawn. Claims 1-17 are subject to examination at this time. Response to Arguments Applicant's arguments filed 5/22/26 have been fully considered but they are not persuasive. Regarding claim 1: Referring to MPEP § 2141, Examination Guidelines for Determining Obviousness Under 35 U.S.C. 103: “A person of ordinary skill in the art is also a person of ordinary creativity, not an automaton.” KSR, 550 U.S., 82 USPQ2d at 1397. “[I]n many cases a person of ordinary skill will be able to fit the teachings of multiple patents together like pieces of a puzzle.” Office personnel may also take into account “the inferences and creative steps that a person of ordinary skill in the art would employ.”, 82 USPQ2d at 1396 Hirabayashi teaches forming vertical connections having both a forward taper and a reverse taper can advantageously suppress bending of the substrate (e.g. see English machine translation page 3). Suppressing bending of the substrate provides motivation for one of ordinary skill in the art, who is also a person of ordinary creativity, to form vertical connections having both a forward taper and a reverse taper in a substrate that is metallization layer. That is, the structural stability that can be achieved by forming vertical connections having both a forward taper and a reverse taper is not dependent on the specific material/type of the substrate (e.g. metallization layer substrate vs. glass support substrate). The geometry of forward and reverse taper shapes offer structural stability by suppressing bending when applied to different substrates. For example, consider the geometry of a truss shape that offers structural stability in more than one type of substrate such as a roof or bridge, etc. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Michele Fan whose telephone number is 571-270-7401. The examiner can normally be reached on M-F from 7:30 am to 4 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Jeff Natalini, can be reached on (571) 272-2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Michele Fan/ Primary Examiner, Art Unit 2818 6 August 2026
Read full office action

Prosecution Timeline

Show 5 earlier events
Oct 10, 2025
Interview Requested
Oct 21, 2025
Applicant Interview (Telephonic)
Oct 22, 2025
Examiner Interview Summary
Nov 07, 2025
Request for Continued Examination
Nov 14, 2025
Response after Non-Final Action
Mar 03, 2026
Non-Final Rejection mailed — §103
May 22, 2026
Response Filed
Aug 10, 2026
Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12751165
DISPLAY APPARATUS
2y 9m to grant Granted Sep 29, 2026
Patent 12733296
LIGHT-EMITTING DEVICE AND LIGHT-EMITTING APPARATUS
2y 8m to grant Granted Sep 08, 2026
Patent 12727310
DISPLAY DEVICE
4y 8m to grant Granted Sep 01, 2026
Patent 12721137
SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
2y 10m to grant Granted Aug 25, 2026
Patent 12713990
SEMICONDUCTOR PACKAGE
4y 4m to grant Granted Aug 18, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
76%
Grant Probability
87%
With Interview (+11.1%)
2y 7m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 953 resolved cases by this examiner. Grant probability derived from career allowance rate.

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