Prosecution Insights
Last updated: October 25, 2026
Application No. 17/471,371

METHOD AND SYSTEM FOR EXECUTING NEW INSTRUCTIONS IN A SYSTEM MANAGEMENT MODE

Non-Final OA §112
Filed
Sep 10, 2021
Priority
Dec 29, 2020 — CN 202011591545.6 +1 more
Examiner
DOMAN, SHAWN
Art Unit
2183
Tech Center
2100 — Computer Architecture & Software
Assignee
Shanghai Zhaoxin Semiconductor Co., Ltd.
OA Round
7 (Non-Final)
65%
Grant Probability
Moderate
7-8
OA Rounds
0m
Est. Remaining
91%
With Interview

Examiner Intelligence

Grants 65% of resolved cases
65%
Career Allowance Rate
187 granted / 288 resolved
+9.9% vs TC avg
Strong +26% interview lift
Without
With
+25.9%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
31 currently pending
Career history
345
Total Applications
across all art units

Statute-Specific Performance

§101
2.7%
-37.3% vs TC avg
§103
48.6%
+8.6% vs TC avg
§102
17.5%
-22.5% vs TC avg
§112
26.8%
-13.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 288 resolved cases

Office Action

§112
$3DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claims 1, 5, 26, and 40 have been amended. Claims 4 and 39 have been cancelled. Claim 71 has been added. Claims 17-20, 22-35, 52-55, and 57-70 have been rejoined Claims 1, 3, 5-36, 38, and 40-71 have been examined. Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on April 3, 2026 has been entered. Information Disclosure Statement The Applicant's submission of the Information Disclosure Statements dated April 3, 2026, May 26, 2026, and August 10, 2026 is acknowledged by the Examiner and the cited references have been considered in the examination of the claims now pending. Copies of the PTOL-1449s initialed and dated by the Examiner are attached to the instant office action. The Chines office actions are lined through because the Applicant did not comply with 37 CFR 1.98(a)(3), which requires, “(i) A concise explanation of the relevance, as it is presently understood by the individual designated in § 1.56(c) most knowledgeable about the content of the information, of each patent, publication, or other information listed that is not in the English language. The concise explanation may be either separate from applicant’s specification or incorporated therein. (ii) A copy of the translation if a written English-language translation of a non-English-language document, or portion thereof, is within the possession, custody, or control of, or is readily available to any individual designated in § 1.56(c).” Election/Restrictions Claims 1 and 36 are allowable. Claims 17-20, 22-35, 52-55, and 57-70, previously withdrawn from consideration as a result of a restriction requirement, require all the limitations of allowable claims. Pursuant to the procedures set forth in MPEP § 821.04(a), the restriction requirement, as set forth in the Office action mailed on November 28, 2022, is hereby withdrawn and claims 17-20, 22-35, 52-55, and 57-70 are hereby rejoined and fully examined for patentability under 37 CFR 1.104. In view of the withdrawal of the restriction requirement, applicant(s) are advised that if any claim presented in a divisional application is anticipated by, or includes all the limitations of, a claim that is allowable in the present application, such claim may be subject to provisional statutory and/or nonstatutory double patenting rejections over the claims of the instant application. Once the restriction requirement is withdrawn, the provisions of 35 U.S.C. 121 are no longer applicable. See In re Ziegler, 443 F.2d 1211, 1215, 170 USPQ 129, 131-32 (CCPA 1971). See also MPEP § 804.01. Claim Objections Claims 29 and 64 are objected to because of the following informalities. Claim 29 recites, “the a system management memory.” This appears to be a typographical error. Applicant may have intended “the [[a]] system management memory.” Claim 64 is a corresponding claim that is objected to for similar reasons. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 6-9, 10-14, 17, 18, 21-35, 41-49, 52, 53, and 56-70 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. Claim 6 recites, “obtaining an emulation flag.” It is ambiguous as to whether this is a second emulation flag or if the limitation refers to the emulation flag introduced in claim 1. For purposes of examination, the latter interpretation is used and this limitation is interpreted as, “obtaining [[an]] the emulation flag.” Claim 6 recites, twice, “the operating environment information of the received instruction.” There is insufficient antecedent basis for this limitation in the claim. For purposes of examination, the first instance of this limitation is interpreted as, “[[the]] operating environment information of the received instruction.” Claim 6 recites, “a microarchitecture register.” It is ambiguous as to whether this is a second microarchitecture register or if the limitation refers to the microarchitecture register introduced in claim 1. For purposes of examination, the latter interpretation is used and this limitation is interpreted as, “[[a]] the microarchitecture register.” Claim 6 recites, “the emulation flag.” The antecedent basis for this limitation is indefinite. The limitation could refer to “an emulation flag” from claim 1 or from claim 6. Claim 7 recites, twice, “the emulation flag.” The antecedent basis for this limitation is indefinite. Claim 8 recites, “the conversion.” There is insufficient antecedent basis for this limitation in the claim. Claim 9 recites, “the emulation flag,” “the operating environment information,” and “the microarchitecture register.” There is insufficient antecedent basis for these limitations. Claim 10 recites, twice, “the operation code.” There is insufficient antecedent basis for this limitation in the claim. For purposes of examination, the first instance of this limitation is interpreted as, “[[the]] an operation code.” Claim 11 recites, “the operation code.” There is insufficient antecedent basis for this limitation in the claim. Claim 13 recites, twice, “the system management memory.” There is insufficient antecedent basis for this limitation in the claim. For purposes of examination, the first instance of this limitation is interpreted as, “[[the]] system management memory.” Claim 14 recites, “the system management memory.” There is insufficient antecedent basis for this limitation in the claim. Claim 17 recites, twice, “the instruction pointer.” There is insufficient antecedent basis for this limitation in the claim. Claim 17 recites, “the system management memory.” There is insufficient antecedent basis for this limitation in the claim. Claim 17 recites, “the execution.” There is insufficient antecedent basis for this limitation in the claim. Claim 17 recites, “EIP.” This apparent abbreviation should be spelled out the first time it is used to prevent ambiguity. Claim 17 recites, “the length.” There is insufficient antecedent basis for this limitation in the claim. Claim 18 recites, “the execution.” There is insufficient antecedent basis for this limitation in the claim. Claim 18 recites, twice, “the instruction pointer.” There is insufficient antecedent basis for this limitation in the claim. Claim 18 recites, “the system management memory.” There is insufficient antecedent basis for this limitation in the claim. Claim 21 recites, “obtaining an emulation flag.” It is ambiguous as to whether this is a second emulation flag or if the limitation refers to the emulation flag introduced in claim 1. For purposes of examination, the latter interpretation is used and this limitation is interpreted as, “obtaining [[an]] the emulation flag.” Claim 21 recites, “the emulation flag.” The antecedent basis for this limitation is indefinite. The limitation could refer to “an emulation flag” from claim 1 or from claim 21. Claim 22 recites, “the execution.” There is insufficient antecedent basis for this limitation in the claim. Claim 22 recites, “storing the exception in a system management memory.” The meaning of this limitation is unclear and ambiguous, rendering the scope of the claims indefinite. It does not seem possible to store an exception in memory as the exception is an event. It may be that what is stored is an indication that an exception has occurred. Claim 23 recites, “the exception comprises decoding exceptions and runtime exceptions.” The meaning of this limitation is unclear and ambiguous, rendering the scope of the claims indefinite. How can a single exception, i.e., the exception, include multiple exceptions? Claim 24 recites, “the determination result.” There is insufficient antecedent basis for this limitation in the claim. Claim 24 recites, “the microcode handler.” There is insufficient antecedent basis for this limitation in the claim. Claim 25 recites, “when the exception is a trap and exiting the system management mode.” The meaning of this limitation is unclear and ambiguous, rendering the scope of the claims indefinite. The limitation does not make sense due to grammatical construction. Claim 25 recites, “the information.” There is insufficient antecedent basis for this limitation in the claim. Claim 25 recites, “the value.” There is insufficient antecedent basis for this limitation in the claim. Claim 25 recites, “the architecture register.” There is insufficient antecedent basis for this limitation in the claim. Claim 26 recites, “the operand.” There is insufficient antecedent basis for this limitation in the claim. Claim 27 recites, “the simulation execution result.” There is insufficient antecedent basis for this limitation in the claim. Claim 27 recites, “the execution.” There is insufficient antecedent basis for this limitation in the claim. Claim 28 recites, “the calculation results.” There is insufficient antecedent basis for this limitation in the claim. Claim 28 recites, “the architecture register.” There is insufficient antecedent basis for this limitation in the claim. Claim 29 recites, “the operation result.” There is insufficient antecedent basis for this limitation in the claim. Claim 29 recites, “the execution.” There is insufficient antecedent basis for this limitation in the claim. Claim 30 recites, “the value.” There is insufficient antecedent basis for this limitation in the claim. Claim 30 recites, “the system management memory.” There is insufficient antecedent basis for this limitation in the claim. Claim 31 recites, “the memory operand.” There is insufficient antecedent basis for this limitation in the claim. The antecedent basis for this limitation is indefinite. The limitation could refer to “a memory operand” from claim 30 or from claim 31. Claim 32 recites, “the memory operand.” There is insufficient antecedent basis for this limitation in the claim. The antecedent basis for this limitation is indefinite. The limitation could refer to “a memory operand” from claim 30 or from claim 32. Claim 33 recites, “the memory operand.” There is insufficient antecedent basis for this limitation in the claim. The antecedent basis for this limitation is indefinite. The limitation could refer to “a memory operand” from claim 30 or from claim 33. Claim 34 recites, twice, “the value.” There is insufficient antecedent basis for this limitation in the claim. Claim 34 recites, twice, “the memory operand.” There is insufficient antecedent basis for this limitation in the claim. The antecedent basis for this limitation is indefinite. The limitation could refer to “a memory operand” from claim 30 or from claim 31. Claim 35 recites, “the value.” There is insufficient antecedent basis for this limitation in the claim. Claim 35 recites, “the memory operand.” There is insufficient antecedent basis for this limitation in the claim. The antecedent basis for this limitation is indefinite. The limitation could refer to “a memory operand” from claim 30 or from claim 35. Claim 35 recites, “the system memory.” There is insufficient antecedent basis for this limitation in the claim. Claims 7-9, 11, 12, 23-25, 27-29, and 31-35 are rejected as depending from rejected base claims and failing to cure the indefiniteness of those base claims. Claims 41-49, 52, 53, and 56-70 are corresponding claims that are rejected for corresponding reasons. Allowable Subject Matter Claims 1 and 36 are allowable over the prior art. The newly amended limitations include storing an emulation flag in a microarchitecture register in response to an unknown instruction exception. Microarchitectural registers are generally well-known, as indicated at the cited art below. However, using microarchitectural registers in the specific manner claimed (e.g., to store an emulation flag in response to an unknown instruction exception), within the specific context claimed (e.g., to convert unknown instructions in system management mode), is not disclosed by any single reference. Nor would it have been obvious to combine references to arrive at the claimed invention absent impermissible hindsight. Accordingly, claims 1 and 36 are allowable. Dependent claims 3, 5-35, 38, and 40-71 are likewise allowable by virtue of depending from allowable base claims. Response to Arguments On page 28 of the response filed April 3, 2026 (“response”), the Applicant argues, “the "flag register 150" disclosed in Adams (which contains the ID flag 162, VIP flag 160, and VIF flag 158 in FIG. 9) is a standard x86 EFLAGS register. As is well known in the art, this is an Architectural Register, which is directly visible to and manipulatable by the operating system and software applications (such as Adams' OS-level driver). In stark contrast, the amended claim 1 explicitly requires writing to a Microarchitecture Register. Microarchitecture registers are internal, hardware-level registers used exclusively by the processor's underlying microcode and are strictly inaccessible to upper-level software. Adams provides no teaching or suggestion of utilizing an internal microarchitecture register.” These remarks have been fully considered and, in light of the claim amendments presented in the response, are deemed persuasive. Please see above for an indication of allowable subject matter. Conclusion The following prior art made of record and not relied upon is considered pertinent to Applicant’s disclosure. US 20220027467 by Favor discloses using microarchitectural registers. US 20170031685 by Craske discloses using micro-architectural registers as low energy. US 6093213 by Favor discloses SMM micro-architecture control register. US 20110307689 by Chung discloses storing microcode in microarchitectural registers. US 20060107077 by Roth discloses using microarchitectural registers and microcode. US 6826704 by Pickett discloses micro-architectural registers that are only accessible to microcode. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAWN DOMAN whose telephone number is (571)270-5677. The examiner can normally be reached on Monday through Friday 8:30am-6pm Eastern Time. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jyoti Mehta can be reached on 571-270-3995. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SHAWN DOMAN/Primary Examiner, Art Unit 2183
Read full office action

Prosecution Timeline

Show 27 earlier events
Aug 17, 2025
Request for Continued Examination
Aug 28, 2025
Response after Non-Final Action
Oct 23, 2025
Non-Final Rejection mailed — §112
Jan 19, 2026
Response Filed
Feb 03, 2026
Final Rejection mailed — §112
Apr 03, 2026
Request for Continued Examination
Apr 09, 2026
Response after Non-Final Action
Oct 07, 2026
Non-Final Rejection mailed — §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12754853
CIRCUITRY AND METHODS FOR IMPLEMENTING FORWARD-EDGE CONTROL-FLOW INTEGRITY (FECFI) USING ONE OR MORE CAPABILITY-BASED INSTRUCTIONS
3y 6m to grant Granted Oct 06, 2026
Patent 12717751
TENSOR PROCESSOR WITH PROCESSING ELEMENT ARRAY AND METHOD FOR PROCESSING TENSORS
4y 8m to grant Granted Aug 25, 2026
Patent 12710986
CIRCUIT AND METHOD FOR DYNAMIC REGISTER ALLOCATION FOR A GRAPHICS PROCESSING UNIT
1y 6m to grant Granted Aug 18, 2026
Patent 12705056
COMPUTING SYSTEM HAVING AN ACCUMULATOR REGISTER HAVING ENTRIES HAVING A BIT WIDTH LARGER THAN A MAN REGISTER FILE
3y 0m to grant Granted Aug 11, 2026
Patent 12693860
EFFICIENT COMPRESSION INSTRUCTION HANDLING IN A PROCESSING PIPELINE
1y 6m to grant Granted Jul 28, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

7-8
Expected OA Rounds
65%
Grant Probability
91%
With Interview (+25.9%)
3y 0m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 288 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month