DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Application
1. Acknowledgement is made of the amendment received on 2/25/2026. Claims 1, 3-15, 21, 22 & 24-27 are pending in this application. Claims 2, 16-20 & 23 are canceled. Claim 27 is new.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
2. Claims 1, 3-5, 7-13, 21, 22 and 24-27 are rejected under 35 U.S.C. 103 as being unpatentable over Shih et al. (US 9,449,935) in view of Gao et al. (US 2019/038820).
Re claim 1, Shih teaches, under BRI, Figs. 5-8, cols. 3-4, a substrate of a microelectronic assembly, the substrate having a planar outer surface (indicated), the substrate comprising:
-an organic dielectric (311, 411);
-a conductive trace (330, 432) embedded in the organic dielectric, the conductive trace (330, 342) parallel to the outer surface of the substrate;
-a coating (414) over the organic dielectric (311, 411), wherein a planar surface of the coating (414) is coplanar with the outer a surface of the substrate; and
-a conductive via (431 and/or metal feature 430) through the coating (414), wherein a first end of the conductive via (431 and/or feature 430) is coplanar with the outer surface of the substrate, and a second end of the conductive via (431 and/or feature 430) is coupled to the conductive trace (330, 432).
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Shih does not explicitly teach an outer glass coating.
Gao teaches an outer glass coating (106, e.g., glasses, glass-ceramics) (Fig. 2, [0030]).
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As taught by Gao, one of ordinary skill in the art would utilize & modify the above teaching into Shih to obtain an outer glass coating as claimed, because glass material is a known dielectric material and widely used in the art. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Gao in combination with Shih due to above reason.
Re claim 3, in combination cited above, Shih teaches, Fig. 6, an attachment layer (413) between the outer glass coating (414) (see Gao’s teaching) and the organic dielectric layer (311, 411).
Re claims 4 & 27, in combination cited above, Shih teaches, Fig. 8, the outer glass coating (see Gao’s teaching) comprises a first coating (414), and the conductive via (431) is one of a first set of conductive vias, the substrate is coupled to a component that includes a second coating (consider 20), and the component (10) includes a second set of conductive vias (102) through the second coating (20), and the first set of conductive vias (431) and the first coating (414) are coupled to the second set of conductive vias (102) and the second coating (20) respectively.
Shih does not explicitly teach the second coating comprising silicon and oxygen (claim 4) & the second coating comprises glass (claim 27).
Gao teaches, [0030], “… an inorganic dielectric material layer such as an oxide, nitride, oxynitride, oxycarbide, carbides, carbonitrides, diamond, diamond like materials, glasses, ceramics, glass-ceramics, and the like”.
As taught by Gao, one of ordinary skill in the art would utilize & modify the above teaching into Shih to obtain the second coating comprising silicon and oxygen & the second coating comprises glass as claimed, because silicon oxide & glass are known insulating materials and widely used in the art. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Gao in combination with Shih due to above reason.
Re claim 21, Shih teaches the substrate is hybrid bonded (*) to the component (10) (Fig. 7).
(*) Further, the limitation "hybrid bond" is merely a product-by-process limitation. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process. In re Thorpe, 227 USPQ 964, 966.
Re claim 5, in combination cited above, Shih teaches, Fig. 6, the outer glass coating (414) is in contact with the organic dielectric (311, 411) (see Gao’s teaching of the outer glass coating).
Re claim 7, Shih teaches, Fig, 6, a core (312, 411), wherein the organic dielectric (311, 413) is on either side of the core.
Re claim 8, in combination cited above, Gao teaches, Fig. 2, the core (consider middle layers 104, 106) comprises glass [0030].
Re claim 9, Shih teaches, under BRI, Fig. 6, the conductive trace is one of a plurality of conductive traces (330, 431), the organic dielectric (411) and the plurality of conductive traces (330, 431) comprise alternating layers, and vias (432) through the organic dielectric (411) couple at least two layers of the conductive traces (330, 431).
Re claim 10, Shih teaches, Fig. 8, the substrate is coupled to a component (10, 20), and the component (10, 20) comprises one of another substrate (20) and an integrated circuit (IC) die (10).
Re claim 11, in combination cited above, Shih teaches, Fig. 7, the outer glass coating (414) (see Gao’s teaching of outer glass coating) is on a first side of the substrate, the conductive via (431 and/or 430) is configured to couple with a component (10) by interconnections of a first type, and Gao teaches, [0003-0004], the substrate is configured to couple with a printed circuit board (PCB) on a second side opposite to the first side by interconnects of a second type.
Re claim 12, in combination cited above, Shih teaches, under BRI, top view of Fig. 8, a mold compound (20); and
a redistribution layer (RDL) (410) in contact with the mold compound, wherein: the RDL comprises the organic dielectric (411) and the conductive trace (432), and
the RDL (410) is between (in x-axis) the mold compound (20) and the outer glass coating (414) (e.g., middle portion of 410 between left side of 20 & right side of 414) (see Gao’s teaching of outer glass coating).
Re claim 13, Shih teaches, Fig. 8, an IC die (10) embedded in the mold compound (20).
Re claim 22, Shih teaches, under BRI, Figs. 5-8, cols. 3-4, a substrate comprising:
-an organic dielectric material (411, 311);
-a plurality of interconnect structures (330, 432) embedded in the organic dielectric material;
-a coating (413 and/or 414) over the organic dielectric material, the coating (413 and/or 414) having a planar surface along an outer surface (indicated) of the substrate; and
-a plurality of conductive vias (431 and/or 430) extending through the coating (413 and/or 414), wherein a first end of one of the conductive vias (431 and/or 430) is along coplanar with the outer surface of the substrate and coplanar with the planar surface of the coating (413 and/or 414), and a second end of one of the conductive vias (431 and/or 430) is coupled to one of the plurality of interconnect structures (330, 432).
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Shih does not explicitly teach an outer glass coating.
Gao teaches an outer glass coating (106, e.g., glasses, glass-ceramics) (Fig. 2, [0030]).
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As taught by Gao, one of ordinary skill in the art would utilize & modify the above teaching into Shih to obtain an outer glass coating as claimed, because glass material is a known dielectric material and widely used in the art. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Gao in combination with Shih due to above reason.
Re claim 24, Shih teaches, under BRI, Fig. 6, the outer surface is a first outer surface (top surface) of the substrate (consider without 301), the substrate further comprising a second coating (302) along a second outer surface (bottom surface) of the substrate, the second outer surface opposite the first outer surface.
Re claim 25, Shih teaches, Fig. 7, the outer surface of the substrate is coupled to a second component (10) by hybrid bonding (*).
(*) Further, the limitation "hybrid bonding" is merely a product-by-process limitation. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process. In re Thorpe, 227 USPQ 964, 966.
Re claim 26, in combination cited above, Shih teaches, under BRI, Fig. 6, the outer glass coating (consider 413, 414) (see Gao’s teaching of outer glass coating) comprises a second planar surface (consider bottom surface of 413), and the second end of the one of the conductive vias (431 and/or 430) is coplanar with the second planar surface.
3. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Shih as modified by Gao as applied to claim 1 above, and further in view of Lu (US 2019/0131231).
The teachings of Shih/Gao have been discussed above.
Re claim 6, in combination cited above, Shih/Gao teaches the outer glass coating and the organic dielectric (see claim 1 above), but does not teach a solder resist between the outer glass coating and the organic dielectric.
Lu teaches a solder resist (solder mask 10) between a coating (12) and the organic dielectric (carrier 54) (Fig. 7B, [0040, 0046, 0091].
As taught by Lu, one of ordinary skill in the art would utilize & modify the above teaching to obtain a solder resist between the outer glass coating and the organic dielectric as claimed, because solder resist (mask) is an essential feature to provide effective connection & performance in a semiconductor packaging.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Lu in combination with Shih/Gao due to above reason.
4. Claims 14 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shih as modified by Gao as applied to claims 1 & 12 above, and further in view of Shih (US 2021/0305223, “Shih23”).
The teachings of Shih/Gao have been discussed above.
Re claim 14, in combination cited above, Shih/Gao teaches the outer glass coating comprises a first coating on a first side of the substrate (Shih’s Fig. 6 & Gao’s teaching of outer glass coating).
Shih/Gao does not explicitly teach the substrate further comprises: a second coating comprising silicon and oxygen on a second side opposite to the first side, wherein the mold compound is between the RDL and the second coating.
Shih23 teaches, Fig. 1, abstract, [0042, 0049, 0072], the substrate further comprises: a second coating (18P) comprising silicon and oxygen (e.g., silicon oxide) on a second side opposite to the first side, wherein the mold compound (40) is between the RDL (upper RDL) and the second coating (18P).
As taught by Shih23, one of ordinary skill in the art would utilize & modify the above teaching to obtain the coating comprises a first coating on a first side, and the substrate further comprises: a second coating comprising silicon and oxygen on a second side opposite to the first side, wherein the mold compound is between the RDL and the second coating as claimed, because it aids in achieving a semiconductor package with reduced interfacial delamination of surfaces in-between the sub-packages.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Shih23 in combination with Shih/Gao due to above reason.
Re claim 15, in combination cited above, Shih teaches the conductive vias is one of a first set of conductive vias (423) (Fig. 6), and Shih23 teaches, Figs. 1 & 6, the substrate further comprises a second set of conductive vias (consider 18A) through the second coating (18P), wherein the second set of conductive vias (18A) are configured to couple with another component electrically and mechanically (based on plurality of stacked chips) [008, 0065].
5. Claims 1, 4, 11, 22 and 24-26 are rejected under 35 U.S.C. 103 as being unpatentable over Shih (US 9,922,845, “Shih5) in view of Gao et al. (US 2019/038820).
Re claim 1, Shih5 teaches, under BRI, Figs. 4-6, cols. 3-5, a substrate of a microelectronic assembly, the substrate having a planar outer surface (indicated), the substrate comprising:
-an organic dielectric (BCB 201);
-a conductive trace (202, 204) embedded in the organic dielectric (201), the conductive trace (202, 204) parallel to the outer surface of the substrate;
-a coating (21) over the organic dielectric (201), wherein a planar surface of the coating (21) is coplanar with the outer a surface of the substrate; and
-a conductive via (320a) through the coating (21), wherein a first end of the conductive via (320a) is coplanar with the outer surface of the substrate, and a second end of the conductive via (320a) is coupled to the conductive trace (202, 204).
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Shih5 does not explicitly teach an outer glass coating.
Gao teaches an outer glass coating (106, e.g., glasses, glass-ceramics) (Fig. 2, [0030]).
As taught by Gao, one of ordinary skill in the art would utilize & modify the above teaching into Shih to obtain an outer glass coating as claimed, because glass material is a known dielectric material and widely used in the art. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Gao in combination with Shih5 due to above reason.
Re claim 4, in combination cited above, Shih5 teaches, under BRI, Fig. 6, the outer glass coating (see Gao’s teaching of outer glass coating) comprises a first coating (21), and the conductive via (320a) is one of a first set of conductive vias, the substrate is coupled to a component (102) that includes a second coating (400), the second coating (400) comprising silicon and oxygen (e.g., silica filters), and the component (102) includes a second set of conductive vias (320b) through the second coating (400), and the first set of conductive vias (320a) and the first coating (21) are coupled to the second set of conductive vias (320b) and the second coating (400) respectively.
Re claim 11, in combination cited above, Shih5 teaches, Fig. 8, col. 5, 6th par., the outer glass coating (21) (see Gao’s teaching of outer glass coating) is on a first side of the substrate, the conductive via (320a) is configured to couple with a component (102) by interconnects of a first type, and the substrate is configured to couple with a printed circuit board (PCB) on a second side opposite to the first side by interconnects of a second type.
Re claim 22, Shih5 teaches, under BRI, Figs. 4-6, cols. 3-5, a substrate comprising:
-an organic dielectric material (201);
-a plurality of interconnect structures (202, 204) embedded in the organic dielectric material (201);
-a coating (21) over the organic dielectric material (201), the coating (21) having a planar surface along an outer surface (indicated) of the substrate; and
-a plurality of conductive vias (320a) extending through the coating (21), wherein a first end of one of the conductive vias (320a) is along coplanar with the outer surface of the substrate and coplanar with the planar surface of the coating (21), and a second end of one of the conductive vias (320a) is coupled to one of the plurality of interconnect structures (202, 204).
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Shih5 does not explicitly teach an outer glass coating.
Gao teaches an outer glass coating (106, e.g., glasses, glass-ceramics) (Fig. 2, [0030]).
As taught by Gao, one of ordinary skill in the art would utilize & modify the above teaching into Shih to obtain an outer glass coating as claimed, because glass material is a known dielectric material and widely used in the art. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended used a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Gao in combination with Shih5 due to above reason.
Re claim 24, Shih5 teaches, under BRI, Fig. 4, the outer surface is a first outer surface (top surface) of the substrate (consider without 10), the substrate further comprising a second coating (11) along a second outer surface (bottom surface) of the substrate, the second outer surface opposite the first outer surface.
Re claim 25, Shih5 teaches, Fig. 5, the outer surface of the substrate is coupled to a second component (102) by hybrid bonding (*).
(*) Further, the limitation "hybrid bond" is merely a product-by-process limitation. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process. In re Thorpe, 227 USPQ 964, 966.
Re claim 26, in combination cited above, Shih5 teaches, under BRI, Fig. 4, the outer glass coating (21) (see Gao’s teaching) comprises a second planar surface (bottom surface of 21), and the second end of the one of the conductive vias (320a) is coplanar with the second planar surface.
Response to Arguments
6. Applicant's arguments with respect to claims have been considered but are moot in view of the new ground(s) of rejection. Response to arguments on newly added limitations are responded to in the above rejection.
Conclusion
7. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DUY T.V. NGUYEN whose telephone number is (571)270-7431. The examiner can normally be reached Monday-Friday, 7AM-4PM, alternative Friday off.
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/DUY T NGUYEN/Primary Examiner, Art Unit 2818 3/10/26